zs_ap.c revision 1.24
1 /* $NetBSD: zs_ap.c,v 1.24 2008/03/29 19:15:35 tsutsui Exp $ */ 2 3 /*- 4 * Copyright (c) 1996 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Gordon W. Ross. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Zilog Z8530 Dual UART driver (machine-dependent part) 41 * 42 * Runs two serial lines per chip using slave drivers. 43 * Plain tty/async lines use the zs_async slave. 44 * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves. 45 */ 46 47 #include <sys/cdefs.h> 48 __KERNEL_RCSID(0, "$NetBSD: zs_ap.c,v 1.24 2008/03/29 19:15:35 tsutsui Exp $"); 49 50 #include <sys/param.h> 51 #include <sys/systm.h> 52 #include <sys/device.h> 53 #include <sys/tty.h> 54 #include <sys/conf.h> 55 #include <sys/cpu.h> 56 #include <sys/intr.h> 57 58 #include <machine/adrsmap.h> 59 #include <machine/z8530var.h> 60 61 #include <dev/cons.h> 62 #include <dev/ic/z8530reg.h> 63 64 #include <newsmips/apbus/apbusvar.h> 65 66 #include "zsc.h" /* NZSC */ 67 #define NZS NZSC 68 69 /* Make life easier for the initialized arrays here. */ 70 #if NZS < 2 71 #undef NZS 72 #define NZS 2 73 #endif 74 75 #define PORTB_XPORT 0x00000000 76 #define PORTB_RPORT 0x00010000 77 #define PORTA_XPORT 0x00020000 78 #define PORTA_RPORT 0x00030000 79 #define DMA_MODE_REG 3 80 #define DMA_ENABLE 0x01 /* DMA enable */ 81 #define DMA_DIR_DM 0x00 /* device to memory */ 82 #define DMA_DIR_MD 0x02 /* memory to device */ 83 #define DMA_EXTRDY 0x08 /* DMA external ready */ 84 #define PORTB_OFFSET 0x00040000 85 #define PORTA_OFFSET 0x00050000 86 #define PORT_CTL 2 87 #define PORTCTL_RI 0x01 88 #define PORTCTL_DSR 0x02 89 #define PORTCTL_DTR 0x04 90 #define PORT_SEL 3 91 #define PORTSEL_LOCALTALK 0x01 92 #define PORTSEL_RS232C 0x02 93 #define ESCC_REG 0x00060000 94 #define ESCCREG_INTSTAT 0 95 #define INTSTAT_SCC 0x01 96 #define ESCCREG_INTMASK 1 97 #define INTMASK_SCC 0x01 98 99 extern int zs_def_cflag; 100 extern void (*zs_delay)(void); 101 102 /* 103 * The news5000 provides a 9.8304 MHz clock to the ZS chips. 104 */ 105 #define PCLK (9600 * 1024) /* PCLK pin input clock rate */ 106 107 #define ZS_DELAY() DELAY(2) 108 109 /* The layout of this is hardware-dependent (padding, order). */ 110 struct zschan { 111 volatile uint8_t pad1[3]; 112 volatile uint8_t zc_csr; /* ctrl,status, and indirect access */ 113 volatile uint8_t pad2[3]; 114 volatile uint8_t zc_data; /* data */ 115 }; 116 117 static void *zsaddr[NZS]; 118 119 /* Flags from cninit() */ 120 static int zs_hwflags[NZS][2]; 121 122 /* Default speed for all channels */ 123 static int zs_defspeed = 9600; 124 125 static uint8_t zs_init_reg[16] = { 126 0, /* 0: CMD (reset, etc.) */ 127 0, /* 1: No interrupts yet. */ 128 0, /* IVECT */ 129 ZSWR3_RX_8 | ZSWR3_RX_ENABLE, 130 ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP, 131 ZSWR5_TX_8 | ZSWR5_TX_ENABLE, 132 0, /* 6: TXSYNC/SYNCLO */ 133 0, /* 7: RXSYNC/SYNCHI */ 134 0, /* 8: alias for data port */ 135 ZSWR9_MASTER_IE, 136 0, /*10: Misc. TX/RX control bits */ 137 ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD, 138 ((PCLK/32)/9600)-2, /*12: BAUDLO (default=9600) */ 139 0, /*13: BAUDHI (default=9600) */ 140 ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK, 141 ZSWR15_BREAK_IE, 142 }; 143 144 static struct zschan * zs_get_chan_addr(int, int); 145 static void zs_ap_delay(void); 146 static int zshard_ap(void *); 147 static int zs_getc(void *); 148 static void zs_putc(void *, int); 149 150 struct zschan * 151 zs_get_chan_addr(int zs_unit, int channel) 152 { 153 void *addr; 154 struct zschan *zc; 155 156 if (zs_unit >= NZS) 157 return NULL; 158 addr = zsaddr[zs_unit]; 159 if (addr == NULL) 160 return NULL; 161 if (channel == 0) { 162 zc = (void *)((uint8_t *)addr + PORTA_OFFSET); 163 } else { 164 zc = (void *)((uint8_t *)addr + PORTB_OFFSET); 165 } 166 return zc; 167 } 168 169 void 170 zs_ap_delay(void) 171 { 172 173 ZS_DELAY(); 174 } 175 176 /**************************************************************** 177 * Autoconfig 178 ****************************************************************/ 179 180 /* Definition of the driver for autoconfig. */ 181 int zs_ap_match(device_t, cfdata_t, void *); 182 void zs_ap_attach(device_t, device_t, void *); 183 184 CFATTACH_DECL_NEW(zsc_ap, sizeof(struct zsc_softc), 185 zs_ap_match, zs_ap_attach, NULL, NULL); 186 187 /* 188 * Is the zs chip present? 189 */ 190 int 191 zs_ap_match(device_t parent, cfdata_t cf, void *aux) 192 { 193 struct apbus_attach_args *apa = aux; 194 195 if (strcmp("esccf", apa->apa_name) != 0) 196 return 0; 197 198 return 1; 199 } 200 201 /* 202 * Attach a found zs. 203 * 204 * Match slave number to zs unit number, so that misconfiguration will 205 * not set up the keyboard as ttya, etc. 206 */ 207 void 208 zs_ap_attach(device_t parent, device_t self, void *aux) 209 { 210 struct zsc_softc *zsc = device_private(self); 211 struct apbus_attach_args *apa = aux; 212 struct zsc_attach_args zsc_args; 213 volatile struct zschan *zc; 214 struct zs_chanstate *cs; 215 int s, zs_unit, channel; 216 volatile u_int *txBfifo = (void *)(apa->apa_hwbase + PORTB_XPORT); 217 volatile u_int *rxBfifo = (void *)(apa->apa_hwbase + PORTB_RPORT); 218 volatile u_int *txAfifo = (void *)(apa->apa_hwbase + PORTA_XPORT); 219 volatile u_int *rxAfifo = (void *)(apa->apa_hwbase + PORTA_RPORT); 220 volatile u_int *portBctl = (void *)(apa->apa_hwbase + PORTB_OFFSET); 221 volatile u_int *portActl = (void *)(apa->apa_hwbase + PORTA_OFFSET); 222 volatile u_int *esccregs = (void *)(apa->apa_hwbase + ESCC_REG); 223 static int didintr; 224 225 zsc->zsc_dev = self; 226 zs_unit = device_unit(self); 227 zsaddr[zs_unit] = (void *)apa->apa_hwbase; 228 229 aprint_normal(" slot%d addr 0x%lx\n", apa->apa_slotno, apa->apa_hwbase); 230 231 txAfifo[DMA_MODE_REG] = rxAfifo[DMA_MODE_REG] = DMA_EXTRDY; 232 txBfifo[DMA_MODE_REG] = rxBfifo[DMA_MODE_REG] = DMA_EXTRDY; 233 234 /* assert DTR */ /* XXX */ 235 portBctl[PORT_CTL] = portActl[PORT_CTL] = PORTCTL_DTR; 236 237 /* select RS-232C (ch1 only) */ 238 portActl[PORT_SEL] = PORTSEL_RS232C; 239 240 /* enable SCC interrupts */ 241 esccregs[ESCCREG_INTMASK] = INTMASK_SCC; 242 243 zs_delay = zs_ap_delay; 244 245 /* 246 * Initialize software state for each channel. 247 */ 248 for (channel = 0; channel < 2; channel++) { 249 zsc_args.channel = channel; 250 zsc_args.hwflags = zs_hwflags[zs_unit][channel]; 251 cs = &zsc->zsc_cs_store[channel]; 252 zsc->zsc_cs[channel] = cs; 253 254 zs_lock_init(cs); 255 cs->cs_channel = channel; 256 cs->cs_private = NULL; 257 cs->cs_ops = &zsops_null; 258 cs->cs_brg_clk = PCLK / 16; 259 260 zc = zs_get_chan_addr(zs_unit, channel); 261 cs->cs_reg_csr = &zc->zc_csr; 262 cs->cs_reg_data = &zc->zc_data; 263 264 memcpy(cs->cs_creg, zs_init_reg, 16); 265 memcpy(cs->cs_preg, zs_init_reg, 16); 266 267 /* XXX: Get these from the EEPROM instead? */ 268 /* XXX: See the mvme167 code. Better. */ 269 if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE) 270 cs->cs_defspeed = zs_get_speed(cs); 271 else 272 cs->cs_defspeed = zs_defspeed; 273 cs->cs_defcflag = zs_def_cflag; 274 275 /* Make these correspond to cs_defcflag (-crtscts) */ 276 cs->cs_rr0_dcd = ZSRR0_DCD; 277 cs->cs_rr0_cts = 0; 278 cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS; 279 cs->cs_wr5_rts = 0; 280 281 /* 282 * Clear the master interrupt enable. 283 * The INTENA is common to both channels, 284 * so just do it on the A channel. 285 */ 286 if (channel == 0) { 287 zs_write_reg(cs, 9, 0); 288 } 289 290 /* 291 * Look for a child driver for this channel. 292 * The child attach will setup the hardware. 293 */ 294 if (!config_found(self, (void *)&zsc_args, zs_print)) { 295 /* No sub-driver. Just reset it. */ 296 uint8_t reset = (channel == 0) ? 297 ZSWR9_A_RESET : ZSWR9_B_RESET; 298 s = splhigh(); 299 zs_write_reg(cs, 9, reset); 300 splx(s); 301 } 302 } 303 304 /* 305 * Now safe to install interrupt handlers. Note the arguments 306 * to the interrupt handlers aren't used. Note, we only do this 307 * once since both SCCs interrupt at the same level and vector. 308 */ 309 if (!didintr) { 310 didintr = 1; 311 312 zsc->zsc_si = softint_establish(SOFTINT_SERIAL, zssoft, zsc); 313 apbus_intr_establish(1, /* interrupt level ( 0 or 1 ) */ 314 NEWS5000_INT1_SCC, 315 0, /* priority */ 316 zshard_ap, zsc, 317 apa->apa_name, apa->apa_ctlnum); 318 } 319 /* XXX; evcnt_attach() ? */ 320 321 #if 0 322 { 323 u_int x; 324 325 /* determine SCC/ESCC type */ 326 x = zs_read_reg(cs, 15); 327 zs_write_reg(cs, 15, x | ZSWR15_ENABLE_ENHANCED); 328 329 if (zs_read_reg(cs, 15) & ZSWR15_ENABLE_ENHANCED) { /* ESCC Z85230 */ 330 zs_write_reg(cs, 7, ZSWR7P_EXTEND_READ | ZSWR7P_TX_FIFO); 331 } 332 } 333 #endif 334 335 /* 336 * Set the master interrupt enable and interrupt vector. 337 * (common to both channels, do it on A) 338 */ 339 cs = zsc->zsc_cs[0]; 340 s = splhigh(); 341 /* interrupt vector */ 342 zs_write_reg(cs, 2, zs_init_reg[2]); 343 /* master interrupt control (enable) */ 344 zs_write_reg(cs, 9, zs_init_reg[9]); 345 splx(s); 346 } 347 348 static int 349 zshard_ap(void *arg) 350 { 351 352 zshard(arg); 353 return 1; 354 } 355 356 /* 357 * Polled input char. 358 */ 359 int 360 zs_getc(void *arg) 361 { 362 volatile struct zschan *zc = arg; 363 int s, c; 364 uint8_t rr0; 365 366 s = splhigh(); 367 /* Wait for a character to arrive. */ 368 do { 369 rr0 = zc->zc_csr; 370 ZS_DELAY(); 371 } while ((rr0 & ZSRR0_RX_READY) == 0); 372 373 c = zc->zc_data; 374 ZS_DELAY(); 375 splx(s); 376 377 /* 378 * This is used by the kd driver to read scan codes, 379 * so don't translate '\r' ==> '\n' here... 380 */ 381 return c; 382 } 383 384 /* 385 * Polled output char. 386 */ 387 void 388 zs_putc(void *arg, int c) 389 { 390 volatile struct zschan *zc = arg; 391 int s; 392 uint8_t rr0; 393 394 s = splhigh(); 395 /* Wait for transmitter to become ready. */ 396 do { 397 rr0 = zc->zc_csr; 398 ZS_DELAY(); 399 } while ((rr0 & ZSRR0_TX_READY) == 0); 400 401 zc->zc_data = c; 402 ZS_DELAY(); 403 splx(s); 404 } 405 406 /*****************************************************************/ 407 408 static void zscnprobe(struct consdev *); 409 static void zscninit(struct consdev *); 410 static int zscngetc(dev_t); 411 static void zscnputc(dev_t, int); 412 413 struct consdev consdev_zs_ap = { 414 zscnprobe, 415 zscninit, 416 zscngetc, 417 zscnputc, 418 nullcnpollc, 419 NULL, 420 NULL, 421 NULL, 422 NODEV, 423 CN_DEAD 424 }; 425 426 static void 427 zscnprobe(struct consdev *cn) 428 { 429 } 430 431 static void 432 zscninit(struct consdev *cn) 433 { 434 extern const struct cdevsw zstty_cdevsw; 435 436 cn->cn_dev = makedev(cdevsw_lookup_major(&zstty_cdevsw), 0); 437 cn->cn_pri = CN_REMOTE; 438 zs_hwflags[0][0] = ZS_HWFLAG_CONSOLE; 439 } 440 441 static int 442 zscngetc(dev_t dev) 443 { 444 445 return zs_getc((void *)NEWS5000_SCCPORT0A); 446 } 447 448 static void 449 zscnputc(dev_t dev, int c) 450 { 451 452 zs_putc((void *)NEWS5000_SCCPORT0A, c); 453 } 454
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