dmac_0448.h revision 1.3.6.2       1  1.3.6.1    skrll /*	$NetBSD: dmac_0448.h,v 1.3.6.2 2004/09/18 14:38:10 skrll Exp $	*/
      2      1.1   tsubai /*
      3      1.1   tsubai  * Copyright (c) 1992, 1993
      4      1.1   tsubai  *	The Regents of the University of California.  All rights reserved.
      5      1.1   tsubai  *
      6      1.1   tsubai  * This code is derived from software contributed to Berkeley by
      7      1.1   tsubai  * Sony Corp. and Kazumasa Utashiro of Software Research Associates, Inc.
      8      1.1   tsubai  *
      9      1.1   tsubai  * Redistribution and use in source and binary forms, with or without
     10      1.1   tsubai  * modification, are permitted provided that the following conditions
     11      1.1   tsubai  * are met:
     12      1.1   tsubai  * 1. Redistributions of source code must retain the above copyright
     13      1.1   tsubai  *    notice, this list of conditions and the following disclaimer.
     14      1.1   tsubai  * 2. Redistributions in binary form must reproduce the above copyright
     15      1.1   tsubai  *    notice, this list of conditions and the following disclaimer in the
     16      1.1   tsubai  *    documentation and/or other materials provided with the distribution.
     17  1.3.6.1    skrll  * 3. Neither the name of the University nor the names of its contributors
     18      1.1   tsubai  *    may be used to endorse or promote products derived from this software
     19      1.1   tsubai  *    without specific prior written permission.
     20      1.1   tsubai  *
     21      1.1   tsubai  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     22      1.1   tsubai  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     23      1.1   tsubai  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     24      1.1   tsubai  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     25      1.1   tsubai  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     26      1.1   tsubai  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     27      1.1   tsubai  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     28      1.1   tsubai  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     29      1.1   tsubai  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     30      1.1   tsubai  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     31      1.1   tsubai  * SUCH DAMAGE.
     32      1.1   tsubai  *
     33      1.1   tsubai  * from: $Hdr: dmac_0448.h,v 4.300 91/06/09 06:21:36 root Rel41 $ SONY
     34      1.1   tsubai  *
     35      1.1   tsubai  *	@(#)dmac_0448.h	8.1 (Berkeley) 6/11/93
     36      1.1   tsubai  */
     37      1.1   tsubai 
     38      1.1   tsubai /*
     39      1.1   tsubai  * Copyright (c) 1989- by SONY Corporation.
     40      1.1   tsubai  */
     41      1.1   tsubai /*
     42      1.1   tsubai  *	dmac_0448.h
     43      1.1   tsubai  *		DMAC L7A0448
     44      1.1   tsubai  */
     45      1.1   tsubai 
     46      1.1   tsubai /*	dmac register base address	*/
     47      1.1   tsubai #define DMAC_BASE		0xbfe00000
     48      1.1   tsubai 
     49      1.1   tsubai /*	register definition	*/
     50      1.1   tsubai #define DMAC_GSTAT		(DMAC_BASE + 0xf)
     51      1.1   tsubai #define DMAC_GSEL		(DMAC_BASE + 0xe)
     52      1.1   tsubai 
     53      1.1   tsubai #define DMAC_CSTAT		(DMAC_BASE + 0x2)
     54      1.1   tsubai #define DMAC_CCTL		(DMAC_BASE + 0x3)
     55      1.1   tsubai #define DMAC_CTRCL		(DMAC_BASE + 0x4)
     56      1.1   tsubai #define DMAC_CTRCM		(DMAC_BASE + 0x5)
     57      1.1   tsubai #define DMAC_CTRCH		(DMAC_BASE + 0x6)
     58      1.1   tsubai #define DMAC_CTAG		(DMAC_BASE + 0x7)
     59      1.1   tsubai #define DMAC_CWID		(DMAC_BASE + 0x8)
     60      1.1   tsubai #define DMAC_COFSL		(DMAC_BASE + 0x9)
     61      1.1   tsubai #define DMAC_COFSH		(DMAC_BASE + 0xa)
     62      1.1   tsubai #define DMAC_CMAP		(DMAC_BASE + 0xc)
     63      1.1   tsubai #define DMAC_CMAPH		(DMAC_BASE + 0xc)
     64      1.1   tsubai #define DMAC_CMAPL		(DMAC_BASE + 0xd)
     65      1.1   tsubai 
     66      1.3  thorpej #ifdef __mips__
     67      1.1   tsubai #define	VOLATILE	volatile
     68      1.1   tsubai #else
     69      1.1   tsubai #define	VOLATILE
     70      1.1   tsubai #endif
     71      1.1   tsubai 
     72      1.1   tsubai #ifndef U_CHAR
     73      1.1   tsubai #define U_CHAR	unsigned VOLATILE char
     74      1.1   tsubai #endif
     75      1.1   tsubai 
     76      1.1   tsubai #ifndef U_SHORT
     77      1.1   tsubai #define U_SHORT	unsigned VOLATILE short
     78      1.1   tsubai #endif
     79      1.1   tsubai 
     80      1.1   tsubai #define dmac_gstat		*(U_CHAR *)DMAC_GSTAT
     81      1.1   tsubai #define dmac_gsel		*(U_CHAR *)DMAC_GSEL
     82      1.1   tsubai 
     83      1.1   tsubai #define dmac_cstat		*(U_CHAR *)DMAC_CSTAT
     84      1.1   tsubai #define dmac_cctl		*(U_CHAR *)DMAC_CCTL
     85      1.1   tsubai #define dmac_ctrcl		*(U_CHAR *)DMAC_CTRCL
     86      1.1   tsubai #define dmac_ctrcm		*(U_CHAR *)DMAC_CTRCM
     87      1.1   tsubai #define dmac_ctrch		*(U_CHAR *)DMAC_CTRCH
     88      1.1   tsubai #define dmac_ctag		*(U_CHAR *)DMAC_CTAG
     89      1.1   tsubai #define dmac_cwid		*(U_CHAR *)DMAC_CWID
     90      1.1   tsubai #define dmac_cofsl		*(U_CHAR *)DMAC_COFSL
     91      1.1   tsubai #define dmac_cofsh		*(U_CHAR *)DMAC_COFSH
     92      1.1   tsubai #define dmac_cmap		*(U_SHORT *)DMAC_CMAP
     93      1.1   tsubai #define dmac_cmaph		*(U_CHAR *)DMAC_CMAPH
     94      1.1   tsubai #define dmac_cmapl		*(U_CHAR *)DMAC_CMAPL
     95      1.1   tsubai 
     96      1.1   tsubai /*	status/control bit definition	*/
     97      1.1   tsubai #define	DM_TCZ			0x80
     98      1.1   tsubai #define	DM_A28			0x40
     99      1.1   tsubai #define	DM_AFIX			0x20
    100      1.1   tsubai #define	DM_APAD			0x10
    101      1.1   tsubai #define	DM_ZINTEN		0x8
    102      1.1   tsubai #define	DM_RST			0x4
    103      1.1   tsubai #define	DM_MODE			0x2
    104      1.1   tsubai #define DM_ENABLE		1
    105      1.1   tsubai 
    106      1.1   tsubai /*	general status bit definition	*/
    107      1.1   tsubai #define CH_INT(x)		(u_char)(1 << (2 * x))
    108      1.1   tsubai #define CH0_INT			1
    109      1.1   tsubai #define CH1_INT			4
    110      1.1   tsubai #define CH2_INT			0x10
    111      1.1   tsubai #define CH3_INT			0x40
    112      1.1   tsubai 
    113      1.1   tsubai #define CH_MRQ(x)		(u_char)(1 << (2 * x + 1))
    114      1.1   tsubai #define CH0_MRQ			2
    115      1.1   tsubai #define CH1_MRQ			8
    116      1.1   tsubai #define CH2_MRQ			0x20
    117      1.1   tsubai #define CH3_MRQ			0x80
    118      1.1   tsubai 
    119      1.1   tsubai /*	channel definition	*/
    120      1.1   tsubai #define	CH_SCSI			0
    121      1.1   tsubai #define	CH_FDC			1
    122      1.1   tsubai #define	CH_AUDIO		2
    123      1.1   tsubai #define	CH_VIDEO		3
    124      1.1   tsubai 
    125      1.1   tsubai /*	dma status		*/
    126      1.1   tsubai 
    127      1.1   tsubai 	struct	dm_stat {
    128      1.1   tsubai 		unsigned int dm_gstat;
    129      1.1   tsubai 		unsigned int dm_cstat;
    130      1.1   tsubai 		unsigned int dm_cctl;
    131      1.1   tsubai 		unsigned int dm_tcnt;
    132      1.1   tsubai 		unsigned int dm_offset;
    133      1.1   tsubai 		unsigned int dm_tag;
    134      1.1   tsubai 		unsigned int dm_width;
    135      1.1   tsubai 	} ;
    136      1.1   tsubai 
    137      1.1   tsubai #define	DMAC_WAIT	nops(10)
    138      1.1   tsubai 
    139      1.1   tsubai #define PINTEN		0xbfc80001
    140      1.1   tsubai # define	DMA_INTEN	0x10
    141      1.1   tsubai #define PINTSTAT	0xbfc80003
    142