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dmac_0448.h revision 1.6.122.1
      1  1.6.122.1   bouyer /*	$NetBSD: dmac_0448.h,v 1.6.122.1 2023/11/26 11:54:31 bouyer Exp $	*/
      2        1.1   tsubai /*
      3        1.1   tsubai  * Copyright (c) 1992, 1993
      4        1.1   tsubai  *	The Regents of the University of California.  All rights reserved.
      5        1.1   tsubai  *
      6        1.1   tsubai  * This code is derived from software contributed to Berkeley by
      7        1.1   tsubai  * Sony Corp. and Kazumasa Utashiro of Software Research Associates, Inc.
      8        1.1   tsubai  *
      9        1.1   tsubai  * Redistribution and use in source and binary forms, with or without
     10        1.1   tsubai  * modification, are permitted provided that the following conditions
     11        1.1   tsubai  * are met:
     12        1.1   tsubai  * 1. Redistributions of source code must retain the above copyright
     13        1.1   tsubai  *    notice, this list of conditions and the following disclaimer.
     14        1.1   tsubai  * 2. Redistributions in binary form must reproduce the above copyright
     15        1.1   tsubai  *    notice, this list of conditions and the following disclaimer in the
     16        1.1   tsubai  *    documentation and/or other materials provided with the distribution.
     17        1.4      agc  * 3. Neither the name of the University nor the names of its contributors
     18        1.1   tsubai  *    may be used to endorse or promote products derived from this software
     19        1.1   tsubai  *    without specific prior written permission.
     20        1.1   tsubai  *
     21        1.1   tsubai  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     22        1.1   tsubai  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     23        1.1   tsubai  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     24        1.1   tsubai  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     25        1.1   tsubai  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     26        1.1   tsubai  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     27        1.1   tsubai  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     28        1.1   tsubai  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     29        1.1   tsubai  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     30        1.1   tsubai  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     31        1.1   tsubai  * SUCH DAMAGE.
     32        1.1   tsubai  *
     33        1.1   tsubai  * from: $Hdr: dmac_0448.h,v 4.300 91/06/09 06:21:36 root Rel41 $ SONY
     34        1.1   tsubai  *
     35        1.1   tsubai  *	@(#)dmac_0448.h	8.1 (Berkeley) 6/11/93
     36        1.1   tsubai  */
     37        1.1   tsubai 
     38        1.1   tsubai /*
     39        1.1   tsubai  * Copyright (c) 1989- by SONY Corporation.
     40        1.1   tsubai  */
     41        1.1   tsubai /*
     42        1.1   tsubai  *	dmac_0448.h
     43        1.1   tsubai  *		DMAC L7A0448
     44        1.1   tsubai  */
     45        1.1   tsubai 
     46        1.1   tsubai /*	dmac register base address	*/
     47        1.1   tsubai #define DMAC_BASE		0xbfe00000
     48        1.1   tsubai 
     49        1.1   tsubai /*	register definition	*/
     50        1.1   tsubai #define DMAC_GSTAT		(DMAC_BASE + 0xf)
     51        1.1   tsubai #define DMAC_GSEL		(DMAC_BASE + 0xe)
     52        1.1   tsubai 
     53        1.1   tsubai #define DMAC_CSTAT		(DMAC_BASE + 0x2)
     54        1.1   tsubai #define DMAC_CCTL		(DMAC_BASE + 0x3)
     55        1.1   tsubai #define DMAC_CTRCL		(DMAC_BASE + 0x4)
     56        1.1   tsubai #define DMAC_CTRCM		(DMAC_BASE + 0x5)
     57        1.1   tsubai #define DMAC_CTRCH		(DMAC_BASE + 0x6)
     58        1.1   tsubai #define DMAC_CTAG		(DMAC_BASE + 0x7)
     59        1.1   tsubai #define DMAC_CWID		(DMAC_BASE + 0x8)
     60        1.1   tsubai #define DMAC_COFSL		(DMAC_BASE + 0x9)
     61        1.1   tsubai #define DMAC_COFSH		(DMAC_BASE + 0xa)
     62        1.1   tsubai #define DMAC_CMAP		(DMAC_BASE + 0xc)
     63        1.1   tsubai #define DMAC_CMAPH		(DMAC_BASE + 0xc)
     64        1.1   tsubai #define DMAC_CMAPL		(DMAC_BASE + 0xd)
     65        1.1   tsubai 
     66        1.6  tsutsui #define dmac_gstat		(*(volatile uint8_t *)DMAC_GSTAT)
     67        1.6  tsutsui #define dmac_gsel		(*(volatile uint8_t *)DMAC_GSEL)
     68        1.6  tsutsui 
     69        1.6  tsutsui #define dmac_cstat		(*(volatile uint8_t *)DMAC_CSTAT)
     70        1.6  tsutsui #define dmac_cctl		(*(volatile uint8_t *)DMAC_CCTL)
     71        1.6  tsutsui #define dmac_ctrcl		(*(volatile uint8_t *)DMAC_CTRCL)
     72        1.6  tsutsui #define dmac_ctrcm		(*(volatile uint8_t *)DMAC_CTRCM)
     73        1.6  tsutsui #define dmac_ctrch		(*(volatile uint8_t *)DMAC_CTRCH)
     74        1.6  tsutsui #define dmac_ctag		(*(volatile uint8_t *)DMAC_CTAG)
     75        1.6  tsutsui #define dmac_cwid		(*(volatile uint8_t *)DMAC_CWID)
     76        1.6  tsutsui #define dmac_cofsl		(*(volatile uint8_t *)DMAC_COFSL)
     77        1.6  tsutsui #define dmac_cofsh		(*(volatile uint8_t *)DMAC_COFSH)
     78        1.6  tsutsui #define dmac_cmap		(*(volatile uint16_t *)DMAC_CMAP)
     79        1.6  tsutsui #define dmac_cmaph		(*(volatile uint8_t *)DMAC_CMAPH)
     80        1.6  tsutsui #define dmac_cmapl		(*(volatile uint8_t *)DMAC_CMAPL)
     81        1.1   tsubai 
     82        1.1   tsubai /*	status/control bit definition	*/
     83        1.1   tsubai #define	DM_TCZ			0x80
     84        1.1   tsubai #define	DM_A28			0x40
     85        1.1   tsubai #define	DM_AFIX			0x20
     86        1.1   tsubai #define	DM_APAD			0x10
     87        1.6  tsutsui #define	DM_ZINTEN		0x08
     88        1.6  tsutsui #define	DM_RST			0x04
     89        1.6  tsutsui #define	DM_MODE			0x02
     90        1.6  tsutsui #define DM_ENABLE		0x01
     91        1.1   tsubai 
     92        1.1   tsubai /*	general status bit definition	*/
     93        1.6  tsutsui #define CH_INT(x)		(uint8_t)(1 << (2 * x))
     94        1.6  tsutsui #define CH0_INT			0x01
     95        1.6  tsutsui #define CH1_INT			0x04
     96        1.1   tsubai #define CH2_INT			0x10
     97        1.1   tsubai #define CH3_INT			0x40
     98        1.1   tsubai 
     99        1.6  tsutsui #define CH_MRQ(x)		(uint8_t)(1 << (2 * x + 1))
    100        1.6  tsutsui #define CH0_MRQ			0x02
    101        1.6  tsutsui #define CH1_MRQ			0x08
    102        1.1   tsubai #define CH2_MRQ			0x20
    103        1.1   tsubai #define CH3_MRQ			0x80
    104        1.1   tsubai 
    105        1.1   tsubai /*	channel definition	*/
    106        1.1   tsubai #define	CH_SCSI			0
    107        1.1   tsubai #define	CH_FDC			1
    108        1.1   tsubai #define	CH_AUDIO		2
    109        1.1   tsubai #define	CH_VIDEO		3
    110        1.1   tsubai 
    111        1.1   tsubai /*	dma status		*/
    112        1.1   tsubai 
    113        1.6  tsutsui struct	dm_stat {
    114        1.6  tsutsui 	unsigned int dm_gstat;
    115        1.6  tsutsui 	unsigned int dm_cstat;
    116        1.6  tsutsui 	unsigned int dm_cctl;
    117        1.6  tsutsui 	unsigned int dm_tcnt;
    118        1.6  tsutsui 	unsigned int dm_offset;
    119        1.6  tsutsui 	unsigned int dm_tag;
    120        1.6  tsutsui 	unsigned int dm_width;
    121        1.6  tsutsui };
    122        1.1   tsubai 
    123  1.6.122.1   bouyer #define	DMAC_WAIT	DELAY(1)
    124        1.1   tsubai 
    125        1.1   tsubai #define PINTEN		0xbfc80001
    126        1.1   tsubai # define	DMA_INTEN	0x10
    127        1.1   tsubai #define PINTSTAT	0xbfc80003
    128