dmac_0448.h revision 1.4 1 /* $NetBSD: dmac_0448.h,v 1.4 2003/08/07 16:28:52 agc Exp $ */
2 /*
3 * Copyright (c) 1992, 1993
4 * The Regents of the University of California. All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * Sony Corp. and Kazumasa Utashiro of Software Research Associates, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. Neither the name of the University nor the names of its contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * from: $Hdr: dmac_0448.h,v 4.300 91/06/09 06:21:36 root Rel41 $ SONY
34 *
35 * @(#)dmac_0448.h 8.1 (Berkeley) 6/11/93
36 */
37
38 /*
39 * Copyright (c) 1989- by SONY Corporation.
40 */
41 /*
42 * dmac_0448.h
43 * DMAC L7A0448
44 */
45
46 /* dmac register base address */
47 #define DMAC_BASE 0xbfe00000
48
49 /* register definition */
50 #define DMAC_GSTAT (DMAC_BASE + 0xf)
51 #define DMAC_GSEL (DMAC_BASE + 0xe)
52
53 #define DMAC_CSTAT (DMAC_BASE + 0x2)
54 #define DMAC_CCTL (DMAC_BASE + 0x3)
55 #define DMAC_CTRCL (DMAC_BASE + 0x4)
56 #define DMAC_CTRCM (DMAC_BASE + 0x5)
57 #define DMAC_CTRCH (DMAC_BASE + 0x6)
58 #define DMAC_CTAG (DMAC_BASE + 0x7)
59 #define DMAC_CWID (DMAC_BASE + 0x8)
60 #define DMAC_COFSL (DMAC_BASE + 0x9)
61 #define DMAC_COFSH (DMAC_BASE + 0xa)
62 #define DMAC_CMAP (DMAC_BASE + 0xc)
63 #define DMAC_CMAPH (DMAC_BASE + 0xc)
64 #define DMAC_CMAPL (DMAC_BASE + 0xd)
65
66 #ifdef __mips__
67 #define VOLATILE volatile
68 #else
69 #define VOLATILE
70 #endif
71
72 #ifndef U_CHAR
73 #define U_CHAR unsigned VOLATILE char
74 #endif
75
76 #ifndef U_SHORT
77 #define U_SHORT unsigned VOLATILE short
78 #endif
79
80 #define dmac_gstat *(U_CHAR *)DMAC_GSTAT
81 #define dmac_gsel *(U_CHAR *)DMAC_GSEL
82
83 #define dmac_cstat *(U_CHAR *)DMAC_CSTAT
84 #define dmac_cctl *(U_CHAR *)DMAC_CCTL
85 #define dmac_ctrcl *(U_CHAR *)DMAC_CTRCL
86 #define dmac_ctrcm *(U_CHAR *)DMAC_CTRCM
87 #define dmac_ctrch *(U_CHAR *)DMAC_CTRCH
88 #define dmac_ctag *(U_CHAR *)DMAC_CTAG
89 #define dmac_cwid *(U_CHAR *)DMAC_CWID
90 #define dmac_cofsl *(U_CHAR *)DMAC_COFSL
91 #define dmac_cofsh *(U_CHAR *)DMAC_COFSH
92 #define dmac_cmap *(U_SHORT *)DMAC_CMAP
93 #define dmac_cmaph *(U_CHAR *)DMAC_CMAPH
94 #define dmac_cmapl *(U_CHAR *)DMAC_CMAPL
95
96 /* status/control bit definition */
97 #define DM_TCZ 0x80
98 #define DM_A28 0x40
99 #define DM_AFIX 0x20
100 #define DM_APAD 0x10
101 #define DM_ZINTEN 0x8
102 #define DM_RST 0x4
103 #define DM_MODE 0x2
104 #define DM_ENABLE 1
105
106 /* general status bit definition */
107 #define CH_INT(x) (u_char)(1 << (2 * x))
108 #define CH0_INT 1
109 #define CH1_INT 4
110 #define CH2_INT 0x10
111 #define CH3_INT 0x40
112
113 #define CH_MRQ(x) (u_char)(1 << (2 * x + 1))
114 #define CH0_MRQ 2
115 #define CH1_MRQ 8
116 #define CH2_MRQ 0x20
117 #define CH3_MRQ 0x80
118
119 /* channel definition */
120 #define CH_SCSI 0
121 #define CH_FDC 1
122 #define CH_AUDIO 2
123 #define CH_VIDEO 3
124
125 /* dma status */
126
127 struct dm_stat {
128 unsigned int dm_gstat;
129 unsigned int dm_cstat;
130 unsigned int dm_cctl;
131 unsigned int dm_tcnt;
132 unsigned int dm_offset;
133 unsigned int dm_tag;
134 unsigned int dm_width;
135 } ;
136
137 #define DMAC_WAIT nops(10)
138
139 #define PINTEN 0xbfc80001
140 # define DMA_INTEN 0x10
141 #define PINTSTAT 0xbfc80003
142