zs.c revision 1.2
1 /* $NetBSD: zs.c,v 1.2 1998/06/05 14:19:22 tsubai Exp $ */ 2 3 /*- 4 * Copyright (c) 1996 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Gordon W. Ross. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Zilog Z8530 Dual UART driver (machine-dependent part) 41 * 42 * Runs two serial lines per chip using slave drivers. 43 * Plain tty/async lines use the zs_async slave. 44 * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves. 45 */ 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/conf.h> 50 #include <sys/device.h> 51 #include <sys/file.h> 52 #include <sys/ioctl.h> 53 #include <sys/kernel.h> 54 #include <sys/proc.h> 55 #include <sys/tty.h> 56 #include <sys/time.h> 57 #include <sys/syslog.h> 58 59 #include <machine/autoconf.h> 60 #include <machine/cpu.h> 61 #include <machine/adrsmap.h> 62 #include <machine/z8530var.h> 63 64 #include <dev/cons.h> 65 #include <dev/ic/z8530reg.h> 66 67 #include "zsc.h" /* NZSC */ 68 #define NZS NZSC 69 70 /* Make life easier for the initialized arrays here. */ 71 #if NZS < 2 72 #undef NZS 73 #define NZS 2 74 #endif 75 76 extern void Debugger __P((void)); 77 78 /* 79 * Some warts needed by z8530tty.c - 80 * The default parity REALLY needs to be the same as the PROM uses, 81 * or you can not see messages done with printf during boot-up... 82 */ 83 int zs_def_cflag = (CREAD | CS8 | HUPCL); 84 int zs_major = 1; 85 86 /* 87 * The news3400 provides a 4.9152 MHz clock to the ZS chips. 88 */ 89 #define PCLK1 (9600 * 512) /* PCLK pin input clock rate */ 90 #define PCLK2 (7200 * 512) 91 92 /* 93 * Define interrupt levels. 94 */ 95 #define ZSHARD_PRI 64 96 97 #define ZS_DELAY() delay(2) 98 99 /* The layout of this is hardware-dependent (padding, order). */ 100 struct zschan { 101 volatile u_char zc_csr; /* ctrl,status, and indirect access */ 102 volatile u_char zc_data; /* data */ 103 }; 104 struct zsdevice { 105 /* Yes, they are backwards. */ 106 struct zschan zs_chan_b; 107 struct zschan zs_chan_a; 108 }; 109 110 static struct zsdevice *zsaddr[NZS]; 111 112 /* Flags from cninit() */ 113 static int zs_hwflags[NZS][2]; 114 115 /* Default speed for all channels */ 116 static int zs_defspeed = 9600; 117 118 static u_char zs_init_reg[16] = { 119 0, /* 0: CMD (reset, etc.) */ 120 0, /* 1: No interrupts yet. */ 121 ZSHARD_PRI, /* IVECT */ 122 ZSWR3_RX_8 | ZSWR3_RX_ENABLE, 123 ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP, 124 ZSWR5_TX_8 | ZSWR5_TX_ENABLE, 125 0, /* 6: TXSYNC/SYNCLO */ 126 0, /* 7: RXSYNC/SYNCHI */ 127 0, /* 8: alias for data port */ 128 ZSWR9_MASTER_IE, 129 0, /*10: Misc. TX/RX control bits */ 130 ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD, 131 14, /*12: BAUDLO (default=9600) */ 132 0, /*13: BAUDHI (default=9600) */ 133 ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK, 134 ZSWR15_BREAK_IE | ZSWR15_DCD_IE, 135 }; 136 137 138 struct zschan * 139 zs_get_chan_addr(zs_unit, channel) 140 int zs_unit, channel; 141 { 142 struct zsdevice *addr; 143 struct zschan *zc; 144 145 if (zs_unit >= NZS) 146 return NULL; 147 addr = zsaddr[zs_unit]; 148 if (addr == NULL) 149 return NULL; 150 if (channel == 0) { 151 zc = &addr->zs_chan_a; 152 } else { 153 zc = &addr->zs_chan_b; 154 } 155 return (zc); 156 } 157 158 159 /**************************************************************** 160 * Autoconfig 161 ****************************************************************/ 162 163 /* Definition of the driver for autoconfig. */ 164 static int zs_match __P((struct device *, struct cfdata *, void *)); 165 static void zs_attach __P((struct device *, struct device *, void *)); 166 static int zs_print __P((void *, const char *name)); 167 168 struct cfattach zsc_ca = { 169 sizeof(struct zsc_softc), zs_match, zs_attach 170 }; 171 172 extern struct cfdriver zsc_cd; 173 174 static void zshard __P((void *)); 175 static void zssoft __P((void *)); 176 static int zs_get_speed __P((struct zs_chanstate *)); 177 178 179 /* 180 * Is the zs chip present? 181 */ 182 static int 183 zs_match(parent, cf, aux) 184 struct device *parent; 185 struct cfdata *cf; 186 void *aux; 187 { 188 struct confargs *ca = aux; 189 int unit = cf->cf_unit; 190 void *va; 191 192 if (strcmp(ca->ca_name, "zsc")) 193 return 0; 194 195 va = zsaddr[unit]; 196 if (va == NULL) 197 va = zsaddr[unit] = (void *)cf->cf_addr; 198 199 /* This returns -1 on a fault (bus error). */ 200 if (badaddr(va, 1)) 201 return 0; 202 203 return 1; 204 } 205 206 /* 207 * Attach a found zs. 208 * 209 * Match slave number to zs unit number, so that misconfiguration will 210 * not set up the keyboard as ttya, etc. 211 */ 212 static void 213 zs_attach(parent, self, aux) 214 struct device *parent; 215 struct device *self; 216 void *aux; 217 { 218 struct zsc_softc *zsc = (void *) self; 219 /* struct confargs *ca = aux; */ 220 struct zsc_attach_args zsc_args; 221 volatile struct zschan *zc; 222 struct zs_chanstate *cs; 223 int s, zs_unit, channel; 224 static int didintr; 225 226 zs_unit = zsc->zsc_dev.dv_unit; 227 228 printf("\n"); 229 230 /* 231 * Initialize software state for each channel. 232 */ 233 for (channel = 0; channel < 2; channel++) { 234 zsc_args.channel = channel; 235 zsc_args.hwflags = zs_hwflags[zs_unit][channel]; 236 cs = &zsc->zsc_cs_store[channel]; 237 zsc->zsc_cs[channel] = cs; 238 239 cs->cs_channel = channel; 240 cs->cs_private = NULL; 241 cs->cs_ops = &zsops_null; 242 if (zs_unit == 0) 243 cs->cs_brg_clk = PCLK1 / 16; 244 else 245 cs->cs_brg_clk = PCLK2 / 16; 246 247 zc = zs_get_chan_addr(zs_unit, channel); 248 cs->cs_reg_csr = &zc->zc_csr; 249 cs->cs_reg_data = &zc->zc_data; 250 251 bcopy(zs_init_reg, cs->cs_creg, 16); 252 bcopy(zs_init_reg, cs->cs_preg, 16); 253 254 /* XXX: Get these from the EEPROM instead? */ 255 /* XXX: See the mvme167 code. Better. */ 256 if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE) 257 cs->cs_defspeed = zs_get_speed(cs); 258 else 259 cs->cs_defspeed = zs_defspeed; 260 cs->cs_defcflag = zs_def_cflag; 261 262 /* Make these correspond to cs_defcflag (-crtscts) */ 263 cs->cs_rr0_dcd = ZSRR0_DCD; 264 cs->cs_rr0_cts = 0; 265 cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS; 266 cs->cs_wr5_rts = 0; 267 268 /* 269 * Clear the master interrupt enable. 270 * The INTENA is common to both channels, 271 * so just do it on the A channel. 272 */ 273 if (channel == 0) { 274 zs_write_reg(cs, 9, 0); 275 } 276 277 /* 278 * Look for a child driver for this channel. 279 * The child attach will setup the hardware. 280 */ 281 if (!config_found(self, (void *)&zsc_args, zs_print)) { 282 /* No sub-driver. Just reset it. */ 283 u_char reset = (channel == 0) ? 284 ZSWR9_A_RESET : ZSWR9_B_RESET; 285 s = splhigh(); 286 zs_write_reg(cs, 9, reset); 287 splx(s); 288 } 289 } 290 291 /* 292 * Now safe to install interrupt handlers. Note the arguments 293 * to the interrupt handlers aren't used. Note, we only do this 294 * once since both SCCs interrupt at the same level and vector. 295 */ 296 if (!didintr) { 297 didintr = 1; 298 #if 0 299 isr_add_autovect(zssoft, NULL, ZSSOFT_PRI); 300 isr_add_autovect(zshard, NULL, ca->ca_intpri); 301 #endif 302 } 303 /* XXX; evcnt_attach() ? */ 304 305 /* 306 * Set the master interrupt enable and interrupt vector. 307 * (common to both channels, do it on A) 308 */ 309 cs = zsc->zsc_cs[0]; 310 s = splhigh(); 311 /* interrupt vector */ 312 zs_write_reg(cs, 2, zs_init_reg[2]); 313 /* master interrupt control (enable) */ 314 zs_write_reg(cs, 9, zs_init_reg[9]); 315 splx(s); 316 } 317 318 static int 319 zs_print(aux, name) 320 void *aux; 321 const char *name; 322 { 323 struct zsc_attach_args *args = aux; 324 325 if (name != NULL) 326 printf("%s: ", name); 327 328 if (args->channel != -1) 329 printf(" channel %d", args->channel); 330 331 return UNCONF; 332 } 333 334 static volatile int zssoftpending; 335 336 /* 337 * Our ZS chips all share a common, autovectored interrupt, 338 * so we have to look at all of them on each interrupt. 339 */ 340 static void 341 zshard(arg) 342 void *arg; 343 { 344 register struct zsc_softc *zsc; 345 register int unit, rval, softreq; 346 347 rval = softreq = 0; 348 for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) { 349 zsc = zsc_cd.cd_devs[unit]; 350 if (zsc == NULL) 351 continue; 352 rval |= zsc_intr_hard(zsc); 353 softreq |= zsc->zsc_cs[0]->cs_softreq; 354 softreq |= zsc->zsc_cs[1]->cs_softreq; 355 } 356 357 /* We are at splzs here, so no need to lock. */ 358 if (softreq && (zssoftpending == 0)) { 359 zssoftpending = 1; 360 zssoft(arg); /*isr_soft_request(ZSSOFT_PRI);*/ 361 } 362 return; 363 } 364 365 /* 366 * Similar scheme as for zshard (look at all of them) 367 */ 368 static void 369 zssoft(arg) 370 void *arg; 371 { 372 register struct zsc_softc *zsc; 373 register int s, unit; 374 375 /* This is not the only ISR on this IPL. */ 376 if (zssoftpending == 0) 377 return; 378 379 /* 380 * The soft intr. bit will be set by zshard only if 381 * the variable zssoftpending is zero. The order of 382 * these next two statements prevents our clearing 383 * the soft intr bit just after zshard has set it. 384 */ 385 /*isr_soft_clear(ZSSOFT_PRI);*/ 386 /*zssoftpending = 0;*/ 387 388 /* Make sure we call the tty layer at spltty. */ 389 s = spltty(); 390 for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) { 391 zsc = zsc_cd.cd_devs[unit]; 392 if (zsc == NULL) 393 continue; 394 (void) zsc_intr_soft(zsc); 395 } 396 splx(s); 397 zssoftpending = 0; 398 return; 399 } 400 401 402 /* 403 * Compute the current baud rate given a ZS channel. 404 */ 405 static int 406 zs_get_speed(cs) 407 struct zs_chanstate *cs; 408 { 409 int tconst; 410 411 tconst = zs_read_reg(cs, 12); 412 tconst |= zs_read_reg(cs, 13) << 8; 413 return (TCONST_TO_BPS(cs->cs_brg_clk, tconst)); 414 } 415 416 /* 417 * MD functions for setting the baud rate and control modes. 418 */ 419 int 420 zs_set_speed(cs, bps) 421 struct zs_chanstate *cs; 422 int bps; /* bits per second */ 423 { 424 int tconst, real_bps; 425 426 if (bps == 0) 427 return (0); 428 429 #ifdef DIAGNOSTIC 430 if (cs->cs_brg_clk == 0) 431 panic("zs_set_speed"); 432 #endif 433 434 tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps); 435 if (tconst < 0) 436 return (EINVAL); 437 438 /* Convert back to make sure we can do it. */ 439 real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst); 440 441 /* XXX - Allow some tolerance here? */ 442 if (real_bps != bps) 443 return (EINVAL); 444 445 cs->cs_preg[12] = tconst; 446 cs->cs_preg[13] = tconst >> 8; 447 448 /* Caller will stuff the pending registers. */ 449 return (0); 450 } 451 452 int 453 zs_set_modes(cs, cflag) 454 struct zs_chanstate *cs; 455 int cflag; /* bits per second */ 456 { 457 int s; 458 459 /* 460 * Output hardware flow control on the chip is horrendous: 461 * if carrier detect drops, the receiver is disabled, and if 462 * CTS drops, the transmitter is stoped IN MID CHARACTER! 463 * Therefore, NEVER set the HFC bit, and instead use the 464 * status interrupt to detect CTS changes. 465 */ 466 s = splzs(); 467 if ((cflag & (CLOCAL | MDMBUF)) != 0) 468 cs->cs_rr0_dcd = 0; 469 else 470 cs->cs_rr0_dcd = ZSRR0_DCD; 471 if ((cflag & CRTSCTS) != 0) { 472 cs->cs_wr5_dtr = ZSWR5_DTR; 473 cs->cs_wr5_rts = ZSWR5_RTS; 474 cs->cs_rr0_cts = ZSRR0_CTS; 475 } else if ((cflag & MDMBUF) != 0) { 476 cs->cs_wr5_dtr = 0; 477 cs->cs_wr5_rts = ZSWR5_DTR; 478 cs->cs_rr0_cts = ZSRR0_DCD; 479 } else { 480 cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS; 481 cs->cs_wr5_rts = 0; 482 cs->cs_rr0_cts = 0; 483 } 484 splx(s); 485 486 /* Caller will stuff the pending registers. */ 487 return (0); 488 } 489 490 491 /* 492 * Read or write the chip with suitable delays. 493 */ 494 495 u_char 496 zs_read_reg(cs, reg) 497 struct zs_chanstate *cs; 498 u_char reg; 499 { 500 u_char val; 501 502 *cs->cs_reg_csr = reg; 503 ZS_DELAY(); 504 val = *cs->cs_reg_csr; 505 ZS_DELAY(); 506 return val; 507 } 508 509 void 510 zs_write_reg(cs, reg, val) 511 struct zs_chanstate *cs; 512 u_char reg, val; 513 { 514 *cs->cs_reg_csr = reg; 515 ZS_DELAY(); 516 *cs->cs_reg_csr = val; 517 ZS_DELAY(); 518 } 519 520 u_char zs_read_csr(cs) 521 struct zs_chanstate *cs; 522 { 523 register u_char val; 524 525 val = *cs->cs_reg_csr; 526 ZS_DELAY(); 527 return val; 528 } 529 530 void zs_write_csr(cs, val) 531 struct zs_chanstate *cs; 532 u_char val; 533 { 534 *cs->cs_reg_csr = val; 535 ZS_DELAY(); 536 } 537 538 u_char zs_read_data(cs) 539 struct zs_chanstate *cs; 540 { 541 register u_char val; 542 543 val = *cs->cs_reg_data; 544 ZS_DELAY(); 545 return val; 546 } 547 548 void zs_write_data(cs, val) 549 struct zs_chanstate *cs; 550 u_char val; 551 { 552 *cs->cs_reg_data = val; 553 ZS_DELAY(); 554 } 555 556 void 557 zs_abort(cs) 558 struct zs_chanstate *cs; 559 { 560 Debugger(); 561 } 562 563 /* 564 * Polled input char. 565 */ 566 int 567 zs_getc(arg) 568 void *arg; 569 { 570 register volatile struct zschan *zc = arg; 571 register int s, c, rr0; 572 573 s = splhigh(); 574 /* Wait for a character to arrive. */ 575 do { 576 rr0 = zc->zc_csr; 577 ZS_DELAY(); 578 } while ((rr0 & ZSRR0_RX_READY) == 0); 579 580 c = zc->zc_data; 581 ZS_DELAY(); 582 splx(s); 583 584 /* 585 * This is used by the kd driver to read scan codes, 586 * so don't translate '\r' ==> '\n' here... 587 */ 588 return (c); 589 } 590 591 /* 592 * Polled output char. 593 */ 594 void 595 zs_putc(arg, c) 596 void *arg; 597 int c; 598 { 599 register volatile struct zschan *zc = arg; 600 register int s, rr0; 601 602 s = splhigh(); 603 /* Wait for transmitter to become ready. */ 604 do { 605 rr0 = zc->zc_csr; 606 ZS_DELAY(); 607 } while ((rr0 & ZSRR0_TX_READY) == 0); 608 609 zc->zc_data = c; 610 ZS_DELAY(); 611 splx(s); 612 } 613 614 /*****************************************************************/ 615 616 static void zscnprobe __P((struct consdev *)); 617 static void zscninit __P((struct consdev *)); 618 static int zscngetc __P((dev_t)); 619 static void zscnputc __P((dev_t, int)); 620 static void zscnpollc __P((dev_t, int)); 621 622 struct consdev consdev_zs = { 623 zscnprobe, 624 zscninit, 625 zscngetc, 626 zscnputc, 627 zscnpollc 628 }; 629 630 void 631 zscnprobe(cn) 632 struct consdev *cn; 633 { 634 } 635 636 void 637 zscninit(cn) 638 struct consdev *cn; 639 { 640 cn->cn_dev = makedev(zs_major, 0); 641 cn->cn_pri = CN_REMOTE; 642 zs_hwflags[0][0] = ZS_HWFLAG_CONSOLE; 643 } 644 645 int 646 zscngetc(dev) 647 dev_t dev; 648 { 649 return zs_getc(SCCPORT0A); 650 } 651 652 void 653 zscnputc(dev, c) 654 dev_t dev; 655 int c; 656 { 657 zs_putc(SCCPORT0A, c); 658 } 659 660 void 661 zscnpollc(dev, on) 662 dev_t dev; 663 int on; 664 { 665 } 666 667 /* 668 * ZS vector interrupt service routine. 669 */ 670 void 671 zs_intr() 672 { 673 int vec; 674 675 vec = *(volatile u_char *)SCCVECT; 676 zshard((void *)vec); /* XXX vec is not used */ 677 } 678
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