zs.c revision 1.22 1 /* $NetBSD: zs.c,v 1.22 2007/11/26 23:29:37 ad Exp $ */
2
3 /*-
4 * Copyright (c) 1996 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Gordon W. Ross.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 /*
40 * Zilog Z8530 Dual UART driver (machine-dependent part)
41 *
42 * Runs two serial lines per chip using slave drivers.
43 * Plain tty/async lines use the zs_async slave.
44 * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
45 */
46
47 #include <sys/cdefs.h>
48 __KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.22 2007/11/26 23:29:37 ad Exp $");
49
50 #include "opt_ddb.h"
51
52 #include <sys/param.h>
53 #include <sys/device.h>
54 #include <sys/tty.h>
55 #include <sys/systm.h>
56 #include <sys/cpu.h>
57 #include <sys/intr.h>
58
59 #include <machine/adrsmap.h>
60 #include <machine/z8530var.h>
61
62 #include <dev/ic/z8530reg.h>
63
64 #define ZS_DELAY() (*zs_delay)()
65
66 extern struct cfdriver zsc_cd;
67
68 /*
69 * Some warts needed by z8530tty.c -
70 * The default parity REALLY needs to be the same as the PROM uses,
71 * or you can not see messages done with printf during boot-up...
72 */
73 int zs_def_cflag = (CREAD | CS8 | HUPCL);
74
75 int
76 zs_print(void *aux, const char *name)
77 {
78 struct zsc_attach_args *args = aux;
79
80 if (name != NULL)
81 aprint_normal("%s: ", name);
82
83 if (args->channel != -1)
84 aprint_normal(" channel %d", args->channel);
85
86 return UNCONF;
87 }
88
89 /*
90 * Our ZS chips all share a common, autovectored interrupt,
91 * so we have to look at all of them on each interrupt.
92 */
93 int
94 zshard(void *arg)
95 {
96 struct zsc_softc *zsc;
97 int unit, rval, softreq;
98
99 rval = 0;
100 for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
101 zsc = zsc_cd.cd_devs[unit];
102 if (zsc == NULL)
103 continue;
104 rval |= zsc_intr_hard(zsc);
105 softreq = zsc->zsc_cs[0]->cs_softreq;
106 softreq |= zsc->zsc_cs[1]->cs_softreq;
107 if (softreq)
108 softint_schedule(zsc->zsc_si);
109 }
110
111 return rval;
112 }
113
114 /*
115 * Similar scheme as for zshard (look at all of them)
116 */
117 void
118 zssoft(void *arg)
119 {
120 struct zsc_softc *zsc;
121 int s, unit;
122
123 /* Make sure we call the tty layer at spltty. */
124 s = spltty();
125 for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
126 zsc = zsc_cd.cd_devs[unit];
127 if (zsc == NULL)
128 continue;
129 (void)zsc_intr_soft(zsc);
130 }
131 splx(s);
132 }
133
134 /*
135 * Compute the current baud rate given a ZS channel.
136 */
137 int
138 zs_get_speed(struct zs_chanstate *cs)
139 {
140 int tconst;
141
142 tconst = zs_read_reg(cs, 12);
143 tconst |= zs_read_reg(cs, 13) << 8;
144 return TCONST_TO_BPS(cs->cs_brg_clk, tconst);
145 }
146
147 /*
148 * MD functions for setting the baud rate and control modes.
149 */
150 int
151 zs_set_speed(struct zs_chanstate *cs, int bps)
152 {
153 int tconst, real_bps;
154
155 if (bps == 0)
156 return 0;
157
158 #ifdef DIAGNOSTIC
159 if (cs->cs_brg_clk == 0)
160 panic("zs_set_speed");
161 #endif
162
163 tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps);
164 if (tconst < 0)
165 return EINVAL;
166
167 /* Convert back to make sure we can do it. */
168 real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst);
169
170 /* XXX - Allow some tolerance here? */
171 if (real_bps != bps)
172 return EINVAL;
173
174 cs->cs_preg[12] = tconst;
175 cs->cs_preg[13] = tconst >> 8;
176
177 /* Caller will stuff the pending registers. */
178 return 0;
179 }
180
181 int
182 zs_set_modes(struct zs_chanstate *cs, int cflag)
183 {
184 int s;
185
186 /*
187 * Output hardware flow control on the chip is horrendous:
188 * if carrier detect drops, the receiver is disabled, and if
189 * CTS drops, the transmitter is stoped IN MID CHARACTER!
190 * Therefore, NEVER set the HFC bit, and instead use the
191 * status interrupt to detect CTS changes.
192 */
193 s = splserial();
194 cs->cs_rr0_pps = 0;
195 if ((cflag & (CLOCAL | MDMBUF)) != 0) {
196 cs->cs_rr0_dcd = 0;
197 if ((cflag & MDMBUF) == 0)
198 cs->cs_rr0_pps = ZSRR0_DCD;
199 } else
200 cs->cs_rr0_dcd = ZSRR0_DCD;
201 if ((cflag & CRTSCTS) != 0) {
202 cs->cs_wr5_dtr = ZSWR5_DTR;
203 cs->cs_wr5_rts = ZSWR5_RTS;
204 cs->cs_rr0_cts = ZSRR0_CTS;
205 } else if ((cflag & MDMBUF) != 0) {
206 cs->cs_wr5_dtr = 0;
207 cs->cs_wr5_rts = ZSWR5_DTR;
208 cs->cs_rr0_cts = ZSRR0_DCD;
209 } else {
210 cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
211 cs->cs_wr5_rts = 0;
212 cs->cs_rr0_cts = 0;
213 }
214 splx(s);
215
216 /* Caller will stuff the pending registers. */
217 return 0;
218 }
219
220 /*
221 * Read or write the chip with suitable delays.
222 */
223
224 u_char
225 zs_read_reg(struct zs_chanstate *cs, u_char reg)
226 {
227 u_char val;
228
229 *cs->cs_reg_csr = reg;
230 ZS_DELAY();
231 val = *cs->cs_reg_csr;
232 ZS_DELAY();
233 return val;
234 }
235
236 void
237 zs_write_reg(struct zs_chanstate *cs, u_char reg, u_char val)
238 {
239
240 *cs->cs_reg_csr = reg;
241 ZS_DELAY();
242 *cs->cs_reg_csr = val;
243 ZS_DELAY();
244 }
245
246 u_char zs_read_csr(struct zs_chanstate *cs)
247 {
248 u_char val;
249
250 val = *cs->cs_reg_csr;
251 ZS_DELAY();
252 return val;
253 }
254
255 void zs_write_csr(struct zs_chanstate *cs, u_char val)
256 {
257
258 *cs->cs_reg_csr = val;
259 ZS_DELAY();
260 }
261
262 u_char zs_read_data(struct zs_chanstate *cs)
263 {
264 u_char val;
265
266 val = *cs->cs_reg_data;
267 ZS_DELAY();
268 return val;
269 }
270
271 void zs_write_data(struct zs_chanstate *cs, u_char val)
272 {
273
274 *cs->cs_reg_data = val;
275 ZS_DELAY();
276 }
277
278 void
279 zs_abort(struct zs_chanstate *cs)
280 {
281
282 #ifdef DDB
283 Debugger();
284 #endif
285 }
286