zs_hb.c revision 1.1
1 /* $NetBSD: zs_hb.c,v 1.1 1999/12/22 05:55:25 tsubai Exp $ */ 2 3 /*- 4 * Copyright (c) 1996 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Gordon W. Ross. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Zilog Z8530 Dual UART driver (machine-dependent part) 41 * 42 * Runs two serial lines per chip using slave drivers. 43 * Plain tty/async lines use the zs_async slave. 44 * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves. 45 */ 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/device.h> 50 #include <sys/tty.h> 51 52 #include <machine/adrsmap.h> 53 #include <machine/autoconf.h> 54 #include <machine/cpu.h> 55 #include <machine/z8530var.h> 56 57 #include <dev/cons.h> 58 #include <dev/ic/z8530reg.h> 59 60 #include "zsc.h" /* NZSC */ 61 #define NZS NZSC 62 63 /* Make life easier for the initialized arrays here. */ 64 #if NZS < 2 65 #undef NZS 66 #define NZS 2 67 #endif 68 69 /* 70 * The news3400 provides a 4.9152 MHz clock to the ZS chips. 71 */ 72 #define PCLK1 (9600 * 512) /* PCLK pin input clock rate */ 73 #define PCLK2 (9600 * 384) 74 75 /* 76 * Define interrupt levels. 77 */ 78 #define ZSHARD_PRI 64 79 80 #define ZS_DELAY() {(void)*(volatile char *)INTEN1; delay(2);} 81 82 /* The layout of this is hardware-dependent (padding, order). */ 83 struct zschan { 84 volatile u_char zc_csr; /* ctrl,status, and indirect access */ 85 volatile u_char zc_data; /* data */ 86 }; 87 struct zsdevice { 88 /* Yes, they are backwards. */ 89 struct zschan zs_chan_b; 90 struct zschan zs_chan_a; 91 }; 92 93 extern int zs_def_cflag; 94 extern void (*zs_delay) __P((void)); 95 96 static struct zsdevice *zsaddr[NZS]; 97 98 /* Flags from cninit() */ 99 static int zs_hwflags[NZS][2]; 100 101 /* Default speed for all channels */ 102 static int zs_defspeed = 9600; 103 104 static u_char zs_init_reg[16] = { 105 0, /* 0: CMD (reset, etc.) */ 106 0, /* 1: No interrupts yet. */ 107 ZSHARD_PRI, /* IVECT */ 108 ZSWR3_RX_8 | ZSWR3_RX_ENABLE, 109 ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP, 110 ZSWR5_TX_8 | ZSWR5_TX_ENABLE, 111 0, /* 6: TXSYNC/SYNCLO */ 112 0, /* 7: RXSYNC/SYNCHI */ 113 0, /* 8: alias for data port */ 114 ZSWR9_MASTER_IE, 115 0, /*10: Misc. TX/RX control bits */ 116 ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD, 117 ((PCLK1/32)/9600)-2, /*12: BAUDLO (default=9600) */ 118 0, /*13: BAUDHI (default=9600) */ 119 ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK, 120 ZSWR15_BREAK_IE, 121 }; 122 123 static struct zschan * zs_get_chan_addr __P((int, int)); 124 static void zs_hb_delay __P((void)); 125 static int zshard __P((void *)); 126 static void zssoft __P((void *)); 127 static int zs_getc __P((void *)); 128 static void zs_putc __P((void *, int)); 129 int zs_get_speed __P((struct zs_chanstate *)); 130 131 static struct zschan * 132 zs_get_chan_addr(zs_unit, channel) 133 int zs_unit, channel; 134 { 135 struct zsdevice *addr; 136 struct zschan *zc; 137 138 if (zs_unit >= NZS) 139 return NULL; 140 addr = zsaddr[zs_unit]; 141 if (addr == NULL) 142 return NULL; 143 if (channel == 0) { 144 zc = &addr->zs_chan_a; 145 } else { 146 zc = &addr->zs_chan_b; 147 } 148 return (zc); 149 } 150 151 void 152 zs_hb_delay() 153 { 154 ZS_DELAY(); 155 } 156 157 /**************************************************************** 158 * Autoconfig 159 ****************************************************************/ 160 161 /* Definition of the driver for autoconfig. */ 162 int zs_hb_match __P((struct device *, struct cfdata *, void *)); 163 void zs_hb_attach __P((struct device *, struct device *, void *)); 164 int zs_print __P((void *, const char *name)); 165 166 struct cfattach zsc_hb_ca = { 167 sizeof(struct zsc_softc), zs_hb_match, zs_hb_attach 168 }; 169 170 extern struct cfdriver zsc_cd; 171 172 /* 173 * Is the zs chip present? 174 */ 175 int 176 zs_hb_match(parent, cf, aux) 177 struct device *parent; 178 struct cfdata *cf; 179 void *aux; 180 { 181 struct confargs *ca = aux; 182 183 if (strcmp(ca->ca_name, "zsc")) 184 return 0; 185 186 /* This returns -1 on a fault (bus error). */ 187 if (badaddr((char *)cf->cf_addr, 1)) 188 return 0; 189 190 return 1; 191 } 192 193 /* 194 * Attach a found zs. 195 * 196 * Match slave number to zs unit number, so that misconfiguration will 197 * not set up the keyboard as ttya, etc. 198 */ 199 void 200 zs_hb_attach(parent, self, aux) 201 struct device *parent; 202 struct device *self; 203 void *aux; 204 { 205 struct zsc_softc *zsc = (void *)self; 206 /* struct confargs *ca = aux; */ 207 struct zsc_attach_args zsc_args; 208 volatile struct zschan *zc; 209 struct zs_chanstate *cs; 210 int s, zs_unit, channel, intlevel; 211 static int didintr; 212 213 zs_unit = zsc->zsc_dev.dv_unit; 214 intlevel = zsc->zsc_dev.dv_cfdata->cf_level; 215 zsaddr[zs_unit] = (void *)zsc->zsc_dev.dv_cfdata->cf_addr; 216 217 if (intlevel == -1) { 218 #if 0 219 printf(": interrupt level not configured\n"); 220 return; 221 #else 222 printf(": interrupt level not configured; using"); 223 intlevel = 1; 224 #endif 225 } 226 227 printf(" level %d\n", intlevel); 228 229 zs_delay = zs_hb_delay; 230 231 /* 232 * Initialize software state for each channel. 233 */ 234 for (channel = 0; channel < 2; channel++) { 235 zsc_args.channel = channel; 236 zsc_args.hwflags = zs_hwflags[zs_unit][channel]; 237 cs = &zsc->zsc_cs_store[channel]; 238 zsc->zsc_cs[channel] = cs; 239 240 cs->cs_channel = channel; 241 cs->cs_private = NULL; 242 cs->cs_ops = &zsops_null; 243 if (zs_unit == 0) 244 cs->cs_brg_clk = PCLK1 / 16; 245 else 246 cs->cs_brg_clk = PCLK2 / 16; 247 248 zc = zs_get_chan_addr(zs_unit, channel); 249 cs->cs_reg_csr = &zc->zc_csr; 250 cs->cs_reg_data = &zc->zc_data; 251 252 bcopy(zs_init_reg, cs->cs_creg, 16); 253 bcopy(zs_init_reg, cs->cs_preg, 16); 254 255 /* XXX: Get these from the EEPROM instead? */ 256 /* XXX: See the mvme167 code. Better. */ 257 if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE) 258 cs->cs_defspeed = zs_get_speed(cs); 259 else 260 cs->cs_defspeed = zs_defspeed; 261 cs->cs_defcflag = zs_def_cflag; 262 263 /* Make these correspond to cs_defcflag (-crtscts) */ 264 cs->cs_rr0_dcd = ZSRR0_DCD; 265 cs->cs_rr0_cts = 0; 266 cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS; 267 cs->cs_wr5_rts = 0; 268 269 /* 270 * Clear the master interrupt enable. 271 * The INTENA is common to both channels, 272 * so just do it on the A channel. 273 */ 274 if (channel == 0) { 275 zs_write_reg(cs, 9, 0); 276 } 277 278 /* 279 * Look for a child driver for this channel. 280 * The child attach will setup the hardware. 281 */ 282 if (!config_found(self, (void *)&zsc_args, zs_print)) { 283 /* No sub-driver. Just reset it. */ 284 u_char reset = (channel == 0) ? 285 ZSWR9_A_RESET : ZSWR9_B_RESET; 286 s = splhigh(); 287 zs_write_reg(cs, 9, reset); 288 splx(s); 289 } 290 } 291 292 /* 293 * Now safe to install interrupt handlers. Note the arguments 294 * to the interrupt handlers aren't used. Note, we only do this 295 * once since both SCCs interrupt at the same level and vector. 296 */ 297 if (!didintr) { 298 didintr = 1; 299 300 hb_intr_establish(intlevel, IPL_SERIAL, zshard, NULL); 301 } 302 /* XXX; evcnt_attach() ? */ 303 304 /* 305 * Set the master interrupt enable and interrupt vector. 306 * (common to both channels, do it on A) 307 */ 308 cs = zsc->zsc_cs[0]; 309 s = splhigh(); 310 /* interrupt vector */ 311 zs_write_reg(cs, 2, zs_init_reg[2]); 312 /* master interrupt control (enable) */ 313 zs_write_reg(cs, 9, zs_init_reg[9]); 314 splx(s); 315 } 316 317 static volatile int zssoftpending; 318 319 /* 320 * Our ZS chips all share a common, autovectored interrupt, 321 * so we have to look at all of them on each interrupt. 322 */ 323 static int 324 zshard(arg) 325 void *arg; 326 { 327 register struct zsc_softc *zsc; 328 register int unit, rval, softreq; 329 330 (void) *(volatile u_char *)SCCVECT; 331 332 rval = softreq = 0; 333 for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) { 334 zsc = zsc_cd.cd_devs[unit]; 335 if (zsc == NULL) 336 continue; 337 rval |= zsc_intr_hard(zsc); 338 softreq |= zsc->zsc_cs[0]->cs_softreq; 339 softreq |= zsc->zsc_cs[1]->cs_softreq; 340 } 341 342 /* We are at splzs here, so no need to lock. */ 343 if (softreq && (zssoftpending == 0)) { 344 zssoftpending = 1; 345 zssoft(arg); /*isr_soft_request(ZSSOFT_PRI);*/ 346 } 347 return rval; 348 } 349 350 /* 351 * Similar scheme as for zshard (look at all of them) 352 */ 353 static void 354 zssoft(arg) 355 void *arg; 356 { 357 register struct zsc_softc *zsc; 358 register int s, unit; 359 360 /* This is not the only ISR on this IPL. */ 361 if (zssoftpending == 0) 362 return; 363 364 /* 365 * The soft intr. bit will be set by zshard only if 366 * the variable zssoftpending is zero. The order of 367 * these next two statements prevents our clearing 368 * the soft intr bit just after zshard has set it. 369 */ 370 /*isr_soft_clear(ZSSOFT_PRI);*/ 371 /*zssoftpending = 0;*/ 372 373 /* Make sure we call the tty layer at spltty. */ 374 s = spltty(); 375 for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) { 376 zsc = zsc_cd.cd_devs[unit]; 377 if (zsc == NULL) 378 continue; 379 (void) zsc_intr_soft(zsc); 380 } 381 splx(s); 382 zssoftpending = 0; 383 return; 384 } 385 386 /* 387 * Polled input char. 388 */ 389 int 390 zs_getc(arg) 391 void *arg; 392 { 393 register volatile struct zschan *zc = arg; 394 register int s, c, rr0; 395 396 s = splhigh(); 397 /* Wait for a character to arrive. */ 398 do { 399 rr0 = zc->zc_csr; 400 ZS_DELAY(); 401 } while ((rr0 & ZSRR0_RX_READY) == 0); 402 403 c = zc->zc_data; 404 ZS_DELAY(); 405 splx(s); 406 407 /* 408 * This is used by the kd driver to read scan codes, 409 * so don't translate '\r' ==> '\n' here... 410 */ 411 return (c); 412 } 413 414 /* 415 * Polled output char. 416 */ 417 void 418 zs_putc(arg, c) 419 void *arg; 420 int c; 421 { 422 register volatile struct zschan *zc = arg; 423 register int s, rr0; 424 425 s = splhigh(); 426 /* Wait for transmitter to become ready. */ 427 do { 428 rr0 = zc->zc_csr; 429 ZS_DELAY(); 430 } while ((rr0 & ZSRR0_TX_READY) == 0); 431 432 zc->zc_data = c; 433 ZS_DELAY(); 434 splx(s); 435 } 436 437 /*****************************************************************/ 438 439 static void zscnprobe __P((struct consdev *)); 440 static void zscninit __P((struct consdev *)); 441 static int zscngetc __P((dev_t)); 442 static void zscnputc __P((dev_t, int)); 443 static void zscnpollc __P((dev_t, int)); 444 445 struct consdev consdev_zs = { 446 zscnprobe, 447 zscninit, 448 zscngetc, 449 zscnputc, 450 zscnpollc 451 }; 452 453 void 454 zscnprobe(cn) 455 struct consdev *cn; 456 { 457 } 458 459 void 460 zscninit(cn) 461 struct consdev *cn; 462 { 463 cn->cn_dev = makedev(zs_major, 0); 464 cn->cn_pri = CN_REMOTE; 465 zs_hwflags[0][0] = ZS_HWFLAG_CONSOLE; 466 } 467 468 int 469 zscngetc(dev) 470 dev_t dev; 471 { 472 return zs_getc((void *)SCCPORT0A); 473 } 474 475 void 476 zscnputc(dev, c) 477 dev_t dev; 478 int c; 479 { 480 zs_putc((void *)SCCPORT0A, c); 481 } 482 483 void 484 zscnpollc(dev, on) 485 dev_t dev; 486 int on; 487 { 488 } 489
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