zs_hb.c revision 1.11
1 /* $NetBSD: zs_hb.c,v 1.11 2003/04/26 18:43:20 tsutsui Exp $ */ 2 3 /*- 4 * Copyright (c) 1996 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Gordon W. Ross. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Zilog Z8530 Dual UART driver (machine-dependent part) 41 * 42 * Runs two serial lines per chip using slave drivers. 43 * Plain tty/async lines use the zs_async slave. 44 * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves. 45 */ 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/device.h> 50 #include <sys/tty.h> 51 #include <sys/conf.h> 52 53 #include <machine/adrsmap.h> 54 #include <machine/autoconf.h> 55 #include <machine/cpu.h> 56 #include <machine/z8530var.h> 57 58 #include <dev/cons.h> 59 #include <dev/ic/z8530reg.h> 60 61 #include "zsc.h" /* NZSC */ 62 #define NZS NZSC 63 64 /* Make life easier for the initialized arrays here. */ 65 #if NZS < 2 66 #undef NZS 67 #define NZS 2 68 #endif 69 70 #define ZSCFLAG_EX 0x01 /* expansion board */ 71 72 /* 73 * The news3400 provides a 4.9152 MHz clock to the ZS chips. 74 */ 75 #define PCLK (9600 * 512) /* PCLK pin input clock rate */ 76 #define PCLK_EX (9600 * 384) 77 78 /* 79 * Define interrupt levels. 80 */ 81 #define ZSHARD_PRI 64 82 83 #define ZS_DELAY() {(void)*(volatile char *)INTEN1; delay(2);} 84 85 /* The layout of this is hardware-dependent (padding, order). */ 86 struct zschan { 87 volatile u_char zc_csr; /* ctrl,status, and indirect access */ 88 volatile u_char zc_data; /* data */ 89 }; 90 struct zsdevice { 91 /* Yes, they are backwards. */ 92 struct zschan zs_chan_b; 93 struct zschan zs_chan_a; 94 }; 95 96 extern int zs_def_cflag; 97 98 static struct zsdevice *zsaddr[NZS]; 99 100 /* Flags from cninit() */ 101 static int zs_hwflags[NZS][2]; 102 103 /* Default speed for all channels */ 104 static int zs_defspeed = 9600; 105 106 static u_char zs_init_reg[16] = { 107 0, /* 0: CMD (reset, etc.) */ 108 0, /* 1: No interrupts yet. */ 109 ZSHARD_PRI, /* IVECT */ 110 ZSWR3_RX_8 | ZSWR3_RX_ENABLE, 111 ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP, 112 ZSWR5_TX_8 | ZSWR5_TX_ENABLE, 113 0, /* 6: TXSYNC/SYNCLO */ 114 0, /* 7: RXSYNC/SYNCHI */ 115 0, /* 8: alias for data port */ 116 ZSWR9_MASTER_IE, 117 0, /*10: Misc. TX/RX control bits */ 118 ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD, 119 ((PCLK/32)/9600)-2, /*12: BAUDLO (default=9600) */ 120 0, /*13: BAUDHI (default=9600) */ 121 ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK, 122 ZSWR15_BREAK_IE, 123 }; 124 125 static struct zschan * zs_get_chan_addr __P((int, int)); 126 static void zs_hb_delay __P((void)); 127 static int zshard_hb __P((void *)); 128 static int zs_getc __P((void *)); 129 static void zs_putc __P((void *, int)); 130 131 struct zschan * 132 zs_get_chan_addr(zs_unit, channel) 133 int zs_unit, channel; 134 { 135 struct zsdevice *addr; 136 struct zschan *zc; 137 138 if (zs_unit >= NZS) 139 return NULL; 140 addr = zsaddr[zs_unit]; 141 if (addr == NULL) 142 return NULL; 143 if (channel == 0) { 144 zc = &addr->zs_chan_a; 145 } else { 146 zc = &addr->zs_chan_b; 147 } 148 return (zc); 149 } 150 151 static void 152 zs_hb_delay() 153 { 154 155 ZS_DELAY(); 156 } 157 158 /**************************************************************** 159 * Autoconfig 160 ****************************************************************/ 161 162 /* Definition of the driver for autoconfig. */ 163 int zs_hb_match __P((struct device *, struct cfdata *, void *)); 164 void zs_hb_attach __P((struct device *, struct device *, void *)); 165 166 CFATTACH_DECL(zsc_hb, sizeof(struct zsc_softc), 167 zs_hb_match, zs_hb_attach, NULL, NULL); 168 169 /* 170 * Is the zs chip present? 171 */ 172 int 173 zs_hb_match(parent, cf, aux) 174 struct device *parent; 175 struct cfdata *cf; 176 void *aux; 177 { 178 struct confargs *ca = aux; 179 180 if (strcmp(ca->ca_name, "zsc")) 181 return 0; 182 183 /* This returns -1 on a fault (bus error). */ 184 if (badaddr((char *)cf->cf_addr, 1)) 185 return 0; 186 187 return 1; 188 } 189 190 /* 191 * Attach a found zs. 192 * 193 * Match slave number to zs unit number, so that misconfiguration will 194 * not set up the keyboard as ttya, etc. 195 */ 196 void 197 zs_hb_attach(parent, self, aux) 198 struct device *parent; 199 struct device *self; 200 void *aux; 201 { 202 struct zsc_softc *zsc = (void *)self; 203 /* struct confargs *ca = aux; */ 204 struct zsc_attach_args zsc_args; 205 volatile struct zschan *zc; 206 struct zs_chanstate *cs; 207 int s, zs_unit, channel, intlevel; 208 static int didintr; 209 210 zs_unit = zsc->zsc_dev.dv_unit; 211 intlevel = zsc->zsc_dev.dv_cfdata->cf_level; 212 zsaddr[zs_unit] = (void *)zsc->zsc_dev.dv_cfdata->cf_addr; 213 214 if (intlevel == -1) { 215 #if 0 216 printf(": interrupt level not configured\n"); 217 return; 218 #else 219 printf(": interrupt level not configured; using"); 220 intlevel = 1; 221 #endif 222 } 223 224 printf(" level %d\n", intlevel); 225 226 zs_delay = zs_hb_delay; 227 228 /* 229 * Initialize software state for each channel. 230 */ 231 for (channel = 0; channel < 2; channel++) { 232 zsc_args.channel = channel; 233 zsc_args.hwflags = zs_hwflags[zs_unit][channel]; 234 cs = &zsc->zsc_cs_store[channel]; 235 zsc->zsc_cs[channel] = cs; 236 237 simple_lock_init(&cs->cs_lock); 238 cs->cs_channel = channel; 239 cs->cs_private = NULL; 240 cs->cs_ops = &zsops_null; 241 if ((zsc->zsc_dev.dv_cfdata->cf_flags & ZSCFLAG_EX) == 0) 242 cs->cs_brg_clk = PCLK / 16; 243 else 244 cs->cs_brg_clk = PCLK_EX / 16; 245 246 zc = zs_get_chan_addr(zs_unit, channel); 247 cs->cs_reg_csr = &zc->zc_csr; 248 cs->cs_reg_data = &zc->zc_data; 249 250 bcopy(zs_init_reg, cs->cs_creg, 16); 251 bcopy(zs_init_reg, cs->cs_preg, 16); 252 253 /* XXX: Get these from the EEPROM instead? */ 254 /* XXX: See the mvme167 code. Better. */ 255 if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE) 256 cs->cs_defspeed = zs_get_speed(cs); 257 else 258 cs->cs_defspeed = zs_defspeed; 259 cs->cs_defcflag = zs_def_cflag; 260 261 /* Make these correspond to cs_defcflag (-crtscts) */ 262 cs->cs_rr0_dcd = ZSRR0_DCD; 263 cs->cs_rr0_cts = 0; 264 cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS; 265 cs->cs_wr5_rts = 0; 266 267 /* 268 * Clear the master interrupt enable. 269 * The INTENA is common to both channels, 270 * so just do it on the A channel. 271 */ 272 if (channel == 0) { 273 zs_write_reg(cs, 9, 0); 274 } 275 276 /* 277 * Look for a child driver for this channel. 278 * The child attach will setup the hardware. 279 */ 280 if (!config_found(self, (void *)&zsc_args, zs_print)) { 281 /* No sub-driver. Just reset it. */ 282 u_char reset = (channel == 0) ? 283 ZSWR9_A_RESET : ZSWR9_B_RESET; 284 s = splhigh(); 285 zs_write_reg(cs, 9, reset); 286 splx(s); 287 } 288 } 289 290 /* 291 * Now safe to install interrupt handlers. Note the arguments 292 * to the interrupt handlers aren't used. Note, we only do this 293 * once since both SCCs interrupt at the same level and vector. 294 */ 295 if (!didintr) { 296 didintr = 1; 297 298 hb_intr_establish(intlevel, IPL_SERIAL, zshard_hb, NULL); 299 } 300 /* XXX; evcnt_attach() ? */ 301 302 /* 303 * Set the master interrupt enable and interrupt vector. 304 * (common to both channels, do it on A) 305 */ 306 cs = zsc->zsc_cs[0]; 307 s = splhigh(); 308 /* interrupt vector */ 309 zs_write_reg(cs, 2, zs_init_reg[2]); 310 /* master interrupt control (enable) */ 311 zs_write_reg(cs, 9, zs_init_reg[9]); 312 splx(s); 313 } 314 315 /* 316 * Our ZS chips all share a common, autovectored interrupt, 317 * so we have to look at all of them on each interrupt. 318 */ 319 static int 320 zshard_hb(arg) 321 void *arg; 322 { 323 (void) *(volatile u_char *)SCCVECT; 324 325 return zshard(arg); 326 } 327 328 /* 329 * Polled input char. 330 */ 331 int 332 zs_getc(arg) 333 void *arg; 334 { 335 volatile struct zschan *zc = arg; 336 int s, c, rr0; 337 338 s = splhigh(); 339 /* Wait for a character to arrive. */ 340 do { 341 rr0 = zc->zc_csr; 342 ZS_DELAY(); 343 } while ((rr0 & ZSRR0_RX_READY) == 0); 344 345 c = zc->zc_data; 346 ZS_DELAY(); 347 splx(s); 348 349 /* 350 * This is used by the kd driver to read scan codes, 351 * so don't translate '\r' ==> '\n' here... 352 */ 353 return (c); 354 } 355 356 /* 357 * Polled output char. 358 */ 359 void 360 zs_putc(arg, c) 361 void *arg; 362 int c; 363 { 364 volatile struct zschan *zc = arg; 365 int s, rr0; 366 367 s = splhigh(); 368 /* Wait for transmitter to become ready. */ 369 do { 370 rr0 = zc->zc_csr; 371 ZS_DELAY(); 372 } while ((rr0 & ZSRR0_TX_READY) == 0); 373 374 zc->zc_data = c; 375 ZS_DELAY(); 376 splx(s); 377 } 378 379 /*****************************************************************/ 380 381 static void zscnprobe __P((struct consdev *)); 382 static void zscninit __P((struct consdev *)); 383 static int zscngetc __P((dev_t)); 384 static void zscnputc __P((dev_t, int)); 385 386 struct consdev consdev_zs = { 387 zscnprobe, 388 zscninit, 389 zscngetc, 390 zscnputc, 391 nullcnpollc, 392 NULL, 393 NULL, 394 NULL, 395 NODEV, 396 CN_DEAD 397 }; 398 399 static void 400 zscnprobe(cn) 401 struct consdev *cn; 402 { 403 } 404 405 static void 406 zscninit(cn) 407 struct consdev *cn; 408 { 409 extern const struct cdevsw zstty_cdevsw; 410 411 cn->cn_dev = makedev(cdevsw_lookup_major(&zstty_cdevsw), 0); 412 cn->cn_pri = CN_REMOTE; 413 zs_hwflags[0][0] = ZS_HWFLAG_CONSOLE; 414 } 415 416 static int 417 zscngetc(dev) 418 dev_t dev; 419 { 420 421 return zs_getc((void *)SCCPORT0A); 422 } 423 424 static void 425 zscnputc(dev, c) 426 dev_t dev; 427 int c; 428 { 429 430 zs_putc((void *)SCCPORT0A, c); 431 } 432
Indexes created Tue Sep 30 11:09:46 GMT 2025