zs_hb.c revision 1.2
1 /* $NetBSD: zs_hb.c,v 1.2 1999/12/26 09:05:39 tsubai Exp $ */ 2 3 /*- 4 * Copyright (c) 1996 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Gordon W. Ross. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Zilog Z8530 Dual UART driver (machine-dependent part) 41 * 42 * Runs two serial lines per chip using slave drivers. 43 * Plain tty/async lines use the zs_async slave. 44 * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves. 45 */ 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/device.h> 50 #include <sys/tty.h> 51 52 #include <machine/adrsmap.h> 53 #include <machine/autoconf.h> 54 #include <machine/cpu.h> 55 #include <machine/z8530var.h> 56 57 #include <dev/cons.h> 58 #include <dev/ic/z8530reg.h> 59 60 #include "zsc.h" /* NZSC */ 61 #define NZS NZSC 62 63 /* Make life easier for the initialized arrays here. */ 64 #if NZS < 2 65 #undef NZS 66 #define NZS 2 67 #endif 68 69 /* 70 * The news3400 provides a 4.9152 MHz clock to the ZS chips. 71 */ 72 #define PCLK1 (9600 * 512) /* PCLK pin input clock rate */ 73 #define PCLK2 (9600 * 384) 74 75 /* 76 * Define interrupt levels. 77 */ 78 #define ZSHARD_PRI 64 79 80 #define ZS_DELAY() {(void)*(volatile char *)INTEN1; delay(2);} 81 82 /* The layout of this is hardware-dependent (padding, order). */ 83 struct zschan { 84 volatile u_char zc_csr; /* ctrl,status, and indirect access */ 85 volatile u_char zc_data; /* data */ 86 }; 87 struct zsdevice { 88 /* Yes, they are backwards. */ 89 struct zschan zs_chan_b; 90 struct zschan zs_chan_a; 91 }; 92 93 extern int zs_def_cflag; 94 extern void (*zs_delay) __P((void)); 95 96 static struct zsdevice *zsaddr[NZS]; 97 98 /* Flags from cninit() */ 99 static int zs_hwflags[NZS][2]; 100 101 /* Default speed for all channels */ 102 static int zs_defspeed = 9600; 103 104 static u_char zs_init_reg[16] = { 105 0, /* 0: CMD (reset, etc.) */ 106 0, /* 1: No interrupts yet. */ 107 ZSHARD_PRI, /* IVECT */ 108 ZSWR3_RX_8 | ZSWR3_RX_ENABLE, 109 ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP, 110 ZSWR5_TX_8 | ZSWR5_TX_ENABLE, 111 0, /* 6: TXSYNC/SYNCLO */ 112 0, /* 7: RXSYNC/SYNCHI */ 113 0, /* 8: alias for data port */ 114 ZSWR9_MASTER_IE, 115 0, /*10: Misc. TX/RX control bits */ 116 ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD, 117 ((PCLK1/32)/9600)-2, /*12: BAUDLO (default=9600) */ 118 0, /*13: BAUDHI (default=9600) */ 119 ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK, 120 ZSWR15_BREAK_IE, 121 }; 122 123 static struct zschan * zs_get_chan_addr __P((int, int)); 124 static void zs_hb_delay __P((void)); 125 static int zshard_hb __P((void *)); 126 static int zs_getc __P((void *)); 127 static void zs_putc __P((void *, int)); 128 int zshard __P((void *)); 129 int zs_get_speed __P((struct zs_chanstate *)); 130 131 struct zschan * 132 zs_get_chan_addr(zs_unit, channel) 133 int zs_unit, channel; 134 { 135 struct zsdevice *addr; 136 struct zschan *zc; 137 138 if (zs_unit >= NZS) 139 return NULL; 140 addr = zsaddr[zs_unit]; 141 if (addr == NULL) 142 return NULL; 143 if (channel == 0) { 144 zc = &addr->zs_chan_a; 145 } else { 146 zc = &addr->zs_chan_b; 147 } 148 return (zc); 149 } 150 151 void 152 zs_hb_delay() 153 { 154 ZS_DELAY(); 155 } 156 157 /**************************************************************** 158 * Autoconfig 159 ****************************************************************/ 160 161 /* Definition of the driver for autoconfig. */ 162 int zs_hb_match __P((struct device *, struct cfdata *, void *)); 163 void zs_hb_attach __P((struct device *, struct device *, void *)); 164 int zs_print __P((void *, const char *name)); 165 166 struct cfattach zsc_hb_ca = { 167 sizeof(struct zsc_softc), zs_hb_match, zs_hb_attach 168 }; 169 170 /* 171 * Is the zs chip present? 172 */ 173 int 174 zs_hb_match(parent, cf, aux) 175 struct device *parent; 176 struct cfdata *cf; 177 void *aux; 178 { 179 struct confargs *ca = aux; 180 181 if (strcmp(ca->ca_name, "zsc")) 182 return 0; 183 184 /* This returns -1 on a fault (bus error). */ 185 if (badaddr((char *)cf->cf_addr, 1)) 186 return 0; 187 188 return 1; 189 } 190 191 /* 192 * Attach a found zs. 193 * 194 * Match slave number to zs unit number, so that misconfiguration will 195 * not set up the keyboard as ttya, etc. 196 */ 197 void 198 zs_hb_attach(parent, self, aux) 199 struct device *parent; 200 struct device *self; 201 void *aux; 202 { 203 struct zsc_softc *zsc = (void *)self; 204 /* struct confargs *ca = aux; */ 205 struct zsc_attach_args zsc_args; 206 volatile struct zschan *zc; 207 struct zs_chanstate *cs; 208 int s, zs_unit, channel, intlevel; 209 static int didintr; 210 211 zs_unit = zsc->zsc_dev.dv_unit; 212 intlevel = zsc->zsc_dev.dv_cfdata->cf_level; 213 zsaddr[zs_unit] = (void *)zsc->zsc_dev.dv_cfdata->cf_addr; 214 215 if (intlevel == -1) { 216 #if 0 217 printf(": interrupt level not configured\n"); 218 return; 219 #else 220 printf(": interrupt level not configured; using"); 221 intlevel = 1; 222 #endif 223 } 224 225 printf(" level %d\n", intlevel); 226 227 zs_delay = zs_hb_delay; 228 229 /* 230 * Initialize software state for each channel. 231 */ 232 for (channel = 0; channel < 2; channel++) { 233 zsc_args.channel = channel; 234 zsc_args.hwflags = zs_hwflags[zs_unit][channel]; 235 cs = &zsc->zsc_cs_store[channel]; 236 zsc->zsc_cs[channel] = cs; 237 238 cs->cs_channel = channel; 239 cs->cs_private = NULL; 240 cs->cs_ops = &zsops_null; 241 if (zs_unit == 0) 242 cs->cs_brg_clk = PCLK1 / 16; 243 else 244 cs->cs_brg_clk = PCLK2 / 16; 245 246 zc = zs_get_chan_addr(zs_unit, channel); 247 cs->cs_reg_csr = &zc->zc_csr; 248 cs->cs_reg_data = &zc->zc_data; 249 250 bcopy(zs_init_reg, cs->cs_creg, 16); 251 bcopy(zs_init_reg, cs->cs_preg, 16); 252 253 /* XXX: Get these from the EEPROM instead? */ 254 /* XXX: See the mvme167 code. Better. */ 255 if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE) 256 cs->cs_defspeed = zs_get_speed(cs); 257 else 258 cs->cs_defspeed = zs_defspeed; 259 cs->cs_defcflag = zs_def_cflag; 260 261 /* Make these correspond to cs_defcflag (-crtscts) */ 262 cs->cs_rr0_dcd = ZSRR0_DCD; 263 cs->cs_rr0_cts = 0; 264 cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS; 265 cs->cs_wr5_rts = 0; 266 267 /* 268 * Clear the master interrupt enable. 269 * The INTENA is common to both channels, 270 * so just do it on the A channel. 271 */ 272 if (channel == 0) { 273 zs_write_reg(cs, 9, 0); 274 } 275 276 /* 277 * Look for a child driver for this channel. 278 * The child attach will setup the hardware. 279 */ 280 if (!config_found(self, (void *)&zsc_args, zs_print)) { 281 /* No sub-driver. Just reset it. */ 282 u_char reset = (channel == 0) ? 283 ZSWR9_A_RESET : ZSWR9_B_RESET; 284 s = splhigh(); 285 zs_write_reg(cs, 9, reset); 286 splx(s); 287 } 288 } 289 290 /* 291 * Now safe to install interrupt handlers. Note the arguments 292 * to the interrupt handlers aren't used. Note, we only do this 293 * once since both SCCs interrupt at the same level and vector. 294 */ 295 if (!didintr) { 296 didintr = 1; 297 298 hb_intr_establish(intlevel, IPL_SERIAL, zshard_hb, NULL); 299 } 300 /* XXX; evcnt_attach() ? */ 301 302 /* 303 * Set the master interrupt enable and interrupt vector. 304 * (common to both channels, do it on A) 305 */ 306 cs = zsc->zsc_cs[0]; 307 s = splhigh(); 308 /* interrupt vector */ 309 zs_write_reg(cs, 2, zs_init_reg[2]); 310 /* master interrupt control (enable) */ 311 zs_write_reg(cs, 9, zs_init_reg[9]); 312 splx(s); 313 } 314 315 /* 316 * Our ZS chips all share a common, autovectored interrupt, 317 * so we have to look at all of them on each interrupt. 318 */ 319 static int 320 zshard_hb(arg) 321 void *arg; 322 { 323 (void) *(volatile u_char *)SCCVECT; 324 325 return zshard(arg); 326 } 327 328 /* 329 * Polled input char. 330 */ 331 int 332 zs_getc(arg) 333 void *arg; 334 { 335 register volatile struct zschan *zc = arg; 336 register int s, c, rr0; 337 338 s = splhigh(); 339 /* Wait for a character to arrive. */ 340 do { 341 rr0 = zc->zc_csr; 342 ZS_DELAY(); 343 } while ((rr0 & ZSRR0_RX_READY) == 0); 344 345 c = zc->zc_data; 346 ZS_DELAY(); 347 splx(s); 348 349 /* 350 * This is used by the kd driver to read scan codes, 351 * so don't translate '\r' ==> '\n' here... 352 */ 353 return (c); 354 } 355 356 /* 357 * Polled output char. 358 */ 359 void 360 zs_putc(arg, c) 361 void *arg; 362 int c; 363 { 364 register volatile struct zschan *zc = arg; 365 register int s, rr0; 366 367 s = splhigh(); 368 /* Wait for transmitter to become ready. */ 369 do { 370 rr0 = zc->zc_csr; 371 ZS_DELAY(); 372 } while ((rr0 & ZSRR0_TX_READY) == 0); 373 374 zc->zc_data = c; 375 ZS_DELAY(); 376 splx(s); 377 } 378 379 /*****************************************************************/ 380 381 static void zscnprobe __P((struct consdev *)); 382 static void zscninit __P((struct consdev *)); 383 static int zscngetc __P((dev_t)); 384 static void zscnputc __P((dev_t, int)); 385 static void zscnpollc __P((dev_t, int)); 386 387 struct consdev consdev_zs = { 388 zscnprobe, 389 zscninit, 390 zscngetc, 391 zscnputc, 392 zscnpollc 393 }; 394 395 void 396 zscnprobe(cn) 397 struct consdev *cn; 398 { 399 } 400 401 void 402 zscninit(cn) 403 struct consdev *cn; 404 { 405 cn->cn_dev = makedev(zs_major, 0); 406 cn->cn_pri = CN_REMOTE; 407 zs_hwflags[0][0] = ZS_HWFLAG_CONSOLE; 408 } 409 410 int 411 zscngetc(dev) 412 dev_t dev; 413 { 414 return zs_getc((void *)SCCPORT0A); 415 } 416 417 void 418 zscnputc(dev, c) 419 dev_t dev; 420 int c; 421 { 422 zs_putc((void *)SCCPORT0A, c); 423 } 424 425 void 426 zscnpollc(dev, on) 427 dev_t dev; 428 int on; 429 { 430 } 431
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