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zs_hb.c revision 1.4
      1 /*	$NetBSD: zs_hb.c,v 1.4 2000/03/06 21:36:10 thorpej Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1996 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Gordon W. Ross.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. All advertising materials mentioning features or use of this software
     19  *    must display the following acknowledgement:
     20  *        This product includes software developed by the NetBSD
     21  *        Foundation, Inc. and its contributors.
     22  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  *    contributors may be used to endorse or promote products derived
     24  *    from this software without specific prior written permission.
     25  *
     26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  * POSSIBILITY OF SUCH DAMAGE.
     37  */
     38 
     39 /*
     40  * Zilog Z8530 Dual UART driver (machine-dependent part)
     41  *
     42  * Runs two serial lines per chip using slave drivers.
     43  * Plain tty/async lines use the zs_async slave.
     44  * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
     45  */
     46 
     47 #include <sys/param.h>
     48 #include <sys/systm.h>
     49 #include <sys/device.h>
     50 #include <sys/tty.h>
     51 
     52 #include <machine/adrsmap.h>
     53 #include <machine/autoconf.h>
     54 #include <machine/cpu.h>
     55 #include <machine/z8530var.h>
     56 
     57 #include <dev/cons.h>
     58 #include <dev/ic/z8530reg.h>
     59 
     60 #include "zsc.h"	/* NZSC */
     61 #define NZS NZSC
     62 
     63 /* Make life easier for the initialized arrays here. */
     64 #if NZS < 2
     65 #undef  NZS
     66 #define NZS 2
     67 #endif
     68 
     69 #define ZSCFLAG_EX	0x01	/* expansion board */
     70 
     71 /*
     72  * The news3400 provides a 4.9152 MHz clock to the ZS chips.
     73  */
     74 #define PCLK	(9600 * 512)	/* PCLK pin input clock rate */
     75 #define PCLK_EX	(9600 * 384)
     76 
     77 /*
     78  * Define interrupt levels.
     79  */
     80 #define ZSHARD_PRI 64
     81 
     82 #define ZS_DELAY() {(void)*(volatile char *)INTEN1; delay(2);}
     83 
     84 /* The layout of this is hardware-dependent (padding, order). */
     85 struct zschan {
     86 	volatile u_char	zc_csr;		/* ctrl,status, and indirect access */
     87 	volatile u_char	zc_data;	/* data */
     88 };
     89 struct zsdevice {
     90 	/* Yes, they are backwards. */
     91 	struct	zschan zs_chan_b;
     92 	struct	zschan zs_chan_a;
     93 };
     94 
     95 extern int zs_def_cflag;
     96 extern void (*zs_delay) __P((void));
     97 
     98 static struct zsdevice *zsaddr[NZS];
     99 
    100 /* Flags from cninit() */
    101 static int zs_hwflags[NZS][2];
    102 
    103 /* Default speed for all channels */
    104 static int zs_defspeed = 9600;
    105 
    106 static u_char zs_init_reg[16] = {
    107 	0,	/* 0: CMD (reset, etc.) */
    108 	0,	/* 1: No interrupts yet. */
    109 	ZSHARD_PRI,	/* IVECT */
    110 	ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
    111 	ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
    112 	ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
    113 	0,	/* 6: TXSYNC/SYNCLO */
    114 	0,	/* 7: RXSYNC/SYNCHI */
    115 	0,	/* 8: alias for data port */
    116 	ZSWR9_MASTER_IE,
    117 	0,	/*10: Misc. TX/RX control bits */
    118 	ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
    119 	((PCLK/32)/9600)-2,	/*12: BAUDLO (default=9600) */
    120 	0,			/*13: BAUDHI (default=9600) */
    121 	ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK,
    122 	ZSWR15_BREAK_IE,
    123 };
    124 
    125 static struct zschan * zs_get_chan_addr __P((int, int));
    126 static void zs_hb_delay __P((void));
    127 static int zshard_hb __P((void *));
    128 static int zs_getc __P((void *));
    129 static void zs_putc __P((void *, int));
    130 int zshard __P((void *));
    131 int zs_get_speed __P((struct zs_chanstate *));
    132 
    133 struct zschan *
    134 zs_get_chan_addr(zs_unit, channel)
    135 	int zs_unit, channel;
    136 {
    137 	struct zsdevice *addr;
    138 	struct zschan *zc;
    139 
    140 	if (zs_unit >= NZS)
    141 		return NULL;
    142 	addr = zsaddr[zs_unit];
    143 	if (addr == NULL)
    144 		return NULL;
    145 	if (channel == 0) {
    146 		zc = &addr->zs_chan_a;
    147 	} else {
    148 		zc = &addr->zs_chan_b;
    149 	}
    150 	return (zc);
    151 }
    152 
    153 void
    154 zs_hb_delay()
    155 {
    156 	ZS_DELAY();
    157 }
    158 
    159 /****************************************************************
    160  * Autoconfig
    161  ****************************************************************/
    162 
    163 /* Definition of the driver for autoconfig. */
    164 int zs_hb_match __P((struct device *, struct cfdata *, void *));
    165 void zs_hb_attach __P((struct device *, struct device *, void *));
    166 int zs_print __P((void *, const char *name));
    167 
    168 struct cfattach zsc_hb_ca = {
    169 	sizeof(struct zsc_softc), zs_hb_match, zs_hb_attach
    170 };
    171 
    172 /*
    173  * Is the zs chip present?
    174  */
    175 int
    176 zs_hb_match(parent, cf, aux)
    177 	struct device *parent;
    178 	struct cfdata *cf;
    179 	void *aux;
    180 {
    181 	struct confargs *ca = aux;
    182 
    183 	if (strcmp(ca->ca_name, "zsc"))
    184 		return 0;
    185 
    186 	/* This returns -1 on a fault (bus error). */
    187 	if (badaddr((char *)cf->cf_addr, 1))
    188 		return 0;
    189 
    190 	return 1;
    191 }
    192 
    193 /*
    194  * Attach a found zs.
    195  *
    196  * Match slave number to zs unit number, so that misconfiguration will
    197  * not set up the keyboard as ttya, etc.
    198  */
    199 void
    200 zs_hb_attach(parent, self, aux)
    201 	struct device *parent;
    202 	struct device *self;
    203 	void *aux;
    204 {
    205 	struct zsc_softc *zsc = (void *)self;
    206 	/* struct confargs *ca = aux; */
    207 	struct zsc_attach_args zsc_args;
    208 	volatile struct zschan *zc;
    209 	struct zs_chanstate *cs;
    210 	int s, zs_unit, channel, intlevel;
    211 	static int didintr;
    212 
    213 	zs_unit = zsc->zsc_dev.dv_unit;
    214 	intlevel = zsc->zsc_dev.dv_cfdata->cf_level;
    215 	zsaddr[zs_unit] = (void *)zsc->zsc_dev.dv_cfdata->cf_addr;
    216 
    217 	if (intlevel == -1) {
    218 #if 0
    219 		printf(": interrupt level not configured\n");
    220 		return;
    221 #else
    222 		printf(": interrupt level not configured; using");
    223 		intlevel = 1;
    224 #endif
    225 	}
    226 
    227 	printf(" level %d\n", intlevel);
    228 
    229 	zs_delay = zs_hb_delay;
    230 
    231 	/*
    232 	 * Initialize software state for each channel.
    233 	 */
    234 	for (channel = 0; channel < 2; channel++) {
    235 		zsc_args.channel = channel;
    236 		zsc_args.hwflags = zs_hwflags[zs_unit][channel];
    237 		cs = &zsc->zsc_cs_store[channel];
    238 		zsc->zsc_cs[channel] = cs;
    239 
    240 		cs->cs_channel = channel;
    241 		cs->cs_private = NULL;
    242 		cs->cs_ops = &zsops_null;
    243 		if ((zsc->zsc_dev.dv_cfdata->cf_flags & ZSCFLAG_EX) == 0)
    244 			cs->cs_brg_clk = PCLK / 16;
    245 		else
    246 			cs->cs_brg_clk = PCLK_EX / 16;
    247 
    248 		zc = zs_get_chan_addr(zs_unit, channel);
    249 		cs->cs_reg_csr  = &zc->zc_csr;
    250 		cs->cs_reg_data = &zc->zc_data;
    251 
    252 		bcopy(zs_init_reg, cs->cs_creg, 16);
    253 		bcopy(zs_init_reg, cs->cs_preg, 16);
    254 
    255 		/* XXX: Get these from the EEPROM instead? */
    256 		/* XXX: See the mvme167 code.  Better. */
    257 		if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE)
    258 			cs->cs_defspeed = zs_get_speed(cs);
    259 		else
    260 			cs->cs_defspeed = zs_defspeed;
    261 		cs->cs_defcflag = zs_def_cflag;
    262 
    263 		/* Make these correspond to cs_defcflag (-crtscts) */
    264 		cs->cs_rr0_dcd = ZSRR0_DCD;
    265 		cs->cs_rr0_cts = 0;
    266 		cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
    267 		cs->cs_wr5_rts = 0;
    268 
    269 		/*
    270 		 * Clear the master interrupt enable.
    271 		 * The INTENA is common to both channels,
    272 		 * so just do it on the A channel.
    273 		 */
    274 		if (channel == 0) {
    275 			zs_write_reg(cs, 9, 0);
    276 		}
    277 
    278 		/*
    279 		 * Look for a child driver for this channel.
    280 		 * The child attach will setup the hardware.
    281 		 */
    282 		if (!config_found(self, (void *)&zsc_args, zs_print)) {
    283 			/* No sub-driver.  Just reset it. */
    284 			u_char reset = (channel == 0) ?
    285 				ZSWR9_A_RESET : ZSWR9_B_RESET;
    286 			s = splhigh();
    287 			zs_write_reg(cs, 9, reset);
    288 			splx(s);
    289 		}
    290 	}
    291 
    292 	/*
    293 	 * Now safe to install interrupt handlers.  Note the arguments
    294 	 * to the interrupt handlers aren't used.  Note, we only do this
    295 	 * once since both SCCs interrupt at the same level and vector.
    296 	 */
    297 	if (!didintr) {
    298 		didintr = 1;
    299 
    300 		hb_intr_establish(intlevel, IPL_SERIAL, zshard_hb, NULL);
    301 	}
    302 	/* XXX; evcnt_attach() ? */
    303 
    304 	/*
    305 	 * Set the master interrupt enable and interrupt vector.
    306 	 * (common to both channels, do it on A)
    307 	 */
    308 	cs = zsc->zsc_cs[0];
    309 	s = splhigh();
    310 	/* interrupt vector */
    311 	zs_write_reg(cs, 2, zs_init_reg[2]);
    312 	/* master interrupt control (enable) */
    313 	zs_write_reg(cs, 9, zs_init_reg[9]);
    314 	splx(s);
    315 }
    316 
    317 /*
    318  * Our ZS chips all share a common, autovectored interrupt,
    319  * so we have to look at all of them on each interrupt.
    320  */
    321 static int
    322 zshard_hb(arg)
    323 	void *arg;
    324 {
    325 	(void) *(volatile u_char *)SCCVECT;
    326 
    327 	return zshard(arg);
    328 }
    329 
    330 /*
    331  * Polled input char.
    332  */
    333 int
    334 zs_getc(arg)
    335 	void *arg;
    336 {
    337 	register volatile struct zschan *zc = arg;
    338 	register int s, c, rr0;
    339 
    340 	s = splhigh();
    341 	/* Wait for a character to arrive. */
    342 	do {
    343 		rr0 = zc->zc_csr;
    344 		ZS_DELAY();
    345 	} while ((rr0 & ZSRR0_RX_READY) == 0);
    346 
    347 	c = zc->zc_data;
    348 	ZS_DELAY();
    349 	splx(s);
    350 
    351 	/*
    352 	 * This is used by the kd driver to read scan codes,
    353 	 * so don't translate '\r' ==> '\n' here...
    354 	 */
    355 	return (c);
    356 }
    357 
    358 /*
    359  * Polled output char.
    360  */
    361 void
    362 zs_putc(arg, c)
    363 	void *arg;
    364 	int c;
    365 {
    366 	register volatile struct zschan *zc = arg;
    367 	register int s, rr0;
    368 
    369 	s = splhigh();
    370 	/* Wait for transmitter to become ready. */
    371 	do {
    372 		rr0 = zc->zc_csr;
    373 		ZS_DELAY();
    374 	} while ((rr0 & ZSRR0_TX_READY) == 0);
    375 
    376 	zc->zc_data = c;
    377 	ZS_DELAY();
    378 	splx(s);
    379 }
    380 
    381 /*****************************************************************/
    382 
    383 static void zscnprobe __P((struct consdev *));
    384 static void zscninit __P((struct consdev *));
    385 static int  zscngetc __P((dev_t));
    386 static void zscnputc __P((dev_t, int));
    387 static void zscnpollc __P((dev_t, int));
    388 
    389 struct consdev consdev_zs = {
    390 	zscnprobe,
    391 	zscninit,
    392 	zscngetc,
    393 	zscnputc,
    394 	zscnpollc,
    395 	NULL,
    396 };
    397 
    398 void
    399 zscnprobe(cn)
    400 	struct consdev *cn;
    401 {
    402 }
    403 
    404 void
    405 zscninit(cn)
    406 	struct consdev *cn;
    407 {
    408 	cn->cn_dev = makedev(zs_major, 0);
    409 	cn->cn_pri = CN_REMOTE;
    410 	zs_hwflags[0][0] = ZS_HWFLAG_CONSOLE;
    411 }
    412 
    413 int
    414 zscngetc(dev)
    415 	dev_t dev;
    416 {
    417 	return zs_getc((void *)SCCPORT0A);
    418 }
    419 
    420 void
    421 zscnputc(dev, c)
    422 	dev_t dev;
    423 	int c;
    424 {
    425 	zs_putc((void *)SCCPORT0A, c);
    426 }
    427 
    428 void
    429 zscnpollc(dev, on)
    430 	dev_t dev;
    431 	int on;
    432 {
    433 }
    434