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zs_hb.c revision 1.5
      1 /*	$NetBSD: zs_hb.c,v 1.5 2002/09/06 13:18:43 gehenna Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1996 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Gordon W. Ross.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. All advertising materials mentioning features or use of this software
     19  *    must display the following acknowledgement:
     20  *        This product includes software developed by the NetBSD
     21  *        Foundation, Inc. and its contributors.
     22  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  *    contributors may be used to endorse or promote products derived
     24  *    from this software without specific prior written permission.
     25  *
     26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  * POSSIBILITY OF SUCH DAMAGE.
     37  */
     38 
     39 /*
     40  * Zilog Z8530 Dual UART driver (machine-dependent part)
     41  *
     42  * Runs two serial lines per chip using slave drivers.
     43  * Plain tty/async lines use the zs_async slave.
     44  * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
     45  */
     46 
     47 #include <sys/param.h>
     48 #include <sys/systm.h>
     49 #include <sys/device.h>
     50 #include <sys/tty.h>
     51 #include <sys/conf.h>
     52 
     53 #include <machine/adrsmap.h>
     54 #include <machine/autoconf.h>
     55 #include <machine/cpu.h>
     56 #include <machine/z8530var.h>
     57 
     58 #include <dev/cons.h>
     59 #include <dev/ic/z8530reg.h>
     60 
     61 #include "zsc.h"	/* NZSC */
     62 #define NZS NZSC
     63 
     64 /* Make life easier for the initialized arrays here. */
     65 #if NZS < 2
     66 #undef  NZS
     67 #define NZS 2
     68 #endif
     69 
     70 #define ZSCFLAG_EX	0x01	/* expansion board */
     71 
     72 /*
     73  * The news3400 provides a 4.9152 MHz clock to the ZS chips.
     74  */
     75 #define PCLK	(9600 * 512)	/* PCLK pin input clock rate */
     76 #define PCLK_EX	(9600 * 384)
     77 
     78 /*
     79  * Define interrupt levels.
     80  */
     81 #define ZSHARD_PRI 64
     82 
     83 #define ZS_DELAY() {(void)*(volatile char *)INTEN1; delay(2);}
     84 
     85 /* The layout of this is hardware-dependent (padding, order). */
     86 struct zschan {
     87 	volatile u_char	zc_csr;		/* ctrl,status, and indirect access */
     88 	volatile u_char	zc_data;	/* data */
     89 };
     90 struct zsdevice {
     91 	/* Yes, they are backwards. */
     92 	struct	zschan zs_chan_b;
     93 	struct	zschan zs_chan_a;
     94 };
     95 
     96 extern int zs_def_cflag;
     97 extern void (*zs_delay) __P((void));
     98 
     99 static struct zsdevice *zsaddr[NZS];
    100 
    101 /* Flags from cninit() */
    102 static int zs_hwflags[NZS][2];
    103 
    104 /* Default speed for all channels */
    105 static int zs_defspeed = 9600;
    106 
    107 static u_char zs_init_reg[16] = {
    108 	0,	/* 0: CMD (reset, etc.) */
    109 	0,	/* 1: No interrupts yet. */
    110 	ZSHARD_PRI,	/* IVECT */
    111 	ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
    112 	ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
    113 	ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
    114 	0,	/* 6: TXSYNC/SYNCLO */
    115 	0,	/* 7: RXSYNC/SYNCHI */
    116 	0,	/* 8: alias for data port */
    117 	ZSWR9_MASTER_IE,
    118 	0,	/*10: Misc. TX/RX control bits */
    119 	ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
    120 	((PCLK/32)/9600)-2,	/*12: BAUDLO (default=9600) */
    121 	0,			/*13: BAUDHI (default=9600) */
    122 	ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK,
    123 	ZSWR15_BREAK_IE,
    124 };
    125 
    126 static struct zschan * zs_get_chan_addr __P((int, int));
    127 static void zs_hb_delay __P((void));
    128 static int zshard_hb __P((void *));
    129 static int zs_getc __P((void *));
    130 static void zs_putc __P((void *, int));
    131 int zshard __P((void *));
    132 int zs_get_speed __P((struct zs_chanstate *));
    133 
    134 struct zschan *
    135 zs_get_chan_addr(zs_unit, channel)
    136 	int zs_unit, channel;
    137 {
    138 	struct zsdevice *addr;
    139 	struct zschan *zc;
    140 
    141 	if (zs_unit >= NZS)
    142 		return NULL;
    143 	addr = zsaddr[zs_unit];
    144 	if (addr == NULL)
    145 		return NULL;
    146 	if (channel == 0) {
    147 		zc = &addr->zs_chan_a;
    148 	} else {
    149 		zc = &addr->zs_chan_b;
    150 	}
    151 	return (zc);
    152 }
    153 
    154 void
    155 zs_hb_delay()
    156 {
    157 	ZS_DELAY();
    158 }
    159 
    160 /****************************************************************
    161  * Autoconfig
    162  ****************************************************************/
    163 
    164 /* Definition of the driver for autoconfig. */
    165 int zs_hb_match __P((struct device *, struct cfdata *, void *));
    166 void zs_hb_attach __P((struct device *, struct device *, void *));
    167 int zs_print __P((void *, const char *name));
    168 
    169 struct cfattach zsc_hb_ca = {
    170 	sizeof(struct zsc_softc), zs_hb_match, zs_hb_attach
    171 };
    172 
    173 /*
    174  * Is the zs chip present?
    175  */
    176 int
    177 zs_hb_match(parent, cf, aux)
    178 	struct device *parent;
    179 	struct cfdata *cf;
    180 	void *aux;
    181 {
    182 	struct confargs *ca = aux;
    183 
    184 	if (strcmp(ca->ca_name, "zsc"))
    185 		return 0;
    186 
    187 	/* This returns -1 on a fault (bus error). */
    188 	if (badaddr((char *)cf->cf_addr, 1))
    189 		return 0;
    190 
    191 	return 1;
    192 }
    193 
    194 /*
    195  * Attach a found zs.
    196  *
    197  * Match slave number to zs unit number, so that misconfiguration will
    198  * not set up the keyboard as ttya, etc.
    199  */
    200 void
    201 zs_hb_attach(parent, self, aux)
    202 	struct device *parent;
    203 	struct device *self;
    204 	void *aux;
    205 {
    206 	struct zsc_softc *zsc = (void *)self;
    207 	/* struct confargs *ca = aux; */
    208 	struct zsc_attach_args zsc_args;
    209 	volatile struct zschan *zc;
    210 	struct zs_chanstate *cs;
    211 	int s, zs_unit, channel, intlevel;
    212 	static int didintr;
    213 
    214 	zs_unit = zsc->zsc_dev.dv_unit;
    215 	intlevel = zsc->zsc_dev.dv_cfdata->cf_level;
    216 	zsaddr[zs_unit] = (void *)zsc->zsc_dev.dv_cfdata->cf_addr;
    217 
    218 	if (intlevel == -1) {
    219 #if 0
    220 		printf(": interrupt level not configured\n");
    221 		return;
    222 #else
    223 		printf(": interrupt level not configured; using");
    224 		intlevel = 1;
    225 #endif
    226 	}
    227 
    228 	printf(" level %d\n", intlevel);
    229 
    230 	zs_delay = zs_hb_delay;
    231 
    232 	/*
    233 	 * Initialize software state for each channel.
    234 	 */
    235 	for (channel = 0; channel < 2; channel++) {
    236 		zsc_args.channel = channel;
    237 		zsc_args.hwflags = zs_hwflags[zs_unit][channel];
    238 		cs = &zsc->zsc_cs_store[channel];
    239 		zsc->zsc_cs[channel] = cs;
    240 
    241 		cs->cs_channel = channel;
    242 		cs->cs_private = NULL;
    243 		cs->cs_ops = &zsops_null;
    244 		if ((zsc->zsc_dev.dv_cfdata->cf_flags & ZSCFLAG_EX) == 0)
    245 			cs->cs_brg_clk = PCLK / 16;
    246 		else
    247 			cs->cs_brg_clk = PCLK_EX / 16;
    248 
    249 		zc = zs_get_chan_addr(zs_unit, channel);
    250 		cs->cs_reg_csr  = &zc->zc_csr;
    251 		cs->cs_reg_data = &zc->zc_data;
    252 
    253 		bcopy(zs_init_reg, cs->cs_creg, 16);
    254 		bcopy(zs_init_reg, cs->cs_preg, 16);
    255 
    256 		/* XXX: Get these from the EEPROM instead? */
    257 		/* XXX: See the mvme167 code.  Better. */
    258 		if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE)
    259 			cs->cs_defspeed = zs_get_speed(cs);
    260 		else
    261 			cs->cs_defspeed = zs_defspeed;
    262 		cs->cs_defcflag = zs_def_cflag;
    263 
    264 		/* Make these correspond to cs_defcflag (-crtscts) */
    265 		cs->cs_rr0_dcd = ZSRR0_DCD;
    266 		cs->cs_rr0_cts = 0;
    267 		cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
    268 		cs->cs_wr5_rts = 0;
    269 
    270 		/*
    271 		 * Clear the master interrupt enable.
    272 		 * The INTENA is common to both channels,
    273 		 * so just do it on the A channel.
    274 		 */
    275 		if (channel == 0) {
    276 			zs_write_reg(cs, 9, 0);
    277 		}
    278 
    279 		/*
    280 		 * Look for a child driver for this channel.
    281 		 * The child attach will setup the hardware.
    282 		 */
    283 		if (!config_found(self, (void *)&zsc_args, zs_print)) {
    284 			/* No sub-driver.  Just reset it. */
    285 			u_char reset = (channel == 0) ?
    286 				ZSWR9_A_RESET : ZSWR9_B_RESET;
    287 			s = splhigh();
    288 			zs_write_reg(cs, 9, reset);
    289 			splx(s);
    290 		}
    291 	}
    292 
    293 	/*
    294 	 * Now safe to install interrupt handlers.  Note the arguments
    295 	 * to the interrupt handlers aren't used.  Note, we only do this
    296 	 * once since both SCCs interrupt at the same level and vector.
    297 	 */
    298 	if (!didintr) {
    299 		didintr = 1;
    300 
    301 		hb_intr_establish(intlevel, IPL_SERIAL, zshard_hb, NULL);
    302 	}
    303 	/* XXX; evcnt_attach() ? */
    304 
    305 	/*
    306 	 * Set the master interrupt enable and interrupt vector.
    307 	 * (common to both channels, do it on A)
    308 	 */
    309 	cs = zsc->zsc_cs[0];
    310 	s = splhigh();
    311 	/* interrupt vector */
    312 	zs_write_reg(cs, 2, zs_init_reg[2]);
    313 	/* master interrupt control (enable) */
    314 	zs_write_reg(cs, 9, zs_init_reg[9]);
    315 	splx(s);
    316 }
    317 
    318 /*
    319  * Our ZS chips all share a common, autovectored interrupt,
    320  * so we have to look at all of them on each interrupt.
    321  */
    322 static int
    323 zshard_hb(arg)
    324 	void *arg;
    325 {
    326 	(void) *(volatile u_char *)SCCVECT;
    327 
    328 	return zshard(arg);
    329 }
    330 
    331 /*
    332  * Polled input char.
    333  */
    334 int
    335 zs_getc(arg)
    336 	void *arg;
    337 {
    338 	register volatile struct zschan *zc = arg;
    339 	register int s, c, rr0;
    340 
    341 	s = splhigh();
    342 	/* Wait for a character to arrive. */
    343 	do {
    344 		rr0 = zc->zc_csr;
    345 		ZS_DELAY();
    346 	} while ((rr0 & ZSRR0_RX_READY) == 0);
    347 
    348 	c = zc->zc_data;
    349 	ZS_DELAY();
    350 	splx(s);
    351 
    352 	/*
    353 	 * This is used by the kd driver to read scan codes,
    354 	 * so don't translate '\r' ==> '\n' here...
    355 	 */
    356 	return (c);
    357 }
    358 
    359 /*
    360  * Polled output char.
    361  */
    362 void
    363 zs_putc(arg, c)
    364 	void *arg;
    365 	int c;
    366 {
    367 	register volatile struct zschan *zc = arg;
    368 	register int s, rr0;
    369 
    370 	s = splhigh();
    371 	/* Wait for transmitter to become ready. */
    372 	do {
    373 		rr0 = zc->zc_csr;
    374 		ZS_DELAY();
    375 	} while ((rr0 & ZSRR0_TX_READY) == 0);
    376 
    377 	zc->zc_data = c;
    378 	ZS_DELAY();
    379 	splx(s);
    380 }
    381 
    382 /*****************************************************************/
    383 
    384 static void zscnprobe __P((struct consdev *));
    385 static void zscninit __P((struct consdev *));
    386 static int  zscngetc __P((dev_t));
    387 static void zscnputc __P((dev_t, int));
    388 static void zscnpollc __P((dev_t, int));
    389 
    390 struct consdev consdev_zs = {
    391 	zscnprobe,
    392 	zscninit,
    393 	zscngetc,
    394 	zscnputc,
    395 	zscnpollc,
    396 	NULL,
    397 };
    398 
    399 void
    400 zscnprobe(cn)
    401 	struct consdev *cn;
    402 {
    403 }
    404 
    405 void
    406 zscninit(cn)
    407 	struct consdev *cn;
    408 {
    409 	extern const struct cdevsw zstty_cdevsw;
    410 
    411 	cn->cn_dev = makedev(cdevsw_lookup_major(&zstty_cdevsw), 0);
    412 	cn->cn_pri = CN_REMOTE;
    413 	zs_hwflags[0][0] = ZS_HWFLAG_CONSOLE;
    414 }
    415 
    416 int
    417 zscngetc(dev)
    418 	dev_t dev;
    419 {
    420 	return zs_getc((void *)SCCPORT0A);
    421 }
    422 
    423 void
    424 zscnputc(dev, c)
    425 	dev_t dev;
    426 	int c;
    427 {
    428 	zs_putc((void *)SCCPORT0A, c);
    429 }
    430 
    431 void
    432 zscnpollc(dev, on)
    433 	dev_t dev;
    434 	int on;
    435 {
    436 }
    437