bus.h revision 1.5.2.2
1 1.5.2.2 nathanw /* $NetBSD: bus.h,v 1.5.2.2 2002/04/01 07:41:42 nathanw Exp $ */ 2 1.5.2.2 nathanw 3 1.5.2.2 nathanw /* 4 1.5.2.2 nathanw * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. 5 1.5.2.2 nathanw * All rights reserved. 6 1.5.2.2 nathanw * 7 1.5.2.2 nathanw * This code is derived from software contributed to The NetBSD Foundation 8 1.5.2.2 nathanw * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 1.5.2.2 nathanw * NASA Ames Research Center. 10 1.5.2.2 nathanw * 11 1.5.2.2 nathanw * Redistribution and use in source and binary forms, with or without 12 1.5.2.2 nathanw * modification, are permitted provided that the following conditions 13 1.5.2.2 nathanw * are met: 14 1.5.2.2 nathanw * 1. Redistributions of source code must retain the above copyright 15 1.5.2.2 nathanw * notice, this list of conditions and the following disclaimer. 16 1.5.2.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright 17 1.5.2.2 nathanw * notice, this list of conditions and the following disclaimer in the 18 1.5.2.2 nathanw * documentation and/or other materials provided with the distribution. 19 1.5.2.2 nathanw * 3. All advertising materials mentioning features or use of this software 20 1.5.2.2 nathanw * must display the following acknowledgement: 21 1.5.2.2 nathanw * This product includes software developed by the NetBSD 22 1.5.2.2 nathanw * Foundation, Inc. and its contributors. 23 1.5.2.2 nathanw * 4. Neither the name of The NetBSD Foundation nor the names of its 24 1.5.2.2 nathanw * contributors may be used to endorse or promote products derived 25 1.5.2.2 nathanw * from this software without specific prior written permission. 26 1.5.2.2 nathanw * 27 1.5.2.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 1.5.2.2 nathanw * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 1.5.2.2 nathanw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 1.5.2.2 nathanw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 1.5.2.2 nathanw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 1.5.2.2 nathanw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 1.5.2.2 nathanw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 1.5.2.2 nathanw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 1.5.2.2 nathanw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 1.5.2.2 nathanw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 1.5.2.2 nathanw * POSSIBILITY OF SUCH DAMAGE. 38 1.5.2.2 nathanw */ 39 1.5.2.2 nathanw 40 1.5.2.2 nathanw #ifndef _NEWSMIPS_BUS_H_ 41 1.5.2.2 nathanw #define _NEWSMIPS_BUS_H_ 42 1.5.2.2 nathanw 43 1.5.2.2 nathanw #include <mips/locore.h> 44 1.5.2.2 nathanw 45 1.5.2.2 nathanw /* 46 1.5.2.2 nathanw * Utility macros; do not use outside this file. 47 1.5.2.2 nathanw */ 48 1.5.2.2 nathanw #define __PB_TYPENAME_PREFIX(BITS) ___CONCAT(u_int,BITS) 49 1.5.2.2 nathanw #define __PB_TYPENAME(BITS) ___CONCAT(__PB_TYPENAME_PREFIX(BITS),_t) 50 1.5.2.2 nathanw 51 1.5.2.2 nathanw /* 52 1.5.2.2 nathanw * Bus address and size types 53 1.5.2.2 nathanw */ 54 1.5.2.2 nathanw typedef u_long bus_addr_t; 55 1.5.2.2 nathanw typedef u_long bus_size_t; 56 1.5.2.2 nathanw 57 1.5.2.2 nathanw /* 58 1.5.2.2 nathanw * Access methods for bus resources and address space. 59 1.5.2.2 nathanw */ 60 1.5.2.2 nathanw typedef int bus_space_tag_t; 61 1.5.2.2 nathanw typedef u_long bus_space_handle_t; 62 1.5.2.2 nathanw 63 1.5.2.2 nathanw /* 64 1.5.2.2 nathanw * int bus_space_map(bus_space_tag_t t, bus_addr_t addr, 65 1.5.2.2 nathanw * bus_size_t size, int flags, bus_space_handle_t *bshp); 66 1.5.2.2 nathanw * 67 1.5.2.2 nathanw * Map a region of bus space. 68 1.5.2.2 nathanw */ 69 1.5.2.2 nathanw 70 1.5.2.2 nathanw #define BUS_SPACE_MAP_CACHEABLE 0x01 71 1.5.2.2 nathanw #define BUS_SPACE_MAP_LINEAR 0x02 72 1.5.2.2 nathanw #define BUS_SPACE_MAP_PREFETCHABLE 0x04 73 1.5.2.2 nathanw 74 1.5.2.2 nathanw int bus_space_map(bus_space_tag_t, bus_addr_t, bus_size_t, 75 1.5.2.2 nathanw int, bus_space_handle_t *); 76 1.5.2.2 nathanw 77 1.5.2.2 nathanw /* 78 1.5.2.2 nathanw * void bus_space_unmap(bus_space_tag_t t, 79 1.5.2.2 nathanw * bus_space_handle_t bsh, bus_size_t size); 80 1.5.2.2 nathanw * 81 1.5.2.2 nathanw * Unmap a region of bus space. 82 1.5.2.2 nathanw */ 83 1.5.2.2 nathanw 84 1.5.2.2 nathanw void bus_space_unmap (bus_space_tag_t, bus_space_handle_t, bus_size_t); 85 1.5.2.2 nathanw 86 1.5.2.2 nathanw /* 87 1.5.2.2 nathanw * int bus_space_subregion(bus_space_tag_t t, 88 1.5.2.2 nathanw * bus_space_handle_t bsh, bus_size_t offset, bus_size_t size, 89 1.5.2.2 nathanw * bus_space_handle_t *nbshp); 90 1.5.2.2 nathanw * 91 1.5.2.2 nathanw * Get a new handle for a subregion of an already-mapped area of bus space. 92 1.5.2.2 nathanw */ 93 1.5.2.2 nathanw 94 1.5.2.2 nathanw int bus_space_subregion(bus_space_tag_t t, bus_space_handle_t bsh, 95 1.5.2.2 nathanw bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp); 96 1.5.2.2 nathanw 97 1.5.2.2 nathanw /* 98 1.5.2.2 nathanw * int bus_space_alloc(bus_space_tag_t t, bus_addr_t, rstart, 99 1.5.2.2 nathanw * bus_addr_t rend, bus_size_t size, bus_size_t align, 100 1.5.2.2 nathanw * bus_size_t boundary, int flags, bus_addr_t *addrp, 101 1.5.2.2 nathanw * bus_space_handle_t *bshp); 102 1.5.2.2 nathanw * 103 1.5.2.2 nathanw * Allocate a region of bus space. 104 1.5.2.2 nathanw */ 105 1.5.2.2 nathanw 106 1.5.2.2 nathanw int bus_space_alloc (bus_space_tag_t t, bus_addr_t rstart, 107 1.5.2.2 nathanw bus_addr_t rend, bus_size_t size, bus_size_t align, 108 1.5.2.2 nathanw bus_size_t boundary, int cacheable, bus_addr_t *addrp, 109 1.5.2.2 nathanw bus_space_handle_t *bshp); 110 1.5.2.2 nathanw 111 1.5.2.2 nathanw /* 112 1.5.2.2 nathanw * int bus_space_free (bus_space_tag_t t, 113 1.5.2.2 nathanw * bus_space_handle_t bsh, bus_size_t size); 114 1.5.2.2 nathanw * 115 1.5.2.2 nathanw * Free a region of bus space. 116 1.5.2.2 nathanw */ 117 1.5.2.2 nathanw 118 1.5.2.2 nathanw void bus_space_free(bus_space_tag_t t, bus_space_handle_t bsh, 119 1.5.2.2 nathanw bus_size_t size); 120 1.5.2.2 nathanw 121 1.5.2.2 nathanw /* 122 1.5.2.2 nathanw * u_intN_t bus_space_read_N(bus_space_tag_t tag, 123 1.5.2.2 nathanw * bus_space_handle_t bsh, bus_size_t offset); 124 1.5.2.2 nathanw * 125 1.5.2.2 nathanw * Read a 1, 2, 4, or 8 byte quantity from bus space 126 1.5.2.2 nathanw * described by tag/handle/offset. 127 1.5.2.2 nathanw */ 128 1.5.2.2 nathanw 129 1.5.2.2 nathanw #define bus_space_read_1(t, h, o) \ 130 1.5.2.2 nathanw ((void) t, (*(volatile u_int8_t *)((h) + (o)))) 131 1.5.2.2 nathanw 132 1.5.2.2 nathanw #define bus_space_read_2(t, h, o) \ 133 1.5.2.2 nathanw ((void) t, (*(volatile u_int16_t *)((h) + (o)))) 134 1.5.2.2 nathanw 135 1.5.2.2 nathanw #define bus_space_read_4(t, h, o) \ 136 1.5.2.2 nathanw ((void) t, (*(volatile u_int32_t *)((h) + (o)))) 137 1.5.2.2 nathanw 138 1.5.2.2 nathanw #if 0 /* Cause a link error for bus_space_read_8 */ 139 1.5.2.2 nathanw #define bus_space_read_8(t, h, o) !!! bus_space_read_8 unimplemented !!! 140 1.5.2.2 nathanw #endif 141 1.5.2.2 nathanw 142 1.5.2.2 nathanw /* 143 1.5.2.2 nathanw * void bus_space_read_multi_N(bus_space_tag_t tag, 144 1.5.2.2 nathanw * bus_space_handle_t bsh, bus_size_t offset, 145 1.5.2.2 nathanw * u_intN_t *addr, size_t count); 146 1.5.2.2 nathanw * 147 1.5.2.2 nathanw * Read `count' 1, 2, 4, or 8 byte quantities from bus space 148 1.5.2.2 nathanw * described by tag/handle/offset and copy into buffer provided. 149 1.5.2.2 nathanw */ 150 1.5.2.2 nathanw 151 1.5.2.2 nathanw #define __NEWSMIPS_bus_space_read_multi(BYTES,BITS) \ 152 1.5.2.2 nathanw static __inline void __CONCAT(bus_space_read_multi_,BYTES) \ 153 1.5.2.2 nathanw (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 154 1.5.2.2 nathanw __PB_TYPENAME(BITS) *, size_t); \ 155 1.5.2.2 nathanw \ 156 1.5.2.2 nathanw static __inline void \ 157 1.5.2.2 nathanw __CONCAT(bus_space_read_multi_,BYTES)(t, h, o, a, c) \ 158 1.5.2.2 nathanw bus_space_tag_t t; \ 159 1.5.2.2 nathanw bus_space_handle_t h; \ 160 1.5.2.2 nathanw bus_size_t o; \ 161 1.5.2.2 nathanw __PB_TYPENAME(BITS) *a; \ 162 1.5.2.2 nathanw size_t c; \ 163 1.5.2.2 nathanw { \ 164 1.5.2.2 nathanw \ 165 1.5.2.2 nathanw while (c--) \ 166 1.5.2.2 nathanw *a++ = __CONCAT(bus_space_read_,BYTES)(t, h, o); \ 167 1.5.2.2 nathanw } 168 1.5.2.2 nathanw 169 1.5.2.2 nathanw __NEWSMIPS_bus_space_read_multi(1,8) 170 1.5.2.2 nathanw __NEWSMIPS_bus_space_read_multi(2,16) 171 1.5.2.2 nathanw __NEWSMIPS_bus_space_read_multi(4,32) 172 1.5.2.2 nathanw 173 1.5.2.2 nathanw #if 0 /* Cause a link error for bus_space_read_multi_8 */ 174 1.5.2.2 nathanw #define bus_space_read_multi_8 !!! bus_space_read_multi_8 unimplemented !!! 175 1.5.2.2 nathanw #endif 176 1.5.2.2 nathanw 177 1.5.2.2 nathanw #undef __NEWSMIPS_bus_space_read_multi 178 1.5.2.2 nathanw 179 1.5.2.2 nathanw /* 180 1.5.2.2 nathanw * void bus_space_read_region_N(bus_space_tag_t tag, 181 1.5.2.2 nathanw * bus_space_handle_t bsh, bus_size_t offset, 182 1.5.2.2 nathanw * u_intN_t *addr, size_t count); 183 1.5.2.2 nathanw * 184 1.5.2.2 nathanw * Read `count' 1, 2, 4, or 8 byte quantities from bus space 185 1.5.2.2 nathanw * described by tag/handle and starting at `offset' and copy into 186 1.5.2.2 nathanw * buffer provided. 187 1.5.2.2 nathanw */ 188 1.5.2.2 nathanw 189 1.5.2.2 nathanw #define __NEWSMIPS_bus_space_read_region(BYTES,BITS) \ 190 1.5.2.2 nathanw static __inline void __CONCAT(bus_space_read_region_,BYTES) \ 191 1.5.2.2 nathanw (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 192 1.5.2.2 nathanw __PB_TYPENAME(BITS) *, size_t); \ 193 1.5.2.2 nathanw \ 194 1.5.2.2 nathanw static __inline void \ 195 1.5.2.2 nathanw __CONCAT(bus_space_read_region_,BYTES)(t, h, o, a, c) \ 196 1.5.2.2 nathanw bus_space_tag_t t; \ 197 1.5.2.2 nathanw bus_space_handle_t h; \ 198 1.5.2.2 nathanw bus_size_t o; \ 199 1.5.2.2 nathanw __PB_TYPENAME(BITS) *a; \ 200 1.5.2.2 nathanw size_t c; \ 201 1.5.2.2 nathanw { \ 202 1.5.2.2 nathanw \ 203 1.5.2.2 nathanw while (c--) { \ 204 1.5.2.2 nathanw *a++ = __CONCAT(bus_space_read_,BYTES)(t, h, o); \ 205 1.5.2.2 nathanw o += BYTES; \ 206 1.5.2.2 nathanw } \ 207 1.5.2.2 nathanw } 208 1.5.2.2 nathanw 209 1.5.2.2 nathanw __NEWSMIPS_bus_space_read_region(1,8) 210 1.5.2.2 nathanw __NEWSMIPS_bus_space_read_region(2,16) 211 1.5.2.2 nathanw __NEWSMIPS_bus_space_read_region(4,32) 212 1.5.2.2 nathanw 213 1.5.2.2 nathanw #if 0 /* Cause a link error for bus_space_read_region_8 */ 214 1.5.2.2 nathanw #define bus_space_read_region_8 !!! bus_space_read_region_8 unimplemented !!! 215 1.5.2.2 nathanw #endif 216 1.5.2.2 nathanw 217 1.5.2.2 nathanw #undef __NEWSMIPS_bus_space_read_region 218 1.5.2.2 nathanw 219 1.5.2.2 nathanw /* 220 1.5.2.2 nathanw * void bus_space_write_N(bus_space_tag_t tag, 221 1.5.2.2 nathanw * bus_space_handle_t bsh, bus_size_t offset, 222 1.5.2.2 nathanw * u_intN_t value); 223 1.5.2.2 nathanw * 224 1.5.2.2 nathanw * Write the 1, 2, 4, or 8 byte value `value' to bus space 225 1.5.2.2 nathanw * described by tag/handle/offset. 226 1.5.2.2 nathanw */ 227 1.5.2.2 nathanw 228 1.5.2.2 nathanw #define bus_space_write_1(t, h, o, v) \ 229 1.5.2.2 nathanw do { \ 230 1.5.2.2 nathanw (void) t; \ 231 1.5.2.2 nathanw *(volatile u_int8_t *)((h) + (o)) = (v); \ 232 1.5.2.2 nathanw } while (0) 233 1.5.2.2 nathanw 234 1.5.2.2 nathanw #define bus_space_write_2(t, h, o, v) \ 235 1.5.2.2 nathanw do { \ 236 1.5.2.2 nathanw (void) t; \ 237 1.5.2.2 nathanw *(volatile u_int16_t *)((h) + (o)) = (v); \ 238 1.5.2.2 nathanw } while (0) 239 1.5.2.2 nathanw 240 1.5.2.2 nathanw #define bus_space_write_4(t, h, o, v) \ 241 1.5.2.2 nathanw do { \ 242 1.5.2.2 nathanw (void) t; \ 243 1.5.2.2 nathanw *(volatile u_int32_t *)((h) + (o)) = (v); \ 244 1.5.2.2 nathanw } while (0) 245 1.5.2.2 nathanw 246 1.5.2.2 nathanw #if 0 /* Cause a link error for bus_space_write_8 */ 247 1.5.2.2 nathanw #define bus_space_write_8 !!! bus_space_write_8 not implemented !!! 248 1.5.2.2 nathanw #endif 249 1.5.2.2 nathanw 250 1.5.2.2 nathanw /* 251 1.5.2.2 nathanw * void bus_space_write_multi_N(bus_space_tag_t tag, 252 1.5.2.2 nathanw * bus_space_handle_t bsh, bus_size_t offset, 253 1.5.2.2 nathanw * const u_intN_t *addr, size_t count); 254 1.5.2.2 nathanw * 255 1.5.2.2 nathanw * Write `count' 1, 2, 4, or 8 byte quantities from the buffer 256 1.5.2.2 nathanw * provided to bus space described by tag/handle/offset. 257 1.5.2.2 nathanw */ 258 1.5.2.2 nathanw 259 1.5.2.2 nathanw #define __NEWSMIPS_bus_space_write_multi(BYTES,BITS) \ 260 1.5.2.2 nathanw static __inline void __CONCAT(bus_space_write_multi_,BYTES) \ 261 1.5.2.2 nathanw (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 262 1.5.2.2 nathanw const __PB_TYPENAME(BITS) *, size_t); \ 263 1.5.2.2 nathanw \ 264 1.5.2.2 nathanw static __inline void \ 265 1.5.2.2 nathanw __CONCAT(bus_space_write_multi_,BYTES)(t, h, o, a, c) \ 266 1.5.2.2 nathanw bus_space_tag_t t; \ 267 1.5.2.2 nathanw bus_space_handle_t h; \ 268 1.5.2.2 nathanw bus_size_t o; \ 269 1.5.2.2 nathanw const __PB_TYPENAME(BITS) *a; \ 270 1.5.2.2 nathanw size_t c; \ 271 1.5.2.2 nathanw { \ 272 1.5.2.2 nathanw \ 273 1.5.2.2 nathanw while (c--) \ 274 1.5.2.2 nathanw __CONCAT(bus_space_write_,BYTES)(t, h, o, *a++); \ 275 1.5.2.2 nathanw } 276 1.5.2.2 nathanw 277 1.5.2.2 nathanw __NEWSMIPS_bus_space_write_multi(1,8) 278 1.5.2.2 nathanw __NEWSMIPS_bus_space_write_multi(2,16) 279 1.5.2.2 nathanw __NEWSMIPS_bus_space_write_multi(4,32) 280 1.5.2.2 nathanw 281 1.5.2.2 nathanw #if 0 /* Cause a link error for bus_space_write_8 */ 282 1.5.2.2 nathanw #define bus_space_write_multi_8(t, h, o, a, c) \ 283 1.5.2.2 nathanw !!! bus_space_write_multi_8 unimplimented !!! 284 1.5.2.2 nathanw #endif 285 1.5.2.2 nathanw 286 1.5.2.2 nathanw #undef __NEWSMIPS_bus_space_write_multi 287 1.5.2.2 nathanw 288 1.5.2.2 nathanw /* 289 1.5.2.2 nathanw * void bus_space_write_region_N(bus_space_tag_t tag, 290 1.5.2.2 nathanw * bus_space_handle_t bsh, bus_size_t offset, 291 1.5.2.2 nathanw * const u_intN_t *addr, size_t count); 292 1.5.2.2 nathanw * 293 1.5.2.2 nathanw * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided 294 1.5.2.2 nathanw * to bus space described by tag/handle starting at `offset'. 295 1.5.2.2 nathanw */ 296 1.5.2.2 nathanw 297 1.5.2.2 nathanw #define __NEWSMIPS_bus_space_write_region(BYTES,BITS) \ 298 1.5.2.2 nathanw static __inline void __CONCAT(bus_space_write_region_,BYTES) \ 299 1.5.2.2 nathanw (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 300 1.5.2.2 nathanw const __PB_TYPENAME(BITS) *, size_t); \ 301 1.5.2.2 nathanw \ 302 1.5.2.2 nathanw static __inline void \ 303 1.5.2.2 nathanw __CONCAT(bus_space_write_region_,BYTES)(t, h, o, a, c) \ 304 1.5.2.2 nathanw bus_space_tag_t t; \ 305 1.5.2.2 nathanw bus_space_handle_t h; \ 306 1.5.2.2 nathanw bus_size_t o; \ 307 1.5.2.2 nathanw const __PB_TYPENAME(BITS) *a; \ 308 1.5.2.2 nathanw size_t c; \ 309 1.5.2.2 nathanw { \ 310 1.5.2.2 nathanw \ 311 1.5.2.2 nathanw while (c--) { \ 312 1.5.2.2 nathanw __CONCAT(bus_space_write_,BYTES)(t, h, o, *a++); \ 313 1.5.2.2 nathanw o += BYTES; \ 314 1.5.2.2 nathanw } \ 315 1.5.2.2 nathanw } 316 1.5.2.2 nathanw 317 1.5.2.2 nathanw __NEWSMIPS_bus_space_write_region(1,8) 318 1.5.2.2 nathanw __NEWSMIPS_bus_space_write_region(2,16) 319 1.5.2.2 nathanw __NEWSMIPS_bus_space_write_region(4,32) 320 1.5.2.2 nathanw 321 1.5.2.2 nathanw #if 0 /* Cause a link error for bus_space_write_region_8 */ 322 1.5.2.2 nathanw #define bus_space_write_region_8 \ 323 1.5.2.2 nathanw !!! bus_space_write_region_8 unimplemented !!! 324 1.5.2.2 nathanw #endif 325 1.5.2.2 nathanw 326 1.5.2.2 nathanw #undef __NEWSMIPS_bus_space_write_region 327 1.5.2.2 nathanw 328 1.5.2.2 nathanw /* 329 1.5.2.2 nathanw * void bus_space_set_multi_N(bus_space_tag_t tag, 330 1.5.2.2 nathanw * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val, 331 1.5.2.2 nathanw * size_t count); 332 1.5.2.2 nathanw * 333 1.5.2.2 nathanw * Write the 1, 2, 4, or 8 byte value `val' to bus space described 334 1.5.2.2 nathanw * by tag/handle/offset `count' times. 335 1.5.2.2 nathanw */ 336 1.5.2.2 nathanw 337 1.5.2.2 nathanw #define __NEWSMIPS_bus_space_set_multi(BYTES,BITS) \ 338 1.5.2.2 nathanw static __inline void __CONCAT(bus_space_set_multi_,BYTES) \ 339 1.5.2.2 nathanw (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 340 1.5.2.2 nathanw __PB_TYPENAME(BITS), size_t); \ 341 1.5.2.2 nathanw \ 342 1.5.2.2 nathanw static __inline void \ 343 1.5.2.2 nathanw __CONCAT(bus_space_set_multi_,BYTES)(t, h, o, v, c) \ 344 1.5.2.2 nathanw bus_space_tag_t t; \ 345 1.5.2.2 nathanw bus_space_handle_t h; \ 346 1.5.2.2 nathanw bus_size_t o; \ 347 1.5.2.2 nathanw __PB_TYPENAME(BITS) v; \ 348 1.5.2.2 nathanw size_t c; \ 349 1.5.2.2 nathanw { \ 350 1.5.2.2 nathanw \ 351 1.5.2.2 nathanw while (c--) \ 352 1.5.2.2 nathanw __CONCAT(bus_space_write_,BYTES)(t, h, o, v); \ 353 1.5.2.2 nathanw } 354 1.5.2.2 nathanw 355 1.5.2.2 nathanw __NEWSMIPS_bus_space_set_multi(1,8) 356 1.5.2.2 nathanw __NEWSMIPS_bus_space_set_multi(2,16) 357 1.5.2.2 nathanw __NEWSMIPS_bus_space_set_multi(4,32) 358 1.5.2.2 nathanw 359 1.5.2.2 nathanw #if 0 /* Cause a link error for bus_space_set_multi_8 */ 360 1.5.2.2 nathanw #define bus_space_set_multi_8 \ 361 1.5.2.2 nathanw !!! bus_space_set_multi_8 unimplemented !!! 362 1.5.2.2 nathanw #endif 363 1.5.2.2 nathanw 364 1.5.2.2 nathanw #undef __NEWSMIPS_bus_space_set_multi 365 1.5.2.2 nathanw 366 1.5.2.2 nathanw /* 367 1.5.2.2 nathanw * void bus_space_set_region_N(bus_space_tag_t tag, 368 1.5.2.2 nathanw * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val, 369 1.5.2.2 nathanw * size_t count); 370 1.5.2.2 nathanw * 371 1.5.2.2 nathanw * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described 372 1.5.2.2 nathanw * by tag/handle starting at `offset'. 373 1.5.2.2 nathanw */ 374 1.5.2.2 nathanw 375 1.5.2.2 nathanw #define __NEWSMIPS_bus_space_set_region(BYTES,BITS) \ 376 1.5.2.2 nathanw static __inline void __CONCAT(bus_space_set_region_,BYTES) \ 377 1.5.2.2 nathanw (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 378 1.5.2.2 nathanw __PB_TYPENAME(BITS), size_t); \ 379 1.5.2.2 nathanw \ 380 1.5.2.2 nathanw static __inline void \ 381 1.5.2.2 nathanw __CONCAT(bus_space_set_region_,BYTES)(t, h, o, v, c) \ 382 1.5.2.2 nathanw bus_space_tag_t t; \ 383 1.5.2.2 nathanw bus_space_handle_t h; \ 384 1.5.2.2 nathanw bus_size_t o; \ 385 1.5.2.2 nathanw __PB_TYPENAME(BITS) v; \ 386 1.5.2.2 nathanw size_t c; \ 387 1.5.2.2 nathanw { \ 388 1.5.2.2 nathanw \ 389 1.5.2.2 nathanw while (c--) { \ 390 1.5.2.2 nathanw __CONCAT(bus_space_write_,BYTES)(t, h, o, v); \ 391 1.5.2.2 nathanw o += BYTES; \ 392 1.5.2.2 nathanw } \ 393 1.5.2.2 nathanw } 394 1.5.2.2 nathanw 395 1.5.2.2 nathanw __NEWSMIPS_bus_space_set_region(1,8) 396 1.5.2.2 nathanw __NEWSMIPS_bus_space_set_region(2,16) 397 1.5.2.2 nathanw __NEWSMIPS_bus_space_set_region(4,32) 398 1.5.2.2 nathanw 399 1.5.2.2 nathanw #if 0 /* Cause a link error for bus_space_set_region_8 */ 400 1.5.2.2 nathanw #define bus_space_set_region_8 \ 401 1.5.2.2 nathanw !!! bus_space_set_region_8 unimplemented !!! 402 1.5.2.2 nathanw #endif 403 1.5.2.2 nathanw 404 1.5.2.2 nathanw #undef __NEWSMIPS_bus_space_set_region 405 1.5.2.2 nathanw 406 1.5.2.2 nathanw /* 407 1.5.2.2 nathanw * void bus_space_copy_region_N(bus_space_tag_t tag, 408 1.5.2.2 nathanw * bus_space_handle_t bsh1, bus_size_t off1, 409 1.5.2.2 nathanw * bus_space_handle_t bsh2, bus_size_t off2, 410 1.5.2.2 nathanw * bus_size_t count); 411 1.5.2.2 nathanw * 412 1.5.2.2 nathanw * Copy `count' 1, 2, 4, or 8 byte values from bus space starting 413 1.5.2.2 nathanw * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2. 414 1.5.2.2 nathanw */ 415 1.5.2.2 nathanw 416 1.5.2.2 nathanw #define __NEWSMIPS_copy_region(BYTES) \ 417 1.5.2.2 nathanw static __inline void __CONCAT(bus_space_copy_region_,BYTES) \ 418 1.5.2.2 nathanw (bus_space_tag_t, \ 419 1.5.2.2 nathanw bus_space_handle_t bsh1, bus_size_t off1, \ 420 1.5.2.2 nathanw bus_space_handle_t bsh2, bus_size_t off2, \ 421 1.5.2.2 nathanw bus_size_t count); \ 422 1.5.2.2 nathanw \ 423 1.5.2.2 nathanw static __inline void \ 424 1.5.2.2 nathanw __CONCAT(bus_space_copy_region_,BYTES)(t, h1, o1, h2, o2, c) \ 425 1.5.2.2 nathanw bus_space_tag_t t; \ 426 1.5.2.2 nathanw bus_space_handle_t h1, h2; \ 427 1.5.2.2 nathanw bus_size_t o1, o2, c; \ 428 1.5.2.2 nathanw { \ 429 1.5.2.2 nathanw bus_size_t o; \ 430 1.5.2.2 nathanw \ 431 1.5.2.2 nathanw if ((h1 + o1) >= (h2 + o2)) { \ 432 1.5.2.2 nathanw /* src after dest: copy forward */ \ 433 1.5.2.2 nathanw for (o = 0; c != 0; c--, o += BYTES) \ 434 1.5.2.2 nathanw __CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \ 435 1.5.2.2 nathanw __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \ 436 1.5.2.2 nathanw } else { \ 437 1.5.2.2 nathanw /* dest after src: copy backwards */ \ 438 1.5.2.2 nathanw for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) \ 439 1.5.2.2 nathanw __CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \ 440 1.5.2.2 nathanw __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \ 441 1.5.2.2 nathanw } \ 442 1.5.2.2 nathanw } 443 1.5.2.2 nathanw 444 1.5.2.2 nathanw __NEWSMIPS_copy_region(1) 445 1.5.2.2 nathanw __NEWSMIPS_copy_region(2) 446 1.5.2.2 nathanw __NEWSMIPS_copy_region(4) 447 1.5.2.2 nathanw 448 1.5.2.2 nathanw #if 0 /* Cause a link error for bus_space_copy_region_8 */ 449 1.5.2.2 nathanw #define bus_space_copy_region_8 \ 450 1.5.2.2 nathanw !!! bus_space_copy_region_8 unimplemented !!! 451 1.5.2.2 nathanw #endif 452 1.5.2.2 nathanw 453 1.5.2.2 nathanw #undef __NEWSMIPS_copy_region 454 1.5.2.2 nathanw 455 1.5.2.2 nathanw /* 456 1.5.2.2 nathanw * Bus read/write barrier methods. 457 1.5.2.2 nathanw * 458 1.5.2.2 nathanw * void bus_space_barrier(bus_space_tag_t tag, 459 1.5.2.2 nathanw * bus_space_handle_t bsh, bus_size_t offset, 460 1.5.2.2 nathanw * bus_size_t len, int flags); 461 1.5.2.2 nathanw * 462 1.5.2.2 nathanw * On the MIPS, we just flush the write buffer. 463 1.5.2.2 nathanw */ 464 1.5.2.2 nathanw #define bus_space_barrier(t, h, o, l, f) \ 465 1.5.2.2 nathanw ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)), \ 466 1.5.2.2 nathanw wbflush()) 467 1.5.2.2 nathanw #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */ 468 1.5.2.2 nathanw #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */ 469 1.5.2.2 nathanw 470 1.5.2.2 nathanw #undef __PB_TYPENAME_PREFIX 471 1.5.2.2 nathanw #undef __PB_TYPENAME 472 1.5.2.2 nathanw 473 1.5.2.2 nathanw #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t) 474 1.5.2.2 nathanw 475 1.5.2.2 nathanw /* 476 1.5.2.2 nathanw * Flags used in various bus DMA methods. 477 1.5.2.2 nathanw */ 478 1.5.2.2 nathanw #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */ 479 1.5.2.2 nathanw #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */ 480 1.5.2.2 nathanw #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */ 481 1.5.2.2 nathanw #define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */ 482 1.5.2.2 nathanw #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */ 483 1.5.2.2 nathanw #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */ 484 1.5.2.2 nathanw #define BUS_DMA_BUS2 0x020 485 1.5.2.2 nathanw #define BUS_DMA_BUS3 0x040 486 1.5.2.2 nathanw #define BUS_DMA_BUS4 0x080 487 1.5.2.2 nathanw #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */ 488 1.5.2.2 nathanw #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */ 489 1.5.2.2 nathanw 490 1.5.2.2 nathanw #define NEWSMIPS_DMAMAP_COHERENT 0x10000 /* no cache flush necessary on sync */ 491 1.5.2.2 nathanw #define NEWSMIPS_DMAMAP_MAPTBL 0x20000 /* use DMA maping table */ 492 1.5.2.2 nathanw 493 1.5.2.2 nathanw /* Forwards needed by prototypes below. */ 494 1.5.2.2 nathanw struct mbuf; 495 1.5.2.2 nathanw struct uio; 496 1.5.2.2 nathanw 497 1.5.2.2 nathanw /* 498 1.5.2.2 nathanw * Operations performed by bus_dmamap_sync(). 499 1.5.2.2 nathanw */ 500 1.5.2.2 nathanw #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */ 501 1.5.2.2 nathanw #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */ 502 1.5.2.2 nathanw #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */ 503 1.5.2.2 nathanw #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */ 504 1.5.2.2 nathanw 505 1.5.2.2 nathanw typedef struct newsmips_bus_dma_tag *bus_dma_tag_t; 506 1.5.2.2 nathanw typedef struct newsmips_bus_dmamap *bus_dmamap_t; 507 1.5.2.2 nathanw 508 1.5.2.2 nathanw /* 509 1.5.2.2 nathanw * bus_dma_segment_t 510 1.5.2.2 nathanw * 511 1.5.2.2 nathanw * Describes a single contiguous DMA transaction. Values 512 1.5.2.2 nathanw * are suitable for programming into DMA registers. 513 1.5.2.2 nathanw */ 514 1.5.2.2 nathanw struct newsmips_bus_dma_segment { 515 1.5.2.2 nathanw bus_addr_t ds_addr; /* DMA address */ 516 1.5.2.2 nathanw bus_size_t ds_len; /* length of transfer */ 517 1.5.2.2 nathanw bus_addr_t _ds_vaddr; /* virtual address, 0 if invalid */ 518 1.5.2.2 nathanw }; 519 1.5.2.2 nathanw typedef struct newsmips_bus_dma_segment bus_dma_segment_t; 520 1.5.2.2 nathanw 521 1.5.2.2 nathanw /* 522 1.5.2.2 nathanw * bus_dma_tag_t 523 1.5.2.2 nathanw * 524 1.5.2.2 nathanw * A machine-dependent opaque type describing the implementation of 525 1.5.2.2 nathanw * DMA for a given bus. 526 1.5.2.2 nathanw */ 527 1.5.2.2 nathanw 528 1.5.2.2 nathanw struct newsmips_bus_dma_tag { 529 1.5.2.2 nathanw /* 530 1.5.2.2 nathanw * DMA mapping methods. 531 1.5.2.2 nathanw */ 532 1.5.2.2 nathanw int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int, 533 1.5.2.2 nathanw bus_size_t, bus_size_t, int, bus_dmamap_t *); 534 1.5.2.2 nathanw void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t); 535 1.5.2.2 nathanw int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *, 536 1.5.2.2 nathanw bus_size_t, struct proc *, int); 537 1.5.2.2 nathanw int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t, 538 1.5.2.2 nathanw struct mbuf *, int); 539 1.5.2.2 nathanw int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t, 540 1.5.2.2 nathanw struct uio *, int); 541 1.5.2.2 nathanw int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t, 542 1.5.2.2 nathanw bus_dma_segment_t *, int, bus_size_t, int); 543 1.5.2.2 nathanw void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t); 544 1.5.2.2 nathanw void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t, 545 1.5.2.2 nathanw bus_addr_t, bus_size_t, int); 546 1.5.2.2 nathanw 547 1.5.2.2 nathanw /* 548 1.5.2.2 nathanw * DMA memory utility functions. 549 1.5.2.2 nathanw */ 550 1.5.2.2 nathanw int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t, 551 1.5.2.2 nathanw bus_size_t, bus_dma_segment_t *, int, int *, int); 552 1.5.2.2 nathanw void (*_dmamem_free)(bus_dma_tag_t, 553 1.5.2.2 nathanw bus_dma_segment_t *, int); 554 1.5.2.2 nathanw int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *, 555 1.5.2.2 nathanw int, size_t, caddr_t *, int); 556 1.5.2.2 nathanw void (*_dmamem_unmap)(bus_dma_tag_t, caddr_t, size_t); 557 1.5.2.2 nathanw paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *, 558 1.5.2.2 nathanw int, off_t, int, int); 559 1.5.2.2 nathanw 560 1.5.2.2 nathanw /* 561 1.5.2.2 nathanw * NEWSMIPS quirks. 562 1.5.2.2 nathanw * This is NOT a constant. Slot dependent information is 563 1.5.2.2 nathanw * required to flush DMA cache correctly. 564 1.5.2.2 nathanw */ 565 1.5.2.2 nathanw int _slotno; 566 1.5.2.2 nathanw bus_space_tag_t _slotbaset; 567 1.5.2.2 nathanw bus_space_handle_t _slotbaseh; 568 1.5.2.2 nathanw }; 569 1.5.2.2 nathanw 570 1.5.2.2 nathanw #define bus_dmamap_create(t, s, n, m, b, f, p) \ 571 1.5.2.2 nathanw (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p)) 572 1.5.2.2 nathanw #define bus_dmamap_destroy(t, p) \ 573 1.5.2.2 nathanw (*(t)->_dmamap_destroy)((t), (p)) 574 1.5.2.2 nathanw #define bus_dmamap_load(t, m, b, s, p, f) \ 575 1.5.2.2 nathanw (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f)) 576 1.5.2.2 nathanw #define bus_dmamap_load_mbuf(t, m, b, f) \ 577 1.5.2.2 nathanw (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f)) 578 1.5.2.2 nathanw #define bus_dmamap_load_uio(t, m, u, f) \ 579 1.5.2.2 nathanw (*(t)->_dmamap_load_uio)((t), (m), (u), (f)) 580 1.5.2.2 nathanw #define bus_dmamap_load_raw(t, m, sg, n, s, f) \ 581 1.5.2.2 nathanw (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f)) 582 1.5.2.2 nathanw #define bus_dmamap_unload(t, p) \ 583 1.5.2.2 nathanw (*(t)->_dmamap_unload)((t), (p)) 584 1.5.2.2 nathanw #define bus_dmamap_sync(t, p, o, l, ops) \ 585 1.5.2.2 nathanw (*(t)->_dmamap_sync)((t), (p), (o), (l), (ops)) 586 1.5.2.2 nathanw 587 1.5.2.2 nathanw #define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \ 588 1.5.2.2 nathanw (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f)) 589 1.5.2.2 nathanw #define bus_dmamem_free(t, sg, n) \ 590 1.5.2.2 nathanw (*(t)->_dmamem_free)((t), (sg), (n)) 591 1.5.2.2 nathanw #define bus_dmamem_map(t, sg, n, s, k, f) \ 592 1.5.2.2 nathanw (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f)) 593 1.5.2.2 nathanw #define bus_dmamem_unmap(t, k, s) \ 594 1.5.2.2 nathanw (*(t)->_dmamem_unmap)((t), (k), (s)) 595 1.5.2.2 nathanw #define bus_dmamem_mmap(t, sg, n, o, p, f) \ 596 1.5.2.2 nathanw (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f)) 597 1.5.2.2 nathanw 598 1.5.2.2 nathanw /* 599 1.5.2.2 nathanw * bus_dmamap_t 600 1.5.2.2 nathanw * 601 1.5.2.2 nathanw * Describes a DMA mapping. 602 1.5.2.2 nathanw */ 603 1.5.2.2 nathanw struct newsmips_bus_dmamap { 604 1.5.2.2 nathanw /* 605 1.5.2.2 nathanw * PRIVATE MEMBERS: not for use my machine-independent code. 606 1.5.2.2 nathanw */ 607 1.5.2.2 nathanw bus_size_t _dm_size; /* largest DMA transfer mappable */ 608 1.5.2.2 nathanw int _dm_segcnt; /* number of segs this map can map */ 609 1.5.2.2 nathanw bus_size_t _dm_maxsegsz; /* largest possible segment */ 610 1.5.2.2 nathanw bus_size_t _dm_boundary; /* don't cross this */ 611 1.5.2.2 nathanw int _dm_flags; /* misc. flags */ 612 1.5.2.2 nathanw int _dm_maptbl; /* DMA mapping table index */ 613 1.5.2.2 nathanw int _dm_maptblcnt; /* number of DMA mapping table */ 614 1.5.2.2 nathanw struct proc *_dm_proc; /* proc that owns the mapping */ 615 1.5.2.2 nathanw 616 1.5.2.2 nathanw /* 617 1.5.2.2 nathanw * PUBLIC MEMBERS: these are used by machine-independent code. 618 1.5.2.2 nathanw */ 619 1.5.2.2 nathanw bus_size_t dm_mapsize; /* size of the mapping */ 620 1.5.2.2 nathanw int dm_nsegs; /* # valid segments in mapping */ 621 1.5.2.2 nathanw bus_dma_segment_t dm_segs[1]; /* segments; variable length */ 622 1.5.2.2 nathanw }; 623 1.5.2.2 nathanw 624 1.5.2.2 nathanw #ifdef _NEWSMIPS_BUS_DMA_PRIVATE 625 1.5.2.2 nathanw void newsmips_bus_dma_init(void); 626 1.5.2.2 nathanw 627 1.5.2.2 nathanw int _bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t, 628 1.5.2.2 nathanw bus_size_t, int, bus_dmamap_t *); 629 1.5.2.2 nathanw void _bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t); 630 1.5.2.2 nathanw int _bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *, 631 1.5.2.2 nathanw bus_size_t, struct proc *, int); 632 1.5.2.2 nathanw int _bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t, 633 1.5.2.2 nathanw struct mbuf *, int); 634 1.5.2.2 nathanw int _bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t, 635 1.5.2.2 nathanw struct uio *, int); 636 1.5.2.2 nathanw int _bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t, 637 1.5.2.2 nathanw bus_dma_segment_t *, int, bus_size_t, int); 638 1.5.2.2 nathanw void _bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t); 639 1.5.2.2 nathanw void _bus_dmamap_sync_r3k(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 640 1.5.2.2 nathanw bus_size_t, int); 641 1.5.2.2 nathanw void _bus_dmamap_sync_r4k(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 642 1.5.2.2 nathanw bus_size_t, int); 643 1.5.2.2 nathanw 644 1.5.2.2 nathanw int _bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size, 645 1.5.2.2 nathanw bus_size_t alignment, bus_size_t boundary, 646 1.5.2.2 nathanw bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags); 647 1.5.2.2 nathanw void _bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs, 648 1.5.2.2 nathanw int nsegs); 649 1.5.2.2 nathanw int _bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs, 650 1.5.2.2 nathanw int nsegs, size_t size, caddr_t *kvap, int flags); 651 1.5.2.2 nathanw void _bus_dmamem_unmap(bus_dma_tag_t tag, caddr_t kva, 652 1.5.2.2 nathanw size_t size); 653 1.5.2.2 nathanw paddr_t _bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs, 654 1.5.2.2 nathanw int nsegs, off_t off, int prot, int flags); 655 1.5.2.2 nathanw 656 1.5.2.2 nathanw int _bus_dmamem_alloc_range(bus_dma_tag_t tag, bus_size_t size, 657 1.5.2.2 nathanw bus_size_t alignment, bus_size_t boundary, 658 1.5.2.2 nathanw bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags, 659 1.5.2.2 nathanw vaddr_t low, vaddr_t high); 660 1.5.2.2 nathanw 661 1.5.2.2 nathanw extern struct newsmips_bus_dma_tag newsmips_default_bus_dma_tag; 662 1.5.2.2 nathanw #endif /* _NEWSMIPS_BUS_DMA_PRIVATE */ 663 1.5.2.2 nathanw 664 1.5.2.2 nathanw #endif /* _NEWSMIPS_BUS_H_ */ 665
Indexes created Sun Nov 02 23:10:09 GMT 2025