intr.h revision 1.19.8.1 1 /* $NetBSD: intr.h,v 1.19.8.1 2007/07/11 20:01:05 mjf Exp $ */
2
3 /*-
4 * Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 #ifndef _MACHINE_INTR_H_
40 #define _MACHINE_INTR_H_
41
42 #define IPL_NONE 0 /* disable only this interrupt */
43 #define IPL_SOFT 1 /* generic software interrupts (SI 0) */
44 #define IPL_SOFTCLOCK 2 /* clock software interrupts (SI 0) */
45 #define IPL_SOFTNET 3 /* network software interrupts (SI 1) */
46 #define IPL_SOFTSERIAL 4 /* serial software interrupts (SI 1) */
47 #define IPL_BIO 5 /* disable block I/O interrupts */
48 #define IPL_NET 6 /* disable network interrupts */
49 #define IPL_TTY 7 /* disable terminal interrupts */
50 #define IPL_LPT IPL_TTY
51 #define IPL_VM IPL_TTY
52 #define IPL_SERIAL 7 /* disable serial hardware interrupts */
53 #define IPL_CLOCK 8 /* disable clock interrupts */
54 #define IPL_STATCLOCK IPL_CLOCK
55 #define IPL_SCHED IPL_CLOCK
56 #define IPL_HIGH 8 /* disable all interrupts */
57 #define IPL_LOCK IPL_HIGH
58
59 #define _IPL_N 9
60
61 #define _IPL_SI0_FIRST IPL_SOFT
62 #define _IPL_SI0_LAST IPL_SOFTCLOCK
63
64 #define _IPL_SI1_FIRST IPL_SOFTNET
65 #define _IPL_SI1_LAST IPL_SOFTSERIAL
66
67 #define SI_SOFT 0
68 #define SI_SOFTCLOCK 1
69 #define SI_SOFTNET 2
70 #define SI_SOFTSERIAL 3
71
72 #define SI_NQUEUES 4
73
74 #define SI_QUEUENAMES { \
75 "misc", \
76 "clock", \
77 "net", \
78 "serial", \
79 }
80
81 #ifdef _KERNEL
82 #ifndef _LOCORE
83
84 #include <sys/device.h>
85 #include <mips/locore.h>
86
87 extern const uint32_t ipl_sr_bits[_IPL_N];
88
89 #define spl0() (void)_spllower(0)
90 #define splx(s) (void)_splset(s)
91
92 #define splsoft() _splraise(ipl_sr_bits[IPL_SOFT])
93
94 typedef int ipl_t;
95 typedef struct {
96 ipl_t _sr;
97 } ipl_cookie_t;
98
99 static inline ipl_cookie_t
100 makeiplcookie(ipl_t ipl)
101 {
102
103 return (ipl_cookie_t){._sr = ipl_sr_bits[ipl]};
104 }
105
106 static inline int
107 splraiseipl(ipl_cookie_t icookie)
108 {
109
110 return _splraise(icookie._sr);
111 }
112
113 #include <sys/spl.h>
114
115 struct newsmips_intrhand {
116 LIST_ENTRY(newsmips_intrhand) ih_q;
117 struct evcnt intr_count;
118 int (*ih_func)(void *);
119 void *ih_arg;
120 u_int ih_level;
121 u_int ih_mask;
122 u_int ih_priority;
123 };
124
125 struct newsmips_intr {
126 LIST_HEAD(,newsmips_intrhand) intr_q;
127 };
128
129 #include <mips/softintr.h>
130
131 /*
132 * Index into intrcnt[], which is defined in locore
133 */
134 #define SERIAL0_INTR 0
135 #define SERIAL1_INTR 1
136 #define SERIAL2_INTR 2
137 #define LANCE_INTR 3
138 #define SCSI_INTR 4
139 #define ERROR_INTR 5
140 #define HARDCLOCK_INTR 6
141 #define FPU_INTR 7
142 #define SLOT1_INTR 8
143 #define SLOT2_INTR 9
144 #define SLOT3_INTR 10
145 #define FLOPPY_INTR 11
146 #define STRAY_INTR 12
147
148 extern u_int intrcnt[];
149
150 /* handle i/o device interrupts */
151 #ifdef news3400
152 void news3400_intr(uint32_t, uint32_t, uint32_t, uint32_t);
153 #endif
154 #ifdef news5000
155 void news5000_intr(uint32_t, uint32_t, uint32_t, uint32_t);
156 #endif
157 extern void (*hardware_intr)(uint32_t, uint32_t, uint32_t, uint32_t);
158
159 extern void (*enable_intr)(void);
160 extern void (*disable_intr)(void);
161 extern void (*enable_timer)(void);
162
163 #endif /* !_LOCORE */
164 #endif /* _KERNEL */
165 #endif /* _MACHINE_INTR_H_ */
166