news5000.c revision 1.19 1 1.19 tsutsui /* $NetBSD: news5000.c,v 1.19 2011/03/09 13:21:36 tsutsui Exp $ */
2 1.1 tsubai
3 1.1 tsubai /*-
4 1.1 tsubai * Copyright (C) 1999 SHIMIZU Ryo. All rights reserved.
5 1.1 tsubai *
6 1.1 tsubai * Redistribution and use in source and binary forms, with or without
7 1.1 tsubai * modification, are permitted provided that the following conditions
8 1.1 tsubai * are met:
9 1.1 tsubai * 1. Redistributions of source code must retain the above copyright
10 1.1 tsubai * notice, this list of conditions and the following disclaimer.
11 1.1 tsubai * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 tsubai * notice, this list of conditions and the following disclaimer in the
13 1.1 tsubai * documentation and/or other materials provided with the distribution.
14 1.1 tsubai * 3. The name of the author may not be used to endorse or promote products
15 1.1 tsubai * derived from this software without specific prior written permission.
16 1.1 tsubai *
17 1.1 tsubai * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 1.1 tsubai * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 1.1 tsubai * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 1.1 tsubai * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 1.1 tsubai * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 1.1 tsubai * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 1.1 tsubai * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 1.1 tsubai * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 1.1 tsubai * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 1.1 tsubai * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 1.1 tsubai */
28 1.11 lukem
29 1.11 lukem #include <sys/cdefs.h>
30 1.19 tsutsui __KERNEL_RCSID(0, "$NetBSD: news5000.c,v 1.19 2011/03/09 13:21:36 tsutsui Exp $");
31 1.1 tsubai
32 1.18 matt #define __INTR_PRIVATE
33 1.1 tsubai #include <sys/param.h>
34 1.1 tsubai #include <sys/systm.h>
35 1.1 tsubai #include <sys/kernel.h>
36 1.16 tsutsui #include <sys/timetc.h>
37 1.17 ad #include <sys/cpu.h>
38 1.18 matt #include <sys/intr.h>
39 1.1 tsubai
40 1.1 tsubai #include <machine/adrsmap.h>
41 1.1 tsubai
42 1.1 tsubai #include <newsmips/apbus/apbusvar.h>
43 1.1 tsubai #include <newsmips/newsmips/machid.h>
44 1.1 tsubai
45 1.9 tsutsui static void news5000_level1_intr(void);
46 1.9 tsutsui static void news5000_level0_intr(void);
47 1.7 matt
48 1.9 tsutsui static void news5000_enable_intr(void);
49 1.9 tsutsui static void news5000_disable_intr(void);
50 1.12 tsutsui static void news5000_enable_timer(void);
51 1.14 tsutsui static void news5000_readidrom(uint8_t *);
52 1.16 tsutsui static void news5000_tc_init(void);
53 1.16 tsutsui static uint32_t news5000_getfreerun(struct timecounter *);
54 1.6 onoe
55 1.1 tsubai /*
56 1.19 tsutsui * This is a mask of bits to clear in the SR when we go to a
57 1.19 tsutsui * given interrupt priority level.
58 1.19 tsutsui */
59 1.19 tsutsui static const struct ipl_sr_map news5000_ipl_sr_map = {
60 1.19 tsutsui .sr_bits = {
61 1.19 tsutsui [IPL_NONE] = 0,
62 1.19 tsutsui [IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
63 1.19 tsutsui [IPL_SOFTNET] = MIPS_SOFT_INT_MASK,
64 1.19 tsutsui [IPL_VM] = MIPS_SOFT_INT_MASK
65 1.19 tsutsui | MIPS_INT_MASK_0
66 1.19 tsutsui | MIPS_INT_MASK_1,
67 1.19 tsutsui [IPL_SCHED] = MIPS_SOFT_INT_MASK
68 1.19 tsutsui | MIPS_INT_MASK_0
69 1.19 tsutsui | MIPS_INT_MASK_1
70 1.19 tsutsui | MIPS_INT_MASK_2,
71 1.19 tsutsui [IPL_DDB] = MIPS_INT_MASK,
72 1.19 tsutsui [IPL_HIGH] = MIPS_INT_MASK,
73 1.19 tsutsui },
74 1.19 tsutsui };
75 1.19 tsutsui
76 1.19 tsutsui /*
77 1.1 tsubai * Handle news5000 interrupts.
78 1.1 tsubai */
79 1.4 tsubai void
80 1.18 matt news5000_intr(int ppl, vaddr_t pc, uint32_t status)
81 1.1 tsubai {
82 1.18 matt uint32_t ipending;
83 1.18 matt int ipl;
84 1.17 ad
85 1.18 matt while (ppl < (ipl = splintr(&ipending))) {
86 1.17 ad
87 1.18 matt if (ipending & MIPS_INT_MASK_2) {
88 1.2 tsubai #ifdef DEBUG
89 1.18 matt static int l2cnt = 0;
90 1.2 tsubai #endif
91 1.18 matt uint32_t int2stat;
92 1.18 matt struct clockframe cf;
93 1.2 tsubai
94 1.18 matt int2stat = *(volatile uint32_t *)NEWS5000_INTST2;
95 1.2 tsubai
96 1.2 tsubai #ifdef DEBUG
97 1.18 matt l2cnt++;
98 1.18 matt if (l2cnt == 50) {
99 1.18 matt *(volatile uint32_t *)NEWS5000_LED_SEC = 1;
100 1.18 matt }
101 1.18 matt if (l2cnt == 100) {
102 1.18 matt *(volatile uint32_t *)NEWS5000_LED_SEC = 0;
103 1.18 matt l2cnt = 0;
104 1.18 matt }
105 1.2 tsubai #endif
106 1.2 tsubai
107 1.18 matt if (int2stat & NEWS5000_INT2_TIMER0) {
108 1.18 matt *(volatile uint32_t *)NEWS5000_TIMER0 = 1;
109 1.18 matt
110 1.18 matt cf.pc = pc;
111 1.18 matt cf.sr = status;
112 1.2 tsubai
113 1.18 matt hardclock(&cf);
114 1.18 matt intrcnt[HARDCLOCK_INTR]++;
115 1.18 matt }
116 1.2 tsubai
117 1.18 matt apbus_wbflush();
118 1.2 tsubai }
119 1.2 tsubai
120 1.18 matt if (ipending & MIPS_INT_MASK_5) {
121 1.18 matt uint32_t int5stat;
122 1.1 tsubai
123 1.18 matt int5stat = *(volatile u_int *)NEWS5000_INTST5;
124 1.18 matt printf("level5 interrupt (%08x)\n", int5stat);
125 1.14 tsutsui
126 1.18 matt apbus_wbflush();
127 1.18 matt }
128 1.2 tsubai
129 1.18 matt if (ipending & MIPS_INT_MASK_4) {
130 1.18 matt uint32_t int4stat;
131 1.1 tsubai
132 1.18 matt int4stat = *(volatile uint32_t *)NEWS5000_INTST4;
133 1.18 matt printf("level4 interrupt (%08x)\n", int4stat);
134 1.18 matt if (int4stat & NEWS5000_INT4_APBUS) {
135 1.18 matt uint32_t stat;
136 1.18 matt
137 1.18 matt stat = *(volatile uint32_t *)NEWS5000_APBUS_INTST;
138 1.18 matt printf("APbus error 0x%04x\n", stat & 0xffff);
139 1.18 matt if (stat & NEWS5000_APBUS_INT_DMAADDR) {
140 1.18 matt printf("DMA Address Error: "
141 1.18 matt "slot=%x, addr=0x%08x\n",
142 1.18 matt *(volatile uint32_t *)NEWS5000_APBUS_DER_S,
143 1.18 matt *(volatile uint32_t *)NEWS5000_APBUS_DER_A);
144 1.18 matt }
145 1.18 matt if (stat & NEWS5000_APBUS_INT_RDTIMEO)
146 1.18 matt printf("IO Read Timeout: addr=0x%08x\n",
147 1.18 matt *(volatile uint32_t *)NEWS5000_APBUS_BER_A);
148 1.18 matt if (stat & NEWS5000_APBUS_INT_WRTIMEO)
149 1.18 matt printf("IO Write Timeout: addr=0x%08x\n",
150 1.18 matt *(volatile uint32_t *)NEWS5000_APBUS_BER_A);
151 1.18 matt *(volatile uint32_t *)0xb4c00014 = stat;
152 1.18 matt }
153 1.14 tsutsui
154 1.18 matt apbus_wbflush();
155 1.6 onoe }
156 1.2 tsubai
157 1.18 matt if (ipending & MIPS_INT_MASK_3) {
158 1.18 matt uint32_t int3stat;
159 1.1 tsubai
160 1.18 matt int3stat = *(volatile uint32_t *)NEWS5000_INTST3;
161 1.18 matt printf("level3 interrupt (%08x)\n", int3stat);
162 1.14 tsutsui
163 1.18 matt apbus_wbflush();
164 1.18 matt }
165 1.2 tsubai
166 1.18 matt if (ipending & MIPS_INT_MASK_1) {
167 1.18 matt news5000_level1_intr();
168 1.18 matt apbus_wbflush();
169 1.18 matt }
170 1.1 tsubai
171 1.18 matt if (ipending & MIPS_INT_MASK_0) {
172 1.18 matt news5000_level0_intr();
173 1.18 matt apbus_wbflush();
174 1.18 matt }
175 1.1 tsubai }
176 1.1 tsubai }
177 1.1 tsubai
178 1.1 tsubai
179 1.7 matt static void
180 1.9 tsutsui news5000_level1_intr(void)
181 1.1 tsubai {
182 1.14 tsutsui uint32_t int1stat;
183 1.1 tsubai
184 1.14 tsutsui int1stat = *(volatile uint32_t *)NEWS5000_INTST1;
185 1.1 tsubai
186 1.1 tsubai if (int1stat) {
187 1.10 tsutsui if (apbus_intr_dispatch(1, int1stat) == 0)
188 1.3 tsubai printf("level1_intr: no handler (mask 0x%04x)\n",
189 1.2 tsubai int1stat);
190 1.2 tsubai } else
191 1.1 tsubai printf("level1 stray interrupt?\n");
192 1.1 tsubai }
193 1.1 tsubai
194 1.7 matt static void
195 1.9 tsutsui news5000_level0_intr(void)
196 1.1 tsubai {
197 1.14 tsutsui uint32_t int0stat;
198 1.1 tsubai
199 1.14 tsutsui int0stat = *(volatile uint32_t *)NEWS5000_INTST0;
200 1.1 tsubai
201 1.1 tsubai if (int0stat) {
202 1.10 tsutsui if (apbus_intr_dispatch(0, int0stat) == 0)
203 1.2 tsubai printf("level0_intr: no handler (mask 0x%04x)\n",
204 1.2 tsubai int0stat);
205 1.2 tsubai } else
206 1.1 tsubai printf("level0 stray interrupt?\n");
207 1.1 tsubai }
208 1.1 tsubai
209 1.7 matt static void
210 1.9 tsutsui news5000_enable_intr(void)
211 1.1 tsubai {
212 1.2 tsubai
213 1.6 onoe /* INT0 and INT1 has been enabled at attach */
214 1.6 onoe /* INT2 -- It's not a time to enable timer yet. */
215 1.6 onoe /* INT3 -- not used for NWS-5000 */
216 1.2 tsubai
217 1.14 tsutsui *(volatile uint32_t *)NEWS5000_INTEN4 = NEWS5000_INT4_APBUS;
218 1.14 tsutsui *(volatile uint32_t *)NEWS5000_APBUS_INTMSK = 0xffff;
219 1.2 tsubai
220 1.6 onoe /* INT5 -- currently ignored */
221 1.14 tsutsui *(volatile uint32_t *)NEWS5000_INTEN5 = 0;
222 1.1 tsubai }
223 1.1 tsubai
224 1.7 matt static void
225 1.9 tsutsui news5000_disable_intr(void)
226 1.1 tsubai {
227 1.9 tsutsui
228 1.14 tsutsui *(volatile uint32_t *)NEWS5000_INTEN0 = 0;
229 1.14 tsutsui *(volatile uint32_t *)NEWS5000_INTEN1 = 0;
230 1.14 tsutsui *(volatile uint32_t *)NEWS5000_INTEN2 = 0;
231 1.14 tsutsui *(volatile uint32_t *)NEWS5000_INTEN3 = 0;
232 1.14 tsutsui *(volatile uint32_t *)NEWS5000_INTEN4 = 0;
233 1.14 tsutsui *(volatile uint32_t *)NEWS5000_INTEN5 = 0;
234 1.1 tsubai }
235 1.1 tsubai
236 1.7 matt static void
237 1.12 tsutsui news5000_enable_timer(void)
238 1.12 tsutsui {
239 1.12 tsutsui
240 1.16 tsutsui news5000_tc_init();
241 1.16 tsutsui
242 1.12 tsutsui /* enable timer interrpt */
243 1.13 tsutsui *(volatile uint32_t *)NEWS5000_INTEN2 = NEWS5000_INT2_TIMER0;
244 1.12 tsutsui }
245 1.12 tsutsui
246 1.16 tsutsui static uint32_t
247 1.16 tsutsui news5000_getfreerun(struct timecounter *tc)
248 1.16 tsutsui {
249 1.16 tsutsui return *(volatile uint32_t *)NEWS5000_FREERUN;
250 1.16 tsutsui }
251 1.16 tsutsui
252 1.12 tsutsui static void
253 1.16 tsutsui news5000_tc_init(void)
254 1.6 onoe {
255 1.16 tsutsui static struct timecounter tc = {
256 1.16 tsutsui .tc_get_timecount = news5000_getfreerun,
257 1.16 tsutsui .tc_frequency = 1000000,
258 1.16 tsutsui .tc_counter_mask = ~0,
259 1.16 tsutsui .tc_name = "news5000_freerun",
260 1.16 tsutsui .tc_quality = 100,
261 1.16 tsutsui };
262 1.6 onoe
263 1.16 tsutsui tc_init(&tc);
264 1.6 onoe }
265 1.16 tsutsui
266 1.6 onoe
267 1.7 matt static void
268 1.14 tsutsui news5000_readidrom(uint8_t *rom)
269 1.1 tsubai {
270 1.13 tsutsui uint32_t *p = (void *)NEWS5000_IDROM;
271 1.1 tsubai int i;
272 1.1 tsubai
273 1.14 tsutsui for (i = 0; i < sizeof(struct idrom); i++, p += 2)
274 1.1 tsubai *rom++ = ((*p & 0x0f) << 4) + (*(p + 1) & 0x0f);
275 1.1 tsubai }
276 1.1 tsubai
277 1.1 tsubai extern struct idrom idrom;
278 1.1 tsubai
279 1.1 tsubai void
280 1.7 matt news5000_init(void)
281 1.1 tsubai {
282 1.1 tsubai
283 1.19 tsutsui ipl_sr_map = news5000_ipl_sr_map;
284 1.19 tsutsui
285 1.9 tsutsui enable_intr = news5000_enable_intr;
286 1.9 tsutsui disable_intr = news5000_disable_intr;
287 1.12 tsutsui enable_timer = news5000_enable_timer;
288 1.9 tsutsui
289 1.14 tsutsui news5000_readidrom((uint8_t *)&idrom);
290 1.5 tsubai hostid = idrom.id_serial;
291 1.8 tsutsui
292 1.8 tsutsui /* XXX reset uPD72067 FDC to avoid spurious interrupts */
293 1.8 tsutsui #define NEWS5000_FDC_FDOUT 0xbed20000
294 1.8 tsutsui #define FDO_FRST 0x04
295 1.13 tsutsui *(volatile uint8_t *)NEWS5000_FDC_FDOUT = FDO_FRST;
296 1.1 tsubai }
297