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news5000.c revision 1.7
      1  1.7    matt /*	$NetBSD: news5000.c,v 1.7 2000/12/03 01:42:30 matt Exp $	*/
      2  1.1  tsubai 
      3  1.1  tsubai /*-
      4  1.1  tsubai  * Copyright (C) 1999 SHIMIZU Ryo.  All rights reserved.
      5  1.1  tsubai  *
      6  1.1  tsubai  * Redistribution and use in source and binary forms, with or without
      7  1.1  tsubai  * modification, are permitted provided that the following conditions
      8  1.1  tsubai  * are met:
      9  1.1  tsubai  * 1. Redistributions of source code must retain the above copyright
     10  1.1  tsubai  *    notice, this list of conditions and the following disclaimer.
     11  1.1  tsubai  * 2. Redistributions in binary form must reproduce the above copyright
     12  1.1  tsubai  *    notice, this list of conditions and the following disclaimer in the
     13  1.1  tsubai  *    documentation and/or other materials provided with the distribution.
     14  1.1  tsubai  * 3. The name of the author may not be used to endorse or promote products
     15  1.1  tsubai  *    derived from this software without specific prior written permission.
     16  1.1  tsubai  *
     17  1.1  tsubai  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     18  1.1  tsubai  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     19  1.1  tsubai  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     20  1.1  tsubai  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     21  1.1  tsubai  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     22  1.1  tsubai  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     23  1.1  tsubai  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     24  1.1  tsubai  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     25  1.1  tsubai  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     26  1.1  tsubai  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     27  1.1  tsubai  */
     28  1.1  tsubai 
     29  1.1  tsubai #include <sys/param.h>
     30  1.1  tsubai #include <sys/systm.h>
     31  1.1  tsubai #include <sys/kernel.h>
     32  1.1  tsubai 
     33  1.1  tsubai #include <machine/adrsmap.h>
     34  1.1  tsubai #include <machine/cpu.h>
     35  1.1  tsubai #include <machine/intr.h>
     36  1.1  tsubai 
     37  1.1  tsubai #include <newsmips/apbus/apbusvar.h>
     38  1.1  tsubai #include <newsmips/newsmips/machid.h>
     39  1.1  tsubai 
     40  1.7    matt extern void (*readmicrotime) (struct timeval *tvp);
     41  1.6    onoe 
     42  1.7    matt static void level1_intr (void);
     43  1.7    matt static void level0_intr (void);
     44  1.7    matt 
     45  1.7    matt static void enable_intr_5000 (void);
     46  1.7    matt static void disable_intr_5000 (void);
     47  1.7    matt static void readmicrotime_5000 (struct timeval *);
     48  1.7    matt static void readidrom_5000 (u_char *);
     49  1.7    matt 
     50  1.7    matt void news5000_init (void);
     51  1.1  tsubai 
     52  1.6    onoe static u_int freerun_off;
     53  1.6    onoe 
     54  1.1  tsubai /*
     55  1.1  tsubai  * Handle news5000 interrupts.
     56  1.1  tsubai  */
     57  1.4  tsubai void
     58  1.4  tsubai news5000_intr(status, cause, pc, ipending)
     59  1.2  tsubai 	u_int status;	/* status register at time of the exception */
     60  1.2  tsubai 	u_int cause;	/* cause register at time of exception */
     61  1.4  tsubai 	u_int pc;	/* program counter where to continue */
     62  1.4  tsubai 	u_int ipending;
     63  1.1  tsubai {
     64  1.4  tsubai 	if (ipending & MIPS_INT_MASK_2) {
     65  1.2  tsubai #ifdef DEBUG
     66  1.2  tsubai 		static int l2cnt = 0;
     67  1.2  tsubai #endif
     68  1.2  tsubai 		u_int int2stat;
     69  1.2  tsubai 		struct clockframe cf;
     70  1.2  tsubai 
     71  1.2  tsubai 		int2stat = *(volatile u_int *)NEWS5000_INTST2;
     72  1.2  tsubai 
     73  1.2  tsubai #ifdef DEBUG
     74  1.2  tsubai 		l2cnt++;
     75  1.2  tsubai 		if (l2cnt == 50) {
     76  1.2  tsubai 			*(volatile u_int *)NEWS5000_LED_SEC = 1;
     77  1.2  tsubai 		}
     78  1.2  tsubai 		if (l2cnt == 100) {
     79  1.2  tsubai 			*(volatile u_int *)NEWS5000_LED_SEC = 0;
     80  1.2  tsubai 			l2cnt = 0;
     81  1.2  tsubai 		}
     82  1.2  tsubai #endif
     83  1.2  tsubai 
     84  1.2  tsubai 		if (int2stat & NEWS5000_INT2_TIMER0) {
     85  1.2  tsubai 			*(volatile u_int *)NEWS5000_TIMER0 = 1;
     86  1.6    onoe 			freerun_off = *(volatile u_int *)NEWS5000_FREERUN;
     87  1.2  tsubai 
     88  1.2  tsubai 			cf.pc = pc;
     89  1.2  tsubai 			cf.sr = status;
     90  1.2  tsubai 
     91  1.2  tsubai 			hardclock(&cf);
     92  1.2  tsubai 			intrcnt[HARDCLOCK_INTR]++;
     93  1.2  tsubai 		}
     94  1.2  tsubai 
     95  1.1  tsubai 		apbus_wbflush();
     96  1.2  tsubai 		cause &= ~MIPS_INT_MASK_2;
     97  1.1  tsubai 	}
     98  1.1  tsubai 	/* If clock interrupts were enabled, re-enable them ASAP. */
     99  1.4  tsubai 	_splset(MIPS_SR_INT_IE | (status & MIPS_INT_MASK_2));
    100  1.1  tsubai 
    101  1.4  tsubai 	if (ipending & MIPS_INT_MASK_5) {
    102  1.2  tsubai 		u_int int5stat = *(volatile u_int *)NEWS5000_INTST5;
    103  1.2  tsubai 		printf("level5 interrupt (%08x)\n", int5stat);
    104  1.2  tsubai 
    105  1.1  tsubai 		apbus_wbflush();
    106  1.2  tsubai 		cause &= ~MIPS_INT_MASK_5;
    107  1.1  tsubai 	}
    108  1.1  tsubai 
    109  1.4  tsubai 	if (ipending & MIPS_INT_MASK_4) {
    110  1.2  tsubai 		u_int int4stat = *(volatile u_int *)NEWS5000_INTST4;
    111  1.2  tsubai 		printf("level4 interrupt (%08x)\n", int4stat);
    112  1.6    onoe 		if (int4stat & NEWS5000_INT4_APBUS) {
    113  1.6    onoe 			u_int stat = *(volatile u_int *)NEWS5000_APBUS_INTST;
    114  1.6    onoe 			printf("APbus error 0x%04x\n", stat & 0xffff);
    115  1.6    onoe 			if (stat & NEWS5000_APBUS_INT_DMAADDR) {
    116  1.6    onoe 				printf("DMA Address Error: slot=%x, addr=0x%08x\n",
    117  1.6    onoe 				    *(volatile u_int *)NEWS5000_APBUS_DER_S,
    118  1.6    onoe 				    *(volatile u_int *)NEWS5000_APBUS_DER_A);
    119  1.6    onoe 			}
    120  1.6    onoe 			if (stat & NEWS5000_APBUS_INT_RDTIMEO)
    121  1.6    onoe 				printf("IO Read Timeout: addr=0x%08x\n",
    122  1.6    onoe 				    *(volatile u_int *)NEWS5000_APBUS_BER_A);
    123  1.6    onoe 			if (stat & NEWS5000_APBUS_INT_WRTIMEO)
    124  1.6    onoe 				printf("IO Write Timeout: addr=0x%08x\n",
    125  1.6    onoe 				    *(volatile u_int *)NEWS5000_APBUS_BER_A);
    126  1.6    onoe 			*(volatile u_int *)0xb4c00014 = stat;
    127  1.6    onoe 		}
    128  1.2  tsubai 
    129  1.1  tsubai 		apbus_wbflush();
    130  1.2  tsubai 		cause &= ~MIPS_INT_MASK_4;
    131  1.1  tsubai 	}
    132  1.1  tsubai 
    133  1.4  tsubai 	if (ipending & MIPS_INT_MASK_3) {
    134  1.2  tsubai 		u_int int3stat = *(volatile u_int *)NEWS5000_INTST3;
    135  1.2  tsubai 		printf("level3 interrupt (%08x)\n", int3stat);
    136  1.2  tsubai 
    137  1.1  tsubai 		apbus_wbflush();
    138  1.2  tsubai 		cause &= ~MIPS_INT_MASK_3;
    139  1.1  tsubai 	}
    140  1.1  tsubai 
    141  1.4  tsubai 	if (ipending & MIPS_INT_MASK_1) {
    142  1.2  tsubai 		level1_intr();
    143  1.1  tsubai 		apbus_wbflush();
    144  1.2  tsubai 		cause &= ~MIPS_INT_MASK_1;
    145  1.1  tsubai 	}
    146  1.1  tsubai 
    147  1.4  tsubai 	if (ipending & MIPS_INT_MASK_0) {
    148  1.2  tsubai 		level0_intr();
    149  1.1  tsubai 		apbus_wbflush();
    150  1.2  tsubai 		cause &= ~MIPS_INT_MASK_0;
    151  1.1  tsubai 	}
    152  1.1  tsubai 
    153  1.4  tsubai 	_splset((status & ~cause & MIPS_HARD_INT_MASK) | MIPS_SR_INT_IE);
    154  1.1  tsubai }
    155  1.1  tsubai 
    156  1.1  tsubai 
    157  1.7    matt static void
    158  1.7    matt level1_intr(void)
    159  1.1  tsubai {
    160  1.2  tsubai 	u_int int1stat;
    161  1.1  tsubai 
    162  1.2  tsubai 	int1stat = *(volatile u_int *)NEWS5000_INTST1;
    163  1.1  tsubai 
    164  1.1  tsubai 	if (int1stat) {
    165  1.2  tsubai 		if (apbus_intr_call(1, int1stat) == 0)
    166  1.3  tsubai 			printf("level1_intr: no handler (mask 0x%04x)\n",
    167  1.2  tsubai 			       int1stat);
    168  1.2  tsubai 	} else
    169  1.1  tsubai 		printf("level1 stray interrupt?\n");
    170  1.1  tsubai }
    171  1.1  tsubai 
    172  1.7    matt static void
    173  1.7    matt level0_intr(void)
    174  1.1  tsubai {
    175  1.2  tsubai 	u_int int0stat;
    176  1.1  tsubai 
    177  1.2  tsubai 	int0stat = *(volatile u_int *)NEWS5000_INTST0;
    178  1.1  tsubai 
    179  1.1  tsubai 	if (int0stat) {
    180  1.2  tsubai 		if (apbus_intr_call(0, int0stat) == 0)
    181  1.2  tsubai 			printf("level0_intr: no handler (mask 0x%04x)\n",
    182  1.2  tsubai 			       int0stat);
    183  1.2  tsubai 	} else
    184  1.1  tsubai 		printf("level0 stray interrupt?\n");
    185  1.1  tsubai }
    186  1.1  tsubai 
    187  1.7    matt static void
    188  1.7    matt enable_intr_5000(void)
    189  1.1  tsubai {
    190  1.2  tsubai 
    191  1.6    onoe 	/* INT0 and INT1 has been enabled at attach */
    192  1.6    onoe 	/* INT2 -- It's not a time to enable timer yet. */
    193  1.6    onoe 	/* INT3 -- not used for NWS-5000 */
    194  1.2  tsubai 
    195  1.6    onoe 	*(volatile u_int *)NEWS5000_INTEN4 = NEWS5000_INT4_APBUS;
    196  1.6    onoe 	*(volatile u_int *)NEWS5000_APBUS_INTMSK = 0xffff;
    197  1.2  tsubai 
    198  1.6    onoe 	/* INT5 -- currently ignored */
    199  1.2  tsubai 	*(volatile u_int *)NEWS5000_INTEN5 = 0;
    200  1.1  tsubai }
    201  1.1  tsubai 
    202  1.7    matt static void
    203  1.7    matt disable_intr_5000(void)
    204  1.1  tsubai {
    205  1.2  tsubai 	*(volatile u_int *)NEWS5000_INTEN0 = 0;
    206  1.2  tsubai 	*(volatile u_int *)NEWS5000_INTEN1 = 0;
    207  1.2  tsubai 	*(volatile u_int *)NEWS5000_INTEN2 = 0;
    208  1.2  tsubai 	*(volatile u_int *)NEWS5000_INTEN3 = 0;
    209  1.2  tsubai 	*(volatile u_int *)NEWS5000_INTEN4 = 0;
    210  1.2  tsubai 	*(volatile u_int *)NEWS5000_INTEN5 = 0;
    211  1.1  tsubai }
    212  1.1  tsubai 
    213  1.7    matt static void
    214  1.6    onoe readmicrotime_5000(tvp)
    215  1.6    onoe 	struct timeval *tvp;
    216  1.6    onoe {
    217  1.6    onoe 	u_int freerun;
    218  1.6    onoe 
    219  1.6    onoe 	*tvp = time;
    220  1.6    onoe 	freerun = *(volatile u_int *)NEWS5000_FREERUN;
    221  1.6    onoe 	freerun -= freerun_off;
    222  1.6    onoe 	if (freerun > 1000000)
    223  1.6    onoe 		freerun = 1000000;
    224  1.6    onoe 	tvp->tv_usec += freerun;
    225  1.6    onoe 	if (tvp->tv_usec >= 1000000) {
    226  1.6    onoe 		tvp->tv_usec -= 1000000;
    227  1.6    onoe 		tvp->tv_sec++;
    228  1.6    onoe 	}
    229  1.6    onoe }
    230  1.6    onoe 
    231  1.7    matt static void
    232  1.1  tsubai readidrom_5000(rom)
    233  1.1  tsubai 	u_char *rom;
    234  1.1  tsubai {
    235  1.1  tsubai 	u_int32_t *p = (void *)NEWS5000_IDROM;
    236  1.1  tsubai 	int i;
    237  1.1  tsubai 
    238  1.1  tsubai 	for (i = 0; i < sizeof (struct idrom); i++, p += 2)
    239  1.1  tsubai 		*rom++ = ((*p & 0x0f) << 4) + (*(p + 1) & 0x0f);
    240  1.1  tsubai }
    241  1.1  tsubai 
    242  1.1  tsubai extern struct idrom idrom;
    243  1.1  tsubai 
    244  1.1  tsubai void
    245  1.7    matt news5000_init(void)
    246  1.1  tsubai {
    247  1.1  tsubai 	enable_intr = enable_intr_5000;
    248  1.1  tsubai 	disable_intr = disable_intr_5000;
    249  1.1  tsubai 
    250  1.1  tsubai 	readidrom_5000((u_char *)&idrom);
    251  1.6    onoe 	readmicrotime = readmicrotime_5000;
    252  1.5  tsubai 	hostid = idrom.id_serial;
    253  1.1  tsubai }
    254