mb8795.c revision 1.18 1 1.18 tv /* $NetBSD: mb8795.c,v 1.18 2000/08/09 02:26:26 tv Exp $ */
2 1.1 dbj /*
3 1.1 dbj * Copyright (c) 1998 Darrin B. Jewell
4 1.1 dbj * All rights reserved.
5 1.1 dbj *
6 1.1 dbj * Redistribution and use in source and binary forms, with or without
7 1.1 dbj * modification, are permitted provided that the following conditions
8 1.1 dbj * are met:
9 1.1 dbj * 1. Redistributions of source code must retain the above copyright
10 1.1 dbj * notice, this list of conditions and the following disclaimer.
11 1.1 dbj * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 dbj * notice, this list of conditions and the following disclaimer in the
13 1.1 dbj * documentation and/or other materials provided with the distribution.
14 1.1 dbj * 3. All advertising materials mentioning features or use of this software
15 1.1 dbj * must display the following acknowledgement:
16 1.1 dbj * This product includes software developed by Darrin B. Jewell
17 1.1 dbj * 4. The name of the author may not be used to endorse or promote products
18 1.1 dbj * derived from this software without specific prior written permission
19 1.1 dbj *
20 1.1 dbj * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21 1.1 dbj * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 1.1 dbj * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 1.1 dbj * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 1.1 dbj * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 1.1 dbj * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 1.1 dbj * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 1.1 dbj * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 1.1 dbj * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 1.1 dbj * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 1.1 dbj */
31 1.1 dbj
32 1.2 jonathan #include "opt_inet.h"
33 1.3 jonathan #include "opt_ccitt.h"
34 1.4 jonathan #include "opt_llc.h"
35 1.5 jonathan #include "opt_ns.h"
36 1.1 dbj #include "bpfilter.h"
37 1.1 dbj #include "rnd.h"
38 1.1 dbj
39 1.1 dbj #include <sys/param.h>
40 1.1 dbj #include <sys/systm.h>
41 1.1 dbj #include <sys/mbuf.h>
42 1.1 dbj #include <sys/syslog.h>
43 1.1 dbj #include <sys/socket.h>
44 1.1 dbj #include <sys/device.h>
45 1.1 dbj #include <sys/malloc.h>
46 1.1 dbj #include <sys/ioctl.h>
47 1.1 dbj #include <sys/errno.h>
48 1.1 dbj #if NRND > 0
49 1.1 dbj #include <sys/rnd.h>
50 1.1 dbj #endif
51 1.1 dbj
52 1.1 dbj #include <net/if.h>
53 1.1 dbj #include <net/if_dl.h>
54 1.1 dbj #include <net/if_ether.h>
55 1.1 dbj
56 1.1 dbj #if 0
57 1.1 dbj #include <net/if_media.h>
58 1.1 dbj #endif
59 1.1 dbj
60 1.1 dbj #ifdef INET
61 1.1 dbj #include <netinet/in.h>
62 1.1 dbj #include <netinet/if_inarp.h>
63 1.1 dbj #include <netinet/in_systm.h>
64 1.1 dbj #include <netinet/in_var.h>
65 1.1 dbj #include <netinet/ip.h>
66 1.1 dbj #endif
67 1.1 dbj
68 1.1 dbj #ifdef NS
69 1.1 dbj #include <netns/ns.h>
70 1.1 dbj #include <netns/ns_if.h>
71 1.1 dbj #endif
72 1.1 dbj
73 1.1 dbj #if defined(CCITT) && defined(LLC)
74 1.1 dbj #include <sys/socketvar.h>
75 1.1 dbj #include <netccitt/x25.h>
76 1.1 dbj #include <netccitt/pk.h>
77 1.1 dbj #include <netccitt/pk_var.h>
78 1.1 dbj #include <netccitt/pk_extern.h>
79 1.1 dbj #endif
80 1.1 dbj
81 1.1 dbj #if NBPFILTER > 0
82 1.1 dbj #include <net/bpf.h>
83 1.1 dbj #include <net/bpfdesc.h>
84 1.1 dbj #endif
85 1.1 dbj
86 1.1 dbj #include <machine/cpu.h>
87 1.1 dbj #include <machine/bus.h>
88 1.1 dbj #include <machine/intr.h>
89 1.1 dbj
90 1.1 dbj /* @@@ this is here for the REALIGN_DMABUF hack below */
91 1.1 dbj #include "nextdmareg.h"
92 1.1 dbj #include "nextdmavar.h"
93 1.1 dbj
94 1.1 dbj #include "mb8795reg.h"
95 1.1 dbj #include "mb8795var.h"
96 1.1 dbj
97 1.17 dbj #if 1
98 1.1 dbj #define XE_DEBUG
99 1.1 dbj #endif
100 1.1 dbj
101 1.1 dbj #ifdef XE_DEBUG
102 1.17 dbj int xe_debug = 0;
103 1.17 dbj #define DPRINTF(x) if (xe_debug) printf x;
104 1.1 dbj #else
105 1.1 dbj #define DPRINTF(x)
106 1.1 dbj #endif
107 1.1 dbj
108 1.1 dbj
109 1.1 dbj /*
110 1.1 dbj * Support for
111 1.1 dbj * Fujitsu Ethernet Data Link Controller (MB8795)
112 1.1 dbj * and the Fujitsu Manchester Encoder/Decoder (MB502).
113 1.1 dbj */
114 1.1 dbj
115 1.1 dbj int debugipkt = 0;
116 1.1 dbj
117 1.1 dbj
118 1.1 dbj void mb8795_shutdown __P((void *));
119 1.1 dbj
120 1.1 dbj #if 0
121 1.1 dbj int mb8795_mediachange __P((struct ifnet *));
122 1.1 dbj void mb8795_mediastatus __P((struct ifnet *, struct ifmediareq *));
123 1.1 dbj #endif
124 1.1 dbj
125 1.1 dbj struct mbuf * mb8795_rxdmamap_load __P((struct mb8795_softc *,
126 1.1 dbj bus_dmamap_t map));
127 1.1 dbj
128 1.1 dbj bus_dmamap_t mb8795_rxdma_continue __P((void *));
129 1.1 dbj void mb8795_rxdma_completed __P((bus_dmamap_t,void *));
130 1.1 dbj bus_dmamap_t mb8795_txdma_continue __P((void *));
131 1.1 dbj void mb8795_txdma_completed __P((bus_dmamap_t,void *));
132 1.1 dbj void mb8795_rxdma_shutdown __P((void *));
133 1.1 dbj void mb8795_txdma_shutdown __P((void *));
134 1.1 dbj bus_dmamap_t mb8795_txdma_restart __P((bus_dmamap_t,void *));
135 1.1 dbj
136 1.1 dbj void
137 1.1 dbj mb8795_config(sc)
138 1.1 dbj struct mb8795_softc *sc;
139 1.1 dbj {
140 1.1 dbj struct ifnet *ifp = &sc->sc_ethercom.ec_if;
141 1.1 dbj
142 1.1 dbj DPRINTF(("%s: mb8795_config()\n",sc->sc_dev.dv_xname));
143 1.1 dbj
144 1.1 dbj /* Initialize ifnet structure. */
145 1.1 dbj bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
146 1.1 dbj ifp->if_softc = sc;
147 1.1 dbj ifp->if_start = mb8795_start;
148 1.1 dbj ifp->if_ioctl = mb8795_ioctl;
149 1.1 dbj ifp->if_watchdog = mb8795_watchdog;
150 1.1 dbj ifp->if_flags =
151 1.1 dbj IFF_BROADCAST | IFF_NOTRAILERS;
152 1.1 dbj
153 1.1 dbj #if 0
154 1.1 dbj /* Initialize ifmedia structures. */
155 1.1 dbj ifmedia_init(&sc->sc_media, 0, mb8795_mediachange, mb8795_mediastatus);
156 1.1 dbj if (sc->sc_supmedia != NULL) {
157 1.1 dbj int i;
158 1.1 dbj for (i = 0; i < sc->sc_nsupmedia; i++)
159 1.1 dbj ifmedia_add(&sc->sc_media, sc->sc_supmedia[i],
160 1.1 dbj 0, NULL);
161 1.1 dbj ifmedia_set(&sc->sc_media, sc->sc_defaultmedia);
162 1.1 dbj } else {
163 1.1 dbj ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_MANUAL, 0, NULL);
164 1.1 dbj ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_MANUAL);
165 1.1 dbj }
166 1.1 dbj #endif
167 1.1 dbj
168 1.1 dbj /* Attach the interface. */
169 1.1 dbj if_attach(ifp);
170 1.1 dbj ether_ifattach(ifp, sc->sc_enaddr);
171 1.1 dbj
172 1.1 dbj /* decrease the mtu on this interface to deal with
173 1.1 dbj * alignment problems
174 1.1 dbj */
175 1.1 dbj ifp->if_mtu -= 16;
176 1.1 dbj
177 1.1 dbj #if NBPFILTER > 0
178 1.1 dbj bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header));
179 1.1 dbj #endif
180 1.1 dbj
181 1.1 dbj sc->sc_sh = shutdownhook_establish(mb8795_shutdown, sc);
182 1.1 dbj if (sc->sc_sh == NULL)
183 1.1 dbj panic("mb8795_config: can't establish shutdownhook");
184 1.1 dbj
185 1.1 dbj #if NRND > 0
186 1.1 dbj rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname,
187 1.10 explorer RND_TYPE_NET, 0);
188 1.1 dbj #endif
189 1.1 dbj
190 1.1 dbj /* Initialize the dma maps */
191 1.1 dbj {
192 1.1 dbj int error;
193 1.1 dbj if ((error = bus_dmamap_create(sc->sc_tx_dmat, MCLBYTES,
194 1.1 dbj (MCLBYTES/MSIZE), MCLBYTES, 0, BUS_DMA_ALLOCNOW,
195 1.1 dbj &sc->sc_tx_dmamap)) != 0) {
196 1.1 dbj panic("%s: can't create tx DMA map, error = %d\n",
197 1.1 dbj sc->sc_dev.dv_xname, error);
198 1.1 dbj }
199 1.1 dbj {
200 1.1 dbj int i;
201 1.1 dbj for(i=0;i<MB8795_NRXBUFS;i++) {
202 1.1 dbj if ((error = bus_dmamap_create(sc->sc_rx_dmat, MCLBYTES,
203 1.1 dbj (MCLBYTES/MSIZE), MCLBYTES, 0, BUS_DMA_ALLOCNOW,
204 1.1 dbj &sc->sc_rx_dmamap[i])) != 0) {
205 1.1 dbj panic("%s: can't create rx DMA map, error = %d\n",
206 1.1 dbj sc->sc_dev.dv_xname, error);
207 1.1 dbj }
208 1.1 dbj sc->sc_rx_mb_head[i] = NULL;
209 1.1 dbj }
210 1.1 dbj sc->sc_rx_loaded_idx = 0;
211 1.1 dbj sc->sc_rx_completed_idx = 0;
212 1.1 dbj sc->sc_rx_handled_idx = 0;
213 1.1 dbj }
214 1.1 dbj }
215 1.1 dbj
216 1.1 dbj /* @@@ more next hacks
217 1.1 dbj * the 2000 covers at least a 1500 mtu + headers
218 1.9 dbj * + DMA_BEGINALIGNMENT+ DMA_ENDALIGNMENT
219 1.1 dbj */
220 1.1 dbj sc->sc_txbuf = malloc(2000, M_DEVBUF, M_NOWAIT);
221 1.1 dbj if (!sc->sc_txbuf) panic("%s: can't malloc tx DMA buffer",
222 1.1 dbj sc->sc_dev.dv_xname);
223 1.1 dbj
224 1.1 dbj sc->sc_tx_mb_head = NULL;
225 1.1 dbj sc->sc_tx_loaded = 0;
226 1.1 dbj
227 1.1 dbj sc->sc_tx_nd->nd_shutdown_cb = mb8795_txdma_shutdown;
228 1.1 dbj sc->sc_tx_nd->nd_continue_cb = mb8795_txdma_continue;
229 1.1 dbj sc->sc_tx_nd->nd_completed_cb = mb8795_txdma_completed;
230 1.1 dbj sc->sc_tx_nd->nd_cb_arg = sc;
231 1.1 dbj
232 1.1 dbj sc->sc_rx_nd->nd_shutdown_cb = mb8795_rxdma_shutdown;
233 1.1 dbj sc->sc_rx_nd->nd_continue_cb = mb8795_rxdma_continue;
234 1.1 dbj sc->sc_rx_nd->nd_completed_cb = mb8795_rxdma_completed;
235 1.1 dbj sc->sc_rx_nd->nd_cb_arg = sc;
236 1.1 dbj
237 1.1 dbj DPRINTF(("%s: leaving mb8795_config()\n",sc->sc_dev.dv_xname));
238 1.1 dbj }
239 1.1 dbj
240 1.1 dbj
241 1.1 dbj /****************************************************************/
242 1.7 dbj #if 0
243 1.1 dbj #define XCHR(x) "0123456789abcdef"[(x) & 0xf]
244 1.1 dbj static void
245 1.1 dbj hex_dump(unsigned char *pkt, size_t len)
246 1.1 dbj {
247 1.1 dbj size_t i, j;
248 1.1 dbj
249 1.1 dbj printf("0000: ");
250 1.1 dbj for(i=0; i<len; i++) {
251 1.1 dbj printf("%c%c ", XCHR(pkt[i]>>4), XCHR(pkt[i]));
252 1.1 dbj if ((i+1) % 16 == 0) {
253 1.1 dbj printf(" %c", '"');
254 1.1 dbj for(j=0; j<16; j++)
255 1.1 dbj printf("%c", pkt[i-15+j]>=32 && pkt[i-15+j]<127?pkt[i-15+j]:'.');
256 1.1 dbj printf("%c\n%c%c%c%c: ", '"', XCHR((i+1)>>12),
257 1.1 dbj XCHR((i+1)>>8), XCHR((i+1)>>4), XCHR(i+1));
258 1.1 dbj }
259 1.1 dbj }
260 1.1 dbj printf("\n");
261 1.1 dbj }
262 1.7 dbj #endif
263 1.1 dbj
264 1.1 dbj /*
265 1.1 dbj * Controller receive interrupt.
266 1.1 dbj */
267 1.1 dbj void
268 1.1 dbj mb8795_rint(sc)
269 1.1 dbj struct mb8795_softc *sc;
270 1.1 dbj {
271 1.1 dbj struct ifnet *ifp = &sc->sc_ethercom.ec_if;
272 1.1 dbj int error = 0;
273 1.1 dbj u_char rxstat;
274 1.1 dbj u_char rxmask;
275 1.1 dbj
276 1.1 dbj rxstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT);
277 1.1 dbj rxmask = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK);
278 1.1 dbj
279 1.1 dbj bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT, XE_RXSTAT_CLEAR);
280 1.1 dbj
281 1.1 dbj if (rxstat & XE_RXSTAT_RESET) {
282 1.1 dbj DPRINTF(("%s: rx reset packet\n",
283 1.1 dbj sc->sc_dev.dv_xname));
284 1.1 dbj error++;
285 1.1 dbj }
286 1.1 dbj if (rxstat & XE_RXSTAT_SHORT) {
287 1.1 dbj DPRINTF(("%s: rx short packet\n",
288 1.1 dbj sc->sc_dev.dv_xname));
289 1.1 dbj error++;
290 1.1 dbj }
291 1.1 dbj if (rxstat & XE_RXSTAT_ALIGNERR) {
292 1.1 dbj DPRINTF(("%s: rx alignment error\n",
293 1.1 dbj sc->sc_dev.dv_xname));
294 1.1 dbj error++;
295 1.1 dbj }
296 1.1 dbj if (rxstat & XE_RXSTAT_CRCERR) {
297 1.1 dbj DPRINTF(("%s: rx CRC error\n",
298 1.1 dbj sc->sc_dev.dv_xname));
299 1.1 dbj error++;
300 1.1 dbj }
301 1.1 dbj if (rxstat & XE_RXSTAT_OVERFLOW) {
302 1.1 dbj DPRINTF(("%s: rx overflow error\n",
303 1.1 dbj sc->sc_dev.dv_xname));
304 1.1 dbj error++;
305 1.1 dbj }
306 1.1 dbj
307 1.1 dbj if (error) {
308 1.1 dbj ifp->if_ierrors++;
309 1.1 dbj /* @@@ handle more gracefully, free memory, etc. */
310 1.1 dbj }
311 1.1 dbj
312 1.1 dbj if (rxstat & XE_RXSTAT_OK) {
313 1.1 dbj int s;
314 1.1 dbj s = spldma();
315 1.1 dbj
316 1.1 dbj while(sc->sc_rx_handled_idx != sc->sc_rx_completed_idx) {
317 1.1 dbj struct mbuf *m;
318 1.1 dbj bus_dmamap_t map;
319 1.1 dbj
320 1.1 dbj sc->sc_rx_handled_idx++;
321 1.1 dbj sc->sc_rx_handled_idx %= MB8795_NRXBUFS;
322 1.1 dbj
323 1.1 dbj /* Should probably not do this much while interrupts
324 1.1 dbj * are disabled, but for now we will.
325 1.1 dbj */
326 1.1 dbj
327 1.1 dbj map = sc->sc_rx_dmamap[sc->sc_rx_handled_idx];
328 1.1 dbj m = sc->sc_rx_mb_head[sc->sc_rx_handled_idx];
329 1.1 dbj
330 1.1 dbj bus_dmamap_sync(sc->sc_rx_dmat, map,
331 1.1 dbj 0, map->dm_mapsize, BUS_DMASYNC_POSTREAD);
332 1.1 dbj
333 1.1 dbj
334 1.1 dbj /* Find receive length and chop off CRC */
335 1.1 dbj /* @@@ assumes packet is all in first segment
336 1.1 dbj */
337 1.15 dbj m->m_pkthdr.len = map->dm_segs[0].ds_xfer_len-4;
338 1.15 dbj m->m_len = map->dm_segs[0].ds_xfer_len-4;
339 1.1 dbj m->m_pkthdr.rcvif = ifp;
340 1.1 dbj
341 1.1 dbj bus_dmamap_unload(sc->sc_rx_dmat, map);
342 1.1 dbj
343 1.1 dbj /* Install a fresh mbuf for next packet */
344 1.1 dbj
345 1.1 dbj sc->sc_rx_mb_head[sc->sc_rx_handled_idx] =
346 1.1 dbj mb8795_rxdmamap_load(sc,map);
347 1.1 dbj
348 1.1 dbj /* enable interrupts while we process the packet */
349 1.1 dbj splx(s);
350 1.1 dbj
351 1.1 dbj #if defined(XE_DEBUG)
352 1.1 dbj /* Peek at the packet */
353 1.1 dbj DPRINTF(("%s: received packet, at VA 0x%08x-0x%08x,len %d\n",
354 1.1 dbj sc->sc_dev.dv_xname,mtod(m,u_char *),mtod(m,u_char *)+m->m_len,m->m_len));
355 1.1 dbj #if 0
356 1.1 dbj hex_dump(mtod(m,u_char *), m->m_pkthdr.len < 255 ? m->m_pkthdr.len : 128 );
357 1.1 dbj #endif
358 1.1 dbj #endif
359 1.1 dbj
360 1.1 dbj {
361 1.1 dbj ifp->if_ipackets++;
362 1.1 dbj debugipkt++;
363 1.1 dbj
364 1.11 thorpej /* Pass the packet up. */
365 1.11 thorpej (*ifp->if_input)(ifp, m);
366 1.1 dbj }
367 1.1 dbj
368 1.1 dbj s = spldma();
369 1.1 dbj
370 1.1 dbj }
371 1.1 dbj
372 1.1 dbj splx(s);
373 1.1 dbj
374 1.1 dbj }
375 1.1 dbj
376 1.18 tv #ifdef XE_DEBUG
377 1.18 tv if (xe_debug) {
378 1.18 tv char sbuf[256];
379 1.18 tv
380 1.18 tv bitmask_snprintf(rxstat, XE_RXSTAT_BITS, sbuf, sizeof(sbuf));
381 1.18 tv printf("%s: rx interrupt, rxstat = %s\n",
382 1.18 tv sc->sc_dev.dv_xname, sbuf);
383 1.18 tv
384 1.18 tv bitmask_snprintf(bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT),
385 1.18 tv XE_RXSTAT_BITS, sbuf, sizeof(sbuf));
386 1.18 tv printf("rxstat = 0x%s\n", sbuf);
387 1.18 tv
388 1.18 tv bitmask_snprintf(bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK),
389 1.18 tv XE_RXMASK_BITS, sbuf, sizeof(sbuf));
390 1.18 tv printf("rxmask = 0x%s\n", sbuf);
391 1.18 tv
392 1.18 tv bitmask_snprintf(bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMODE),
393 1.18 tv XE_RXMODE_BITS, sbuf, sizeof(sbuf));
394 1.18 tv printf("rxmode = 0x%s\n", sbuf);
395 1.18 tv }
396 1.18 tv #endif
397 1.17 dbj
398 1.1 dbj return;
399 1.1 dbj }
400 1.1 dbj
401 1.1 dbj /*
402 1.1 dbj * Controller transmit interrupt.
403 1.1 dbj */
404 1.1 dbj void
405 1.1 dbj mb8795_tint(sc)
406 1.1 dbj struct mb8795_softc *sc;
407 1.1 dbj
408 1.1 dbj {
409 1.1 dbj u_char txstat;
410 1.1 dbj u_char txmask;
411 1.1 dbj struct ifnet *ifp = &sc->sc_ethercom.ec_if;
412 1.1 dbj
413 1.1 dbj txstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT);
414 1.1 dbj txmask = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK);
415 1.1 dbj
416 1.1 dbj if (txstat & XE_TXSTAT_SHORTED) {
417 1.1 dbj printf("%s: tx cable shorted\n", sc->sc_dev.dv_xname);
418 1.1 dbj ifp->if_oerrors++;
419 1.1 dbj }
420 1.1 dbj if (txstat & XE_TXSTAT_UNDERFLOW) {
421 1.1 dbj printf("%s: tx underflow\n", sc->sc_dev.dv_xname);
422 1.1 dbj ifp->if_oerrors++;
423 1.1 dbj }
424 1.1 dbj if (txstat & XE_TXSTAT_COLLERR) {
425 1.1 dbj DPRINTF(("%s: tx collision\n", sc->sc_dev.dv_xname));
426 1.1 dbj ifp->if_collisions++;
427 1.1 dbj }
428 1.1 dbj if (txstat & XE_TXSTAT_COLLERR16) {
429 1.1 dbj printf("%s: tx 16th collision\n", sc->sc_dev.dv_xname);
430 1.1 dbj ifp->if_oerrors++;
431 1.1 dbj ifp->if_collisions += 16;
432 1.1 dbj }
433 1.1 dbj
434 1.1 dbj #if 0
435 1.1 dbj if (txstat & XE_TXSTAT_READY) {
436 1.18 tv char sbuf[256];
437 1.1 dbj
438 1.18 tv bitmask_snprintf(txstat, XE_TXSTAT_BITS, sbuf, sizeof(sbuf));
439 1.18 tv panic("%s: unexpected tx interrupt %s",
440 1.18 tv sc->sc_dev.dv_xname, sbuf);
441 1.1 dbj
442 1.1 dbj /* turn interrupt off */
443 1.1 dbj bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK,
444 1.1 dbj txmask & ~XE_TXMASK_READYIE);
445 1.1 dbj }
446 1.1 dbj #endif
447 1.1 dbj
448 1.1 dbj return;
449 1.1 dbj }
450 1.1 dbj
451 1.1 dbj /****************************************************************/
452 1.1 dbj
453 1.1 dbj void
454 1.1 dbj mb8795_reset(sc)
455 1.1 dbj struct mb8795_softc *sc;
456 1.1 dbj {
457 1.1 dbj int s;
458 1.1 dbj
459 1.1 dbj s = splimp();
460 1.1 dbj mb8795_init(sc);
461 1.1 dbj splx(s);
462 1.1 dbj }
463 1.1 dbj
464 1.1 dbj void
465 1.1 dbj mb8795_watchdog(ifp)
466 1.1 dbj struct ifnet *ifp;
467 1.1 dbj {
468 1.1 dbj struct mb8795_softc *sc = ifp->if_softc;
469 1.1 dbj
470 1.1 dbj log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
471 1.1 dbj ++ifp->if_oerrors;
472 1.1 dbj
473 1.1 dbj DPRINTF(("%s: %d input errors, %d input packets\n",
474 1.1 dbj sc->sc_dev.dv_xname, ifp->if_ierrors, ifp->if_ipackets));
475 1.1 dbj
476 1.1 dbj mb8795_reset(sc);
477 1.1 dbj }
478 1.1 dbj
479 1.1 dbj /*
480 1.1 dbj * Initialization of interface; set up initialization block
481 1.1 dbj * and transmit/receive descriptor rings.
482 1.1 dbj * @@@ error handling is bogus in here. memory leaks
483 1.1 dbj */
484 1.1 dbj void
485 1.1 dbj mb8795_init(sc)
486 1.1 dbj struct mb8795_softc *sc;
487 1.1 dbj {
488 1.1 dbj struct ifnet *ifp = &sc->sc_ethercom.ec_if;
489 1.1 dbj
490 1.1 dbj m_freem(sc->sc_tx_mb_head);
491 1.1 dbj sc->sc_tx_mb_head = NULL;
492 1.1 dbj sc->sc_tx_loaded = 0;
493 1.1 dbj
494 1.1 dbj {
495 1.1 dbj int i;
496 1.1 dbj for(i=0;i<MB8795_NRXBUFS;i++) {
497 1.1 dbj if (sc->sc_rx_mb_head[i]) {
498 1.1 dbj bus_dmamap_unload(sc->sc_rx_dmat, sc->sc_rx_dmamap[i]);
499 1.1 dbj m_freem(sc->sc_rx_mb_head[i]);
500 1.1 dbj }
501 1.1 dbj sc->sc_rx_mb_head[i] =
502 1.1 dbj mb8795_rxdmamap_load(sc, sc->sc_rx_dmamap[i]);
503 1.1 dbj }
504 1.1 dbj sc->sc_rx_loaded_idx = 0;
505 1.1 dbj sc->sc_rx_completed_idx = 0;
506 1.1 dbj sc->sc_rx_handled_idx = 0;
507 1.1 dbj }
508 1.1 dbj
509 1.1 dbj bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RESET, XE_RESET_MODE);
510 1.1 dbj
511 1.1 dbj bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMODE, XE_TXMODE_LB_DISABLE);
512 1.1 dbj #if 0 /* This interrupt was sometimes failing to ack correctly
513 1.1 dbj * causing a loop @@@
514 1.1 dbj */
515 1.1 dbj bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK,
516 1.1 dbj XE_TXMASK_UNDERFLOWIE | XE_TXMASK_COLLIE | XE_TXMASK_COLL16IE
517 1.1 dbj | XE_TXMASK_PARERRIE);
518 1.1 dbj #else
519 1.1 dbj bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 0);
520 1.1 dbj #endif
521 1.1 dbj bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT, XE_TXSTAT_CLEAR);
522 1.1 dbj
523 1.1 dbj bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXMODE, XE_RXMODE_NORMAL);
524 1.1 dbj
525 1.1 dbj bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK,
526 1.1 dbj XE_RXMASK_OKIE | XE_RXMASK_RESETIE | XE_RXMASK_SHORTIE |
527 1.1 dbj XE_RXMASK_ALIGNERRIE | XE_RXMASK_CRCERRIE | XE_RXMASK_OVERFLOWIE);
528 1.1 dbj
529 1.1 dbj bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT, XE_RXSTAT_CLEAR);
530 1.1 dbj
531 1.1 dbj {
532 1.1 dbj int i;
533 1.1 dbj for(i=0;i<sizeof(sc->sc_enaddr);i++) {
534 1.1 dbj bus_space_write_1(sc->sc_bst,sc->sc_bsh,XE_ENADDR+i,sc->sc_enaddr[i]);
535 1.1 dbj }
536 1.1 dbj }
537 1.1 dbj
538 1.1 dbj DPRINTF(("%s: initializing ethernet %02x:%02x:%02x:%02x:%02x:%02x, size=%d\n",
539 1.1 dbj sc->sc_dev.dv_xname,
540 1.1 dbj sc->sc_enaddr[0],sc->sc_enaddr[1],sc->sc_enaddr[2],
541 1.1 dbj sc->sc_enaddr[3],sc->sc_enaddr[4],sc->sc_enaddr[5],
542 1.1 dbj sizeof(sc->sc_enaddr)));
543 1.1 dbj
544 1.1 dbj bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RESET, 0);
545 1.1 dbj
546 1.1 dbj ifp->if_flags |= IFF_RUNNING;
547 1.1 dbj ifp->if_flags &= ~IFF_OACTIVE;
548 1.1 dbj ifp->if_timer = 0;
549 1.1 dbj
550 1.1 dbj nextdma_init(sc->sc_tx_nd);
551 1.1 dbj nextdma_init(sc->sc_rx_nd);
552 1.1 dbj
553 1.16 dbj nextdma_start(sc->sc_rx_nd, DMACSR_SETREAD);
554 1.1 dbj
555 1.1 dbj if (ifp->if_snd.ifq_head != NULL) {
556 1.1 dbj mb8795_start(ifp);
557 1.1 dbj }
558 1.1 dbj }
559 1.1 dbj
560 1.1 dbj void
561 1.1 dbj mb8795_stop(sc)
562 1.1 dbj struct mb8795_softc *sc;
563 1.1 dbj {
564 1.1 dbj printf("%s: stop not implemented\n", sc->sc_dev.dv_xname);
565 1.1 dbj }
566 1.1 dbj
567 1.1 dbj
568 1.1 dbj void
569 1.1 dbj mb8795_shutdown(arg)
570 1.1 dbj void *arg;
571 1.1 dbj {
572 1.1 dbj struct mb8795_softc *sc = (struct mb8795_softc *)arg;
573 1.1 dbj mb8795_stop(sc);
574 1.1 dbj }
575 1.1 dbj
576 1.1 dbj /****************************************************************/
577 1.1 dbj int
578 1.1 dbj mb8795_ioctl(ifp, cmd, data)
579 1.1 dbj register struct ifnet *ifp;
580 1.1 dbj u_long cmd;
581 1.1 dbj caddr_t data;
582 1.1 dbj {
583 1.1 dbj register struct mb8795_softc *sc = ifp->if_softc;
584 1.1 dbj struct ifaddr *ifa = (struct ifaddr *)data;
585 1.1 dbj struct ifreq *ifr = (struct ifreq *)data;
586 1.1 dbj int s, error = 0;
587 1.1 dbj
588 1.1 dbj s = splimp();
589 1.1 dbj
590 1.1 dbj switch (cmd) {
591 1.1 dbj
592 1.1 dbj case SIOCSIFADDR:
593 1.1 dbj ifp->if_flags |= IFF_UP;
594 1.1 dbj
595 1.1 dbj switch (ifa->ifa_addr->sa_family) {
596 1.1 dbj #ifdef INET
597 1.1 dbj case AF_INET:
598 1.1 dbj mb8795_init(sc);
599 1.1 dbj arp_ifinit(ifp, ifa);
600 1.1 dbj break;
601 1.1 dbj #endif
602 1.1 dbj #ifdef NS
603 1.1 dbj case AF_NS:
604 1.1 dbj {
605 1.1 dbj register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
606 1.1 dbj
607 1.1 dbj if (ns_nullhost(*ina))
608 1.1 dbj ina->x_host =
609 1.1 dbj *(union ns_host *)LLADDR(ifp->if_sadl);
610 1.1 dbj else {
611 1.1 dbj bcopy(ina->x_host.c_host,
612 1.1 dbj LLADDR(ifp->if_sadl),
613 1.1 dbj sizeof(sc->sc_enaddr));
614 1.1 dbj }
615 1.1 dbj /* Set new address. */
616 1.1 dbj mb8795_init(sc);
617 1.1 dbj break;
618 1.1 dbj }
619 1.1 dbj #endif
620 1.1 dbj default:
621 1.1 dbj mb8795_init(sc);
622 1.1 dbj break;
623 1.1 dbj }
624 1.1 dbj break;
625 1.1 dbj
626 1.1 dbj #if defined(CCITT) && defined(LLC)
627 1.1 dbj case SIOCSIFCONF_X25:
628 1.1 dbj ifp->if_flags |= IFF_UP;
629 1.1 dbj ifa->ifa_rtrequest = cons_rtrequest; /* XXX */
630 1.1 dbj error = x25_llcglue(PRC_IFUP, ifa->ifa_addr);
631 1.1 dbj if (error == 0)
632 1.1 dbj mb8795_init(sc);
633 1.1 dbj break;
634 1.1 dbj #endif /* CCITT && LLC */
635 1.1 dbj
636 1.1 dbj case SIOCSIFFLAGS:
637 1.1 dbj if ((ifp->if_flags & IFF_UP) == 0 &&
638 1.1 dbj (ifp->if_flags & IFF_RUNNING) != 0) {
639 1.1 dbj /*
640 1.1 dbj * If interface is marked down and it is running, then
641 1.1 dbj * stop it.
642 1.1 dbj */
643 1.1 dbj mb8795_stop(sc);
644 1.1 dbj ifp->if_flags &= ~IFF_RUNNING;
645 1.1 dbj } else if ((ifp->if_flags & IFF_UP) != 0 &&
646 1.1 dbj (ifp->if_flags & IFF_RUNNING) == 0) {
647 1.1 dbj /*
648 1.1 dbj * If interface is marked up and it is stopped, then
649 1.1 dbj * start it.
650 1.1 dbj */
651 1.1 dbj mb8795_init(sc);
652 1.1 dbj } else {
653 1.1 dbj /*
654 1.1 dbj * Reset the interface to pick up changes in any other
655 1.1 dbj * flags that affect hardware registers.
656 1.1 dbj */
657 1.1 dbj /*mb8795_stop(sc);*/
658 1.1 dbj mb8795_init(sc);
659 1.1 dbj }
660 1.1 dbj #ifdef XE_DEBUG
661 1.1 dbj if (ifp->if_flags & IFF_DEBUG)
662 1.1 dbj sc->sc_debug = 1;
663 1.1 dbj else
664 1.1 dbj sc->sc_debug = 0;
665 1.1 dbj #endif
666 1.1 dbj break;
667 1.1 dbj
668 1.1 dbj case SIOCADDMULTI:
669 1.1 dbj case SIOCDELMULTI:
670 1.1 dbj error = (cmd == SIOCADDMULTI) ?
671 1.1 dbj ether_addmulti(ifr, &sc->sc_ethercom) :
672 1.1 dbj ether_delmulti(ifr, &sc->sc_ethercom);
673 1.1 dbj
674 1.1 dbj if (error == ENETRESET) {
675 1.1 dbj /*
676 1.1 dbj * Multicast list has changed; set the hardware filter
677 1.1 dbj * accordingly.
678 1.1 dbj */
679 1.1 dbj mb8795_reset(sc);
680 1.1 dbj error = 0;
681 1.1 dbj }
682 1.1 dbj break;
683 1.1 dbj
684 1.1 dbj #if 0
685 1.1 dbj case SIOCGIFMEDIA:
686 1.1 dbj case SIOCSIFMEDIA:
687 1.1 dbj error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd);
688 1.1 dbj break;
689 1.1 dbj #endif
690 1.1 dbj
691 1.1 dbj default:
692 1.1 dbj error = EINVAL;
693 1.1 dbj break;
694 1.1 dbj }
695 1.1 dbj
696 1.1 dbj splx(s);
697 1.1 dbj
698 1.1 dbj #if 0
699 1.1 dbj DPRINTF(("DEBUG: mb8795_ioctl(0x%lx) returning %d\n",
700 1.1 dbj cmd,error));
701 1.1 dbj #endif
702 1.1 dbj
703 1.1 dbj return (error);
704 1.1 dbj }
705 1.1 dbj
706 1.1 dbj /*
707 1.1 dbj * Setup output on interface.
708 1.1 dbj * Get another datagram to send off of the interface queue, and map it to the
709 1.1 dbj * interface before starting the output.
710 1.1 dbj * Called only at splimp or interrupt level.
711 1.1 dbj */
712 1.1 dbj void
713 1.1 dbj mb8795_start(ifp)
714 1.1 dbj struct ifnet *ifp;
715 1.1 dbj {
716 1.1 dbj int error;
717 1.1 dbj struct mb8795_softc *sc = ifp->if_softc;
718 1.1 dbj
719 1.1 dbj if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
720 1.1 dbj return;
721 1.1 dbj
722 1.1 dbj DPRINTF(("%s: mb8795_start()\n",sc->sc_dev.dv_xname));
723 1.1 dbj
724 1.1 dbj #if (defined(DIAGNOSTIC))
725 1.1 dbj {
726 1.1 dbj u_char txstat;
727 1.1 dbj txstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT);
728 1.1 dbj if (!(txstat & XE_TXSTAT_READY)) {
729 1.6 dbj /* @@@ I used to panic here, but then it paniced once.
730 1.6 dbj * Let's see if I can just reset instead. [ dbj 980706.1900 ]
731 1.6 dbj */
732 1.6 dbj printf("%s: transmitter not ready\n", sc->sc_dev.dv_xname);
733 1.6 dbj mb8795_reset(sc);
734 1.6 dbj return;
735 1.1 dbj }
736 1.1 dbj }
737 1.1 dbj #endif
738 1.1 dbj
739 1.1 dbj #if 0
740 1.1 dbj return; /* @@@ Turn off xmit for debugging */
741 1.1 dbj #endif
742 1.1 dbj
743 1.1 dbj bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT, XE_TXSTAT_CLEAR);
744 1.1 dbj
745 1.1 dbj IF_DEQUEUE(&ifp->if_snd, sc->sc_tx_mb_head);
746 1.1 dbj if (sc->sc_tx_mb_head == 0) {
747 1.1 dbj printf("%s: No packet to start\n",
748 1.1 dbj sc->sc_dev.dv_xname);
749 1.1 dbj return;
750 1.1 dbj }
751 1.1 dbj
752 1.1 dbj ifp->if_timer = 5;
753 1.1 dbj
754 1.1 dbj /* The following is a next specific hack that should
755 1.1 dbj * probably be moved out of MI code.
756 1.1 dbj * This macro assumes it can move forward as needed
757 1.1 dbj * in the buffer. Perhaps it should zero the extra buffer.
758 1.1 dbj */
759 1.1 dbj #define REALIGN_DMABUF(s,l) \
760 1.1 dbj { (s) = ((u_char *)(((unsigned)(s)+DMA_BEGINALIGNMENT-1) \
761 1.1 dbj &~(DMA_BEGINALIGNMENT-1))); \
762 1.9 dbj (l) = ((u_char *)(((unsigned)((s)+(l))+DMA_ENDALIGNMENT-1) \
763 1.9 dbj &~(DMA_ENDALIGNMENT-1)))-(s);}
764 1.1 dbj
765 1.1 dbj #if 0
766 1.1 dbj error = bus_dmamap_load_mbuf(sc->sc_tx_dmat,
767 1.1 dbj sc->sc_tx_dmamap,
768 1.1 dbj sc->sc_tx_mb_head,
769 1.1 dbj BUS_DMA_NOWAIT);
770 1.1 dbj #else
771 1.1 dbj {
772 1.1 dbj u_char *buf = sc->sc_txbuf;
773 1.1 dbj int buflen = 0;
774 1.1 dbj struct mbuf *m = sc->sc_tx_mb_head;
775 1.1 dbj buflen = m->m_pkthdr.len;
776 1.1 dbj
777 1.1 dbj /* Fix runt packets, @@@ memory overrun */
778 1.1 dbj if (buflen < ETHERMIN+sizeof(struct ether_header)) {
779 1.1 dbj buflen = ETHERMIN+sizeof(struct ether_header);
780 1.1 dbj }
781 1.1 dbj
782 1.1 dbj buflen += 15;
783 1.1 dbj REALIGN_DMABUF(buf,buflen);
784 1.1 dbj if (buflen > 1520) {
785 1.1 dbj panic("%s: packet too long\n",sc->sc_dev.dv_xname);
786 1.1 dbj }
787 1.1 dbj
788 1.1 dbj {
789 1.1 dbj u_char *p = buf;
790 1.1 dbj for (m=sc->sc_tx_mb_head; m; m = m->m_next) {
791 1.1 dbj if (m->m_len == 0) continue;
792 1.1 dbj bcopy(mtod(m, u_char *), p, m->m_len);
793 1.1 dbj p += m->m_len;
794 1.1 dbj }
795 1.1 dbj }
796 1.1 dbj
797 1.1 dbj error = bus_dmamap_load(sc->sc_tx_dmat, sc->sc_tx_dmamap,
798 1.1 dbj buf,buflen,NULL,BUS_DMA_NOWAIT);
799 1.1 dbj }
800 1.1 dbj #endif
801 1.1 dbj if (error) {
802 1.1 dbj printf("%s: can't load mbuf chain, error = %d\n",
803 1.1 dbj sc->sc_dev.dv_xname, error);
804 1.1 dbj m_freem(sc->sc_tx_mb_head);
805 1.1 dbj sc->sc_tx_mb_head = NULL;
806 1.1 dbj return;
807 1.1 dbj }
808 1.1 dbj
809 1.1 dbj #ifdef DIAGNOSTIC
810 1.8 dbj if (sc->sc_tx_loaded != 0) {
811 1.1 dbj panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname,
812 1.1 dbj sc->sc_tx_loaded);
813 1.1 dbj }
814 1.1 dbj #endif
815 1.1 dbj
816 1.1 dbj ifp->if_flags |= IFF_OACTIVE;
817 1.1 dbj
818 1.1 dbj bus_dmamap_sync(sc->sc_tx_dmat, sc->sc_tx_dmamap, 0,
819 1.1 dbj sc->sc_tx_dmamap->dm_mapsize, BUS_DMASYNC_PREWRITE);
820 1.1 dbj
821 1.16 dbj nextdma_start(sc->sc_tx_nd, DMACSR_SETWRITE);
822 1.1 dbj
823 1.1 dbj #if NBPFILTER > 0
824 1.1 dbj /*
825 1.1 dbj * Pass packet to bpf if there is a listener.
826 1.1 dbj */
827 1.1 dbj if (ifp->if_bpf)
828 1.1 dbj bpf_mtap(ifp->if_bpf, sc->sc_tx_mb_head);
829 1.1 dbj #endif
830 1.1 dbj
831 1.1 dbj }
832 1.1 dbj
833 1.1 dbj /****************************************************************/
834 1.1 dbj
835 1.1 dbj void
836 1.1 dbj mb8795_txdma_completed(map, arg)
837 1.1 dbj bus_dmamap_t map;
838 1.1 dbj void *arg;
839 1.1 dbj {
840 1.1 dbj struct mb8795_softc *sc = arg;
841 1.1 dbj
842 1.1 dbj DPRINTF(("%s: mb8795_txdma_completed()\n",sc->sc_dev.dv_xname));
843 1.1 dbj
844 1.1 dbj #ifdef DIAGNOSTIC
845 1.1 dbj if (!sc->sc_tx_loaded) {
846 1.1 dbj panic("%s: tx completed never loaded ",sc->sc_dev.dv_xname);
847 1.1 dbj }
848 1.1 dbj if (map != sc->sc_tx_dmamap) {
849 1.1 dbj panic("%s: unexpected tx completed map",sc->sc_dev.dv_xname);
850 1.1 dbj }
851 1.1 dbj
852 1.1 dbj #endif
853 1.1 dbj }
854 1.1 dbj
855 1.1 dbj void
856 1.1 dbj mb8795_txdma_shutdown(arg)
857 1.1 dbj void *arg;
858 1.1 dbj {
859 1.1 dbj struct mb8795_softc *sc = arg;
860 1.1 dbj struct ifnet *ifp = &sc->sc_ethercom.ec_if;
861 1.1 dbj
862 1.1 dbj DPRINTF(("%s: mb8795_txdma_shutdown()\n",sc->sc_dev.dv_xname));
863 1.1 dbj
864 1.1 dbj #ifdef DIAGNOSTIC
865 1.1 dbj if (!sc->sc_tx_loaded) {
866 1.1 dbj panic("%s: tx shutdown never loaded ",sc->sc_dev.dv_xname);
867 1.1 dbj }
868 1.1 dbj #endif
869 1.1 dbj
870 1.1 dbj {
871 1.1 dbj
872 1.1 dbj if (sc->sc_tx_loaded) {
873 1.1 dbj bus_dmamap_sync(sc->sc_tx_dmat, sc->sc_tx_dmamap,
874 1.1 dbj 0, sc->sc_tx_dmamap->dm_mapsize,
875 1.1 dbj BUS_DMASYNC_POSTWRITE);
876 1.1 dbj bus_dmamap_unload(sc->sc_tx_dmat, sc->sc_tx_dmamap);
877 1.1 dbj m_freem(sc->sc_tx_mb_head);
878 1.1 dbj sc->sc_tx_mb_head = NULL;
879 1.1 dbj
880 1.1 dbj sc->sc_tx_loaded--;
881 1.1 dbj }
882 1.1 dbj
883 1.1 dbj #ifdef DIAGNOSTIC
884 1.1 dbj if (sc->sc_tx_loaded != 0) {
885 1.1 dbj panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname,
886 1.1 dbj sc->sc_tx_loaded);
887 1.1 dbj }
888 1.1 dbj #endif
889 1.1 dbj
890 1.1 dbj ifp->if_flags &= ~IFF_OACTIVE;
891 1.1 dbj
892 1.1 dbj ifp->if_timer = 0;
893 1.1 dbj
894 1.1 dbj if (ifp->if_snd.ifq_head != NULL) {
895 1.1 dbj mb8795_start(ifp);
896 1.1 dbj }
897 1.1 dbj
898 1.1 dbj }
899 1.1 dbj
900 1.1 dbj #if 0
901 1.1 dbj /* Enable ready interrupt */
902 1.1 dbj bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK,
903 1.1 dbj bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK)
904 1.1 dbj | XE_TXMASK_READYIE);
905 1.1 dbj #endif
906 1.1 dbj }
907 1.1 dbj
908 1.1 dbj
909 1.1 dbj void
910 1.1 dbj mb8795_rxdma_completed(map, arg)
911 1.1 dbj bus_dmamap_t map;
912 1.1 dbj void *arg;
913 1.1 dbj {
914 1.1 dbj struct mb8795_softc *sc = arg;
915 1.1 dbj
916 1.1 dbj sc->sc_rx_completed_idx++;
917 1.1 dbj sc->sc_rx_completed_idx %= MB8795_NRXBUFS;
918 1.1 dbj
919 1.1 dbj DPRINTF(("%s: mb8795_rxdma_completed(), sc->sc_rx_completed_idx = %d\n",
920 1.1 dbj sc->sc_dev.dv_xname, sc->sc_rx_completed_idx));
921 1.1 dbj
922 1.1 dbj #if (defined(DIAGNOSTIC))
923 1.1 dbj if (map != sc->sc_rx_dmamap[sc->sc_rx_completed_idx]) {
924 1.1 dbj panic("%s: Unexpected rx dmamap completed\n",
925 1.1 dbj sc->sc_dev.dv_xname);
926 1.1 dbj }
927 1.1 dbj #endif
928 1.1 dbj }
929 1.1 dbj
930 1.1 dbj void
931 1.1 dbj mb8795_rxdma_shutdown(arg)
932 1.1 dbj void *arg;
933 1.1 dbj {
934 1.1 dbj struct mb8795_softc *sc = arg;
935 1.1 dbj
936 1.8 dbj panic("%s: mb8795_rxdma_shutdown() unexpected", sc->sc_dev.dv_xname);
937 1.1 dbj }
938 1.1 dbj
939 1.1 dbj
940 1.1 dbj /*
941 1.1 dbj * load a dmamap with a freshly allocated mbuf
942 1.1 dbj */
943 1.1 dbj struct mbuf *
944 1.1 dbj mb8795_rxdmamap_load(sc,map)
945 1.1 dbj struct mb8795_softc *sc;
946 1.1 dbj bus_dmamap_t map;
947 1.1 dbj {
948 1.1 dbj struct ifnet *ifp = &sc->sc_ethercom.ec_if;
949 1.1 dbj struct mbuf *m;
950 1.1 dbj int error;
951 1.1 dbj
952 1.1 dbj MGETHDR(m, M_DONTWAIT, MT_DATA);
953 1.1 dbj if (m) {
954 1.1 dbj MCLGET(m, M_DONTWAIT);
955 1.1 dbj if ((m->m_flags & M_EXT) == 0) {
956 1.1 dbj m_freem(m);
957 1.1 dbj m = NULL;
958 1.1 dbj } else {
959 1.1 dbj m->m_len = MCLBYTES;
960 1.1 dbj }
961 1.1 dbj }
962 1.1 dbj if (!m) {
963 1.1 dbj /* @@@ Handle this gracefully by reusing a scratch buffer
964 1.1 dbj * or something.
965 1.1 dbj */
966 1.1 dbj panic("Unable to get memory for incoming ethernet\n");
967 1.1 dbj }
968 1.1 dbj
969 1.1 dbj /* Align buffer, @@@ next specific.
970 1.1 dbj * perhaps should be using M_ALIGN here instead?
971 1.1 dbj * First we give us a little room to align with.
972 1.1 dbj */
973 1.1 dbj {
974 1.1 dbj u_char *buf = m->m_data;
975 1.1 dbj int buflen = m->m_len;
976 1.9 dbj buflen -= DMA_ENDALIGNMENT+DMA_BEGINALIGNMENT;
977 1.1 dbj REALIGN_DMABUF(buf, buflen);
978 1.1 dbj m->m_data = buf;
979 1.1 dbj m->m_len = buflen;
980 1.1 dbj }
981 1.1 dbj
982 1.1 dbj m->m_pkthdr.rcvif = ifp;
983 1.1 dbj m->m_pkthdr.len = m->m_len;
984 1.1 dbj
985 1.1 dbj error = bus_dmamap_load_mbuf(sc->sc_rx_dmat,
986 1.1 dbj map, m, BUS_DMA_NOWAIT);
987 1.1 dbj
988 1.1 dbj bus_dmamap_sync(sc->sc_rx_dmat, map, 0,
989 1.1 dbj map->dm_mapsize, BUS_DMASYNC_PREREAD);
990 1.1 dbj
991 1.1 dbj if (error) {
992 1.1 dbj DPRINTF(("DEBUG: m->m_data = 0x%08x, m->m_len = %d\n",
993 1.1 dbj m->m_data, m->m_len));
994 1.1 dbj DPRINTF(("DEBUG: MCLBYTES = %d, map->_dm_size = %d\n",
995 1.1 dbj MCLBYTES, map->_dm_size));
996 1.1 dbj
997 1.1 dbj panic("%s: can't load rx mbuf chain, error = %d\n",
998 1.1 dbj sc->sc_dev.dv_xname, error);
999 1.1 dbj m_freem(m);
1000 1.1 dbj m = NULL;
1001 1.1 dbj }
1002 1.1 dbj
1003 1.1 dbj return(m);
1004 1.1 dbj }
1005 1.1 dbj
1006 1.1 dbj bus_dmamap_t
1007 1.1 dbj mb8795_rxdma_continue(arg)
1008 1.1 dbj void *arg;
1009 1.1 dbj {
1010 1.1 dbj struct mb8795_softc *sc = arg;
1011 1.1 dbj bus_dmamap_t map = NULL;
1012 1.1 dbj
1013 1.1 dbj /*
1014 1.1 dbj * Currently, starts dumping new packets if the buffers
1015 1.1 dbj * fill up. This should probably reclaim unhandled
1016 1.1 dbj * buffers instead so we drop older packets instead
1017 1.1 dbj * of newer ones.
1018 1.1 dbj */
1019 1.1 dbj if (((sc->sc_rx_loaded_idx+1)%MB8795_NRXBUFS) != sc->sc_rx_handled_idx) {
1020 1.1 dbj sc->sc_rx_loaded_idx++;
1021 1.1 dbj sc->sc_rx_loaded_idx %= MB8795_NRXBUFS;
1022 1.1 dbj map = sc->sc_rx_dmamap[sc->sc_rx_loaded_idx];
1023 1.1 dbj
1024 1.1 dbj DPRINTF(("%s: mb8795_rxdma_continue() sc->sc_rx_loaded_idx = %d\nn",
1025 1.1 dbj sc->sc_dev.dv_xname,sc->sc_rx_loaded_idx));
1026 1.1 dbj }
1027 1.1 dbj #if (defined(DIAGNOSTIC))
1028 1.1 dbj else {
1029 1.17 dbj panic("%s: out of receive DMA buffers\n",sc->sc_dev.dv_xname);
1030 1.1 dbj }
1031 1.1 dbj #endif
1032 1.1 dbj
1033 1.1 dbj return(map);
1034 1.1 dbj }
1035 1.1 dbj
1036 1.1 dbj bus_dmamap_t
1037 1.1 dbj mb8795_txdma_continue(arg)
1038 1.1 dbj void *arg;
1039 1.1 dbj {
1040 1.1 dbj struct mb8795_softc *sc = arg;
1041 1.8 dbj bus_dmamap_t map;
1042 1.1 dbj
1043 1.1 dbj DPRINTF(("%s: mb8795_txdma_continue()\n",sc->sc_dev.dv_xname));
1044 1.1 dbj
1045 1.8 dbj if (sc->sc_tx_loaded) {
1046 1.8 dbj map = NULL;
1047 1.8 dbj } else {
1048 1.8 dbj map = sc->sc_tx_dmamap;
1049 1.8 dbj sc->sc_tx_loaded++;
1050 1.8 dbj }
1051 1.8 dbj
1052 1.1 dbj #ifdef DIAGNOSTIC
1053 1.1 dbj if (sc->sc_tx_loaded != 1) {
1054 1.8 dbj panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname,
1055 1.8 dbj sc->sc_tx_loaded);
1056 1.1 dbj }
1057 1.1 dbj #endif
1058 1.1 dbj
1059 1.1 dbj return(map);
1060 1.1 dbj }
1061 1.1 dbj
1062 1.1 dbj
1063 1.1 dbj /****************************************************************/
1064 1.1 dbj #if 0
1065 1.1 dbj int
1066 1.1 dbj mb8795_mediachange(ifp)
1067 1.1 dbj struct ifnet *ifp;
1068 1.1 dbj {
1069 1.1 dbj struct mb8795_softc *sc = ifp->if_softc;
1070 1.1 dbj
1071 1.1 dbj if (sc->sc_mediachange)
1072 1.1 dbj return ((*sc->sc_mediachange)(sc));
1073 1.12 abs return (0);
1074 1.1 dbj }
1075 1.1 dbj
1076 1.1 dbj void
1077 1.1 dbj mb8795_mediastatus(ifp, ifmr)
1078 1.1 dbj struct ifnet *ifp;
1079 1.1 dbj struct ifmediareq *ifmr;
1080 1.1 dbj {
1081 1.1 dbj struct mb8795_softc *sc = ifp->if_softc;
1082 1.1 dbj
1083 1.1 dbj if ((ifp->if_flags & IFF_UP) == 0)
1084 1.1 dbj return;
1085 1.1 dbj
1086 1.1 dbj ifmr->ifm_status = IFM_AVALID;
1087 1.1 dbj if (sc->sc_havecarrier)
1088 1.1 dbj ifmr->ifm_status |= IFM_ACTIVE;
1089 1.1 dbj
1090 1.1 dbj if (sc->sc_mediastatus)
1091 1.1 dbj (*sc->sc_mediastatus)(sc, ifmr);
1092 1.1 dbj }
1093 1.1 dbj #endif
1094 1.1 dbj /****************************************************************/
1095