mb8795.c revision 1.24.8.2 1 1.24.8.2 nathanw /* $NetBSD: mb8795.c,v 1.24.8.2 2002/06/20 03:40:22 nathanw Exp $ */
2 1.24.8.2 nathanw /*
3 1.24.8.2 nathanw * Copyright (c) 1998 Darrin B. Jewell
4 1.24.8.2 nathanw * All rights reserved.
5 1.24.8.2 nathanw *
6 1.24.8.2 nathanw * Redistribution and use in source and binary forms, with or without
7 1.24.8.2 nathanw * modification, are permitted provided that the following conditions
8 1.24.8.2 nathanw * are met:
9 1.24.8.2 nathanw * 1. Redistributions of source code must retain the above copyright
10 1.24.8.2 nathanw * notice, this list of conditions and the following disclaimer.
11 1.24.8.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
12 1.24.8.2 nathanw * notice, this list of conditions and the following disclaimer in the
13 1.24.8.2 nathanw * documentation and/or other materials provided with the distribution.
14 1.24.8.2 nathanw * 3. All advertising materials mentioning features or use of this software
15 1.24.8.2 nathanw * must display the following acknowledgement:
16 1.24.8.2 nathanw * This product includes software developed by Darrin B. Jewell
17 1.24.8.2 nathanw * 4. The name of the author may not be used to endorse or promote products
18 1.24.8.2 nathanw * derived from this software without specific prior written permission
19 1.24.8.2 nathanw *
20 1.24.8.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21 1.24.8.2 nathanw * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 1.24.8.2 nathanw * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 1.24.8.2 nathanw * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 1.24.8.2 nathanw * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 1.24.8.2 nathanw * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 1.24.8.2 nathanw * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 1.24.8.2 nathanw * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 1.24.8.2 nathanw * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 1.24.8.2 nathanw * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 1.24.8.2 nathanw */
31 1.24.8.2 nathanw
32 1.24.8.2 nathanw #include "opt_inet.h"
33 1.24.8.2 nathanw #include "opt_ccitt.h"
34 1.24.8.2 nathanw #include "opt_llc.h"
35 1.24.8.2 nathanw #include "opt_ns.h"
36 1.24.8.2 nathanw #include "bpfilter.h"
37 1.24.8.2 nathanw #include "rnd.h"
38 1.24.8.2 nathanw
39 1.24.8.2 nathanw #include <sys/param.h>
40 1.24.8.2 nathanw #include <sys/systm.h>
41 1.24.8.2 nathanw #include <sys/mbuf.h>
42 1.24.8.2 nathanw #include <sys/syslog.h>
43 1.24.8.2 nathanw #include <sys/socket.h>
44 1.24.8.2 nathanw #include <sys/device.h>
45 1.24.8.2 nathanw #include <sys/malloc.h>
46 1.24.8.2 nathanw #include <sys/ioctl.h>
47 1.24.8.2 nathanw #include <sys/errno.h>
48 1.24.8.2 nathanw #if NRND > 0
49 1.24.8.2 nathanw #include <sys/rnd.h>
50 1.24.8.2 nathanw #endif
51 1.24.8.2 nathanw
52 1.24.8.2 nathanw #include <net/if.h>
53 1.24.8.2 nathanw #include <net/if_dl.h>
54 1.24.8.2 nathanw #include <net/if_ether.h>
55 1.24.8.2 nathanw
56 1.24.8.2 nathanw #if 0
57 1.24.8.2 nathanw #include <net/if_media.h>
58 1.24.8.2 nathanw #endif
59 1.24.8.2 nathanw
60 1.24.8.2 nathanw #ifdef INET
61 1.24.8.2 nathanw #include <netinet/in.h>
62 1.24.8.2 nathanw #include <netinet/if_inarp.h>
63 1.24.8.2 nathanw #include <netinet/in_systm.h>
64 1.24.8.2 nathanw #include <netinet/in_var.h>
65 1.24.8.2 nathanw #include <netinet/ip.h>
66 1.24.8.2 nathanw #endif
67 1.24.8.2 nathanw
68 1.24.8.2 nathanw #ifdef NS
69 1.24.8.2 nathanw #include <netns/ns.h>
70 1.24.8.2 nathanw #include <netns/ns_if.h>
71 1.24.8.2 nathanw #endif
72 1.24.8.2 nathanw
73 1.24.8.2 nathanw #if defined(CCITT) && defined(LLC)
74 1.24.8.2 nathanw #include <sys/socketvar.h>
75 1.24.8.2 nathanw #include <netccitt/x25.h>
76 1.24.8.2 nathanw #include <netccitt/pk.h>
77 1.24.8.2 nathanw #include <netccitt/pk_var.h>
78 1.24.8.2 nathanw #include <netccitt/pk_extern.h>
79 1.24.8.2 nathanw #endif
80 1.24.8.2 nathanw
81 1.24.8.2 nathanw #if NBPFILTER > 0
82 1.24.8.2 nathanw #include <net/bpf.h>
83 1.24.8.2 nathanw #include <net/bpfdesc.h>
84 1.24.8.2 nathanw #endif
85 1.24.8.2 nathanw
86 1.24.8.2 nathanw #include <machine/cpu.h>
87 1.24.8.2 nathanw #include <machine/bus.h>
88 1.24.8.2 nathanw #include <machine/intr.h>
89 1.24.8.2 nathanw
90 1.24.8.2 nathanw /* @@@ this is here for the REALIGN_DMABUF hack below */
91 1.24.8.2 nathanw #include "nextdmareg.h"
92 1.24.8.2 nathanw #include "nextdmavar.h"
93 1.24.8.2 nathanw
94 1.24.8.2 nathanw #include "mb8795reg.h"
95 1.24.8.2 nathanw #include "mb8795var.h"
96 1.24.8.2 nathanw
97 1.24.8.2 nathanw #if 1
98 1.24.8.2 nathanw #define XE_DEBUG
99 1.24.8.2 nathanw #endif
100 1.24.8.2 nathanw
101 1.24.8.2 nathanw #ifdef XE_DEBUG
102 1.24.8.2 nathanw int xe_debug = 0;
103 1.24.8.2 nathanw #define DPRINTF(x) if (xe_debug) printf x;
104 1.24.8.2 nathanw #else
105 1.24.8.2 nathanw #define DPRINTF(x)
106 1.24.8.2 nathanw #endif
107 1.24.8.2 nathanw
108 1.24.8.2 nathanw
109 1.24.8.2 nathanw /*
110 1.24.8.2 nathanw * Support for
111 1.24.8.2 nathanw * Fujitsu Ethernet Data Link Controller (MB8795)
112 1.24.8.2 nathanw * and the Fujitsu Manchester Encoder/Decoder (MB502).
113 1.24.8.2 nathanw */
114 1.24.8.2 nathanw
115 1.24.8.2 nathanw void mb8795_shutdown __P((void *));
116 1.24.8.2 nathanw
117 1.24.8.2 nathanw struct mbuf * mb8795_rxdmamap_load __P((struct mb8795_softc *,
118 1.24.8.2 nathanw bus_dmamap_t map));
119 1.24.8.2 nathanw
120 1.24.8.2 nathanw bus_dmamap_t mb8795_rxdma_continue __P((void *));
121 1.24.8.2 nathanw void mb8795_rxdma_completed __P((bus_dmamap_t,void *));
122 1.24.8.2 nathanw bus_dmamap_t mb8795_txdma_continue __P((void *));
123 1.24.8.2 nathanw void mb8795_txdma_completed __P((bus_dmamap_t,void *));
124 1.24.8.2 nathanw void mb8795_rxdma_shutdown __P((void *));
125 1.24.8.2 nathanw void mb8795_txdma_shutdown __P((void *));
126 1.24.8.2 nathanw bus_dmamap_t mb8795_txdma_restart __P((bus_dmamap_t,void *));
127 1.24.8.2 nathanw void mb8795_start_dma __P((struct ifnet *));
128 1.24.8.2 nathanw
129 1.24.8.2 nathanw void
130 1.24.8.2 nathanw mb8795_config(sc)
131 1.24.8.2 nathanw struct mb8795_softc *sc;
132 1.24.8.2 nathanw {
133 1.24.8.2 nathanw struct ifnet *ifp = &sc->sc_ethercom.ec_if;
134 1.24.8.2 nathanw
135 1.24.8.2 nathanw DPRINTF(("%s: mb8795_config()\n",sc->sc_dev.dv_xname));
136 1.24.8.2 nathanw
137 1.24.8.2 nathanw /* Initialize ifnet structure. */
138 1.24.8.2 nathanw bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
139 1.24.8.2 nathanw ifp->if_softc = sc;
140 1.24.8.2 nathanw ifp->if_start = mb8795_start;
141 1.24.8.2 nathanw ifp->if_ioctl = mb8795_ioctl;
142 1.24.8.2 nathanw ifp->if_watchdog = mb8795_watchdog;
143 1.24.8.2 nathanw ifp->if_flags =
144 1.24.8.2 nathanw IFF_BROADCAST | IFF_NOTRAILERS;
145 1.24.8.2 nathanw
146 1.24.8.2 nathanw /* Attach the interface. */
147 1.24.8.2 nathanw if_attach(ifp);
148 1.24.8.2 nathanw ether_ifattach(ifp, sc->sc_enaddr);
149 1.24.8.2 nathanw
150 1.24.8.2 nathanw sc->sc_sh = shutdownhook_establish(mb8795_shutdown, sc);
151 1.24.8.2 nathanw if (sc->sc_sh == NULL)
152 1.24.8.2 nathanw panic("mb8795_config: can't establish shutdownhook");
153 1.24.8.2 nathanw
154 1.24.8.2 nathanw #if NRND > 0
155 1.24.8.2 nathanw rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname,
156 1.24.8.2 nathanw RND_TYPE_NET, 0);
157 1.24.8.2 nathanw #endif
158 1.24.8.2 nathanw
159 1.24.8.2 nathanw /* Initialize the dma maps */
160 1.24.8.2 nathanw {
161 1.24.8.2 nathanw int error;
162 1.24.8.2 nathanw if ((error = bus_dmamap_create(sc->sc_tx_dmat, MCLBYTES,
163 1.24.8.2 nathanw (MCLBYTES/MSIZE), MCLBYTES, 0, BUS_DMA_ALLOCNOW,
164 1.24.8.2 nathanw &sc->sc_tx_dmamap)) != 0) {
165 1.24.8.2 nathanw panic("%s: can't create tx DMA map, error = %d\n",
166 1.24.8.2 nathanw sc->sc_dev.dv_xname, error);
167 1.24.8.2 nathanw }
168 1.24.8.2 nathanw {
169 1.24.8.2 nathanw int i;
170 1.24.8.2 nathanw for(i=0;i<MB8795_NRXBUFS;i++) {
171 1.24.8.2 nathanw if ((error = bus_dmamap_create(sc->sc_rx_dmat, MCLBYTES,
172 1.24.8.2 nathanw (MCLBYTES/MSIZE), MCLBYTES, 0, BUS_DMA_ALLOCNOW,
173 1.24.8.2 nathanw &sc->sc_rx_dmamap[i])) != 0) {
174 1.24.8.2 nathanw panic("%s: can't create rx DMA map, error = %d\n",
175 1.24.8.2 nathanw sc->sc_dev.dv_xname, error);
176 1.24.8.2 nathanw }
177 1.24.8.2 nathanw sc->sc_rx_mb_head[i] = NULL;
178 1.24.8.2 nathanw }
179 1.24.8.2 nathanw sc->sc_rx_loaded_idx = 0;
180 1.24.8.2 nathanw sc->sc_rx_completed_idx = 0;
181 1.24.8.2 nathanw sc->sc_rx_handled_idx = 0;
182 1.24.8.2 nathanw }
183 1.24.8.2 nathanw }
184 1.24.8.2 nathanw
185 1.24.8.2 nathanw /* @@@ more next hacks
186 1.24.8.2 nathanw * the 2000 covers at least a 1500 mtu + headers
187 1.24.8.2 nathanw * + DMA_BEGINALIGNMENT+ DMA_ENDALIGNMENT
188 1.24.8.2 nathanw */
189 1.24.8.2 nathanw sc->sc_txbuf = malloc(2000, M_DEVBUF, M_NOWAIT);
190 1.24.8.2 nathanw if (!sc->sc_txbuf) panic("%s: can't malloc tx DMA buffer",
191 1.24.8.2 nathanw sc->sc_dev.dv_xname);
192 1.24.8.2 nathanw
193 1.24.8.2 nathanw sc->sc_tx_mb_head = NULL;
194 1.24.8.2 nathanw sc->sc_tx_loaded = 0;
195 1.24.8.2 nathanw
196 1.24.8.2 nathanw sc->sc_tx_nd->nd_shutdown_cb = mb8795_txdma_shutdown;
197 1.24.8.2 nathanw sc->sc_tx_nd->nd_continue_cb = mb8795_txdma_continue;
198 1.24.8.2 nathanw sc->sc_tx_nd->nd_completed_cb = mb8795_txdma_completed;
199 1.24.8.2 nathanw sc->sc_tx_nd->nd_cb_arg = sc;
200 1.24.8.2 nathanw
201 1.24.8.2 nathanw sc->sc_rx_nd->nd_shutdown_cb = mb8795_rxdma_shutdown;
202 1.24.8.2 nathanw sc->sc_rx_nd->nd_continue_cb = mb8795_rxdma_continue;
203 1.24.8.2 nathanw sc->sc_rx_nd->nd_completed_cb = mb8795_rxdma_completed;
204 1.24.8.2 nathanw sc->sc_rx_nd->nd_cb_arg = sc;
205 1.24.8.2 nathanw
206 1.24.8.2 nathanw DPRINTF(("%s: leaving mb8795_config()\n",sc->sc_dev.dv_xname));
207 1.24.8.2 nathanw }
208 1.24.8.2 nathanw
209 1.24.8.2 nathanw
210 1.24.8.2 nathanw /****************************************************************/
211 1.24.8.2 nathanw #ifdef XE_DEBUG
212 1.24.8.2 nathanw #define XCHR(x) "0123456789abcdef"[(x) & 0xf]
213 1.24.8.2 nathanw static void
214 1.24.8.2 nathanw xe_hex_dump(unsigned char *pkt, size_t len)
215 1.24.8.2 nathanw {
216 1.24.8.2 nathanw size_t i, j;
217 1.24.8.2 nathanw
218 1.24.8.2 nathanw printf("00000000 ");
219 1.24.8.2 nathanw for(i=0; i<len; i++) {
220 1.24.8.2 nathanw printf("%c%c ", XCHR(pkt[i]>>4), XCHR(pkt[i]));
221 1.24.8.2 nathanw if ((i+1) % 16 == 8) {
222 1.24.8.2 nathanw printf(" ");
223 1.24.8.2 nathanw }
224 1.24.8.2 nathanw if ((i+1) % 16 == 0) {
225 1.24.8.2 nathanw printf(" %c", '|');
226 1.24.8.2 nathanw for(j=0; j<16; j++) {
227 1.24.8.2 nathanw printf("%c", pkt[i-15+j]>=32 && pkt[i-15+j]<127?pkt[i-15+j]:'.');
228 1.24.8.2 nathanw }
229 1.24.8.2 nathanw printf("%c\n%c%c%c%c%c%c%c%c ", '|',
230 1.24.8.2 nathanw XCHR((i+1)>>28),XCHR((i+1)>>24),XCHR((i+1)>>20),XCHR((i+1)>>16),
231 1.24.8.2 nathanw XCHR((i+1)>>12), XCHR((i+1)>>8), XCHR((i+1)>>4), XCHR(i+1));
232 1.24.8.2 nathanw }
233 1.24.8.2 nathanw }
234 1.24.8.2 nathanw printf("\n");
235 1.24.8.2 nathanw }
236 1.24.8.2 nathanw #undef XCHR
237 1.24.8.2 nathanw #endif
238 1.24.8.2 nathanw
239 1.24.8.2 nathanw /*
240 1.24.8.2 nathanw * Controller receive interrupt.
241 1.24.8.2 nathanw */
242 1.24.8.2 nathanw void
243 1.24.8.2 nathanw mb8795_rint(sc)
244 1.24.8.2 nathanw struct mb8795_softc *sc;
245 1.24.8.2 nathanw {
246 1.24.8.2 nathanw struct ifnet *ifp = &sc->sc_ethercom.ec_if;
247 1.24.8.2 nathanw int error = 0;
248 1.24.8.2 nathanw u_char rxstat;
249 1.24.8.2 nathanw u_char rxmask;
250 1.24.8.2 nathanw
251 1.24.8.2 nathanw rxstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT);
252 1.24.8.2 nathanw rxmask = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK);
253 1.24.8.2 nathanw
254 1.24.8.2 nathanw bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT, XE_RXSTAT_CLEAR);
255 1.24.8.2 nathanw
256 1.24.8.2 nathanw if (rxstat & XE_RXSTAT_RESET) {
257 1.24.8.2 nathanw DPRINTF(("%s: rx reset packet\n",
258 1.24.8.2 nathanw sc->sc_dev.dv_xname));
259 1.24.8.2 nathanw error++;
260 1.24.8.2 nathanw }
261 1.24.8.2 nathanw if (rxstat & XE_RXSTAT_SHORT) {
262 1.24.8.2 nathanw DPRINTF(("%s: rx short packet\n",
263 1.24.8.2 nathanw sc->sc_dev.dv_xname));
264 1.24.8.2 nathanw error++;
265 1.24.8.2 nathanw }
266 1.24.8.2 nathanw if (rxstat & XE_RXSTAT_ALIGNERR) {
267 1.24.8.2 nathanw DPRINTF(("%s: rx alignment error\n",
268 1.24.8.2 nathanw sc->sc_dev.dv_xname));
269 1.24.8.2 nathanw #if 0
270 1.24.8.2 nathanw error++;
271 1.24.8.2 nathanw #endif
272 1.24.8.2 nathanw }
273 1.24.8.2 nathanw if (rxstat & XE_RXSTAT_CRCERR) {
274 1.24.8.2 nathanw DPRINTF(("%s: rx CRC error\n",
275 1.24.8.2 nathanw sc->sc_dev.dv_xname));
276 1.24.8.2 nathanw #if 0
277 1.24.8.2 nathanw error++;
278 1.24.8.2 nathanw #endif
279 1.24.8.2 nathanw }
280 1.24.8.2 nathanw if (rxstat & XE_RXSTAT_OVERFLOW) {
281 1.24.8.2 nathanw DPRINTF(("%s: rx overflow error\n",
282 1.24.8.2 nathanw sc->sc_dev.dv_xname));
283 1.24.8.2 nathanw #if 0
284 1.24.8.2 nathanw error++;
285 1.24.8.2 nathanw #endif
286 1.24.8.2 nathanw }
287 1.24.8.2 nathanw
288 1.24.8.2 nathanw if (error) {
289 1.24.8.2 nathanw ifp->if_ierrors++;
290 1.24.8.2 nathanw /* @@@ handle more gracefully, free memory, etc. */
291 1.24.8.2 nathanw }
292 1.24.8.2 nathanw
293 1.24.8.2 nathanw if (rxstat & XE_RXSTAT_OK) {
294 1.24.8.2 nathanw int s;
295 1.24.8.2 nathanw s = spldma();
296 1.24.8.2 nathanw
297 1.24.8.2 nathanw while(sc->sc_rx_handled_idx != sc->sc_rx_completed_idx) {
298 1.24.8.2 nathanw struct mbuf *m;
299 1.24.8.2 nathanw bus_dmamap_t map;
300 1.24.8.2 nathanw
301 1.24.8.2 nathanw sc->sc_rx_handled_idx++;
302 1.24.8.2 nathanw sc->sc_rx_handled_idx %= MB8795_NRXBUFS;
303 1.24.8.2 nathanw
304 1.24.8.2 nathanw /* Should probably not do this much while interrupts
305 1.24.8.2 nathanw * are disabled, but for now we will.
306 1.24.8.2 nathanw */
307 1.24.8.2 nathanw
308 1.24.8.2 nathanw map = sc->sc_rx_dmamap[sc->sc_rx_handled_idx];
309 1.24.8.2 nathanw m = sc->sc_rx_mb_head[sc->sc_rx_handled_idx];
310 1.24.8.2 nathanw
311 1.24.8.2 nathanw m->m_pkthdr.len = m->m_len = map->dm_xfer_len;
312 1.24.8.2 nathanw m->m_flags |= M_HASFCS;
313 1.24.8.2 nathanw m->m_pkthdr.rcvif = ifp;
314 1.24.8.2 nathanw
315 1.24.8.2 nathanw bus_dmamap_sync(sc->sc_rx_dmat, map,
316 1.24.8.2 nathanw 0, map->dm_mapsize, BUS_DMASYNC_POSTREAD);
317 1.24.8.2 nathanw
318 1.24.8.2 nathanw bus_dmamap_unload(sc->sc_rx_dmat, map);
319 1.24.8.2 nathanw
320 1.24.8.2 nathanw /* Install a fresh mbuf for next packet */
321 1.24.8.2 nathanw
322 1.24.8.2 nathanw sc->sc_rx_mb_head[sc->sc_rx_handled_idx] =
323 1.24.8.2 nathanw mb8795_rxdmamap_load(sc,map);
324 1.24.8.2 nathanw
325 1.24.8.2 nathanw /* Punt runt packets
326 1.24.8.2 nathanw * dma restarts create 0 length packets for example
327 1.24.8.2 nathanw */
328 1.24.8.2 nathanw if (m->m_len < ETHER_MIN_LEN) {
329 1.24.8.2 nathanw m_freem(m);
330 1.24.8.2 nathanw continue;
331 1.24.8.2 nathanw }
332 1.24.8.2 nathanw
333 1.24.8.2 nathanw /* Find receive length, keep crc */
334 1.24.8.2 nathanw /* enable dma interrupts while we process the packet */
335 1.24.8.2 nathanw splx(s);
336 1.24.8.2 nathanw
337 1.24.8.2 nathanw #if defined(XE_DEBUG)
338 1.24.8.2 nathanw /* Peek at the packet */
339 1.24.8.2 nathanw DPRINTF(("%s: received packet, at VA %p-%p,len %d\n",
340 1.24.8.2 nathanw sc->sc_dev.dv_xname,mtod(m,u_char *),mtod(m,u_char *)+m->m_len,m->m_len));
341 1.24.8.2 nathanw if (xe_debug > 3) {
342 1.24.8.2 nathanw xe_hex_dump(mtod(m,u_char *), m->m_pkthdr.len);
343 1.24.8.2 nathanw } else if (xe_debug > 2) {
344 1.24.8.2 nathanw xe_hex_dump(mtod(m,u_char *), m->m_pkthdr.len < 255 ? m->m_pkthdr.len : 128 );
345 1.24.8.2 nathanw }
346 1.24.8.2 nathanw #endif
347 1.24.8.2 nathanw
348 1.24.8.2 nathanw #if NBPFILTER > 0
349 1.24.8.2 nathanw /*
350 1.24.8.2 nathanw * Pass packet to bpf if there is a listener.
351 1.24.8.2 nathanw */
352 1.24.8.2 nathanw if (ifp->if_bpf)
353 1.24.8.2 nathanw bpf_mtap(ifp->if_bpf, m);
354 1.24.8.2 nathanw #endif
355 1.24.8.2 nathanw
356 1.24.8.2 nathanw {
357 1.24.8.2 nathanw ifp->if_ipackets++;
358 1.24.8.2 nathanw
359 1.24.8.2 nathanw /* Pass the packet up. */
360 1.24.8.2 nathanw (*ifp->if_input)(ifp, m);
361 1.24.8.2 nathanw }
362 1.24.8.2 nathanw
363 1.24.8.2 nathanw s = spldma();
364 1.24.8.2 nathanw
365 1.24.8.2 nathanw }
366 1.24.8.2 nathanw
367 1.24.8.2 nathanw splx(s);
368 1.24.8.2 nathanw
369 1.24.8.2 nathanw }
370 1.24.8.2 nathanw
371 1.24.8.2 nathanw #ifdef XE_DEBUG
372 1.24.8.2 nathanw if (xe_debug) {
373 1.24.8.2 nathanw char sbuf[256];
374 1.24.8.2 nathanw
375 1.24.8.2 nathanw bitmask_snprintf(rxstat, XE_RXSTAT_BITS, sbuf, sizeof(sbuf));
376 1.24.8.2 nathanw printf("%s: rx interrupt, rxstat = %s\n",
377 1.24.8.2 nathanw sc->sc_dev.dv_xname, sbuf);
378 1.24.8.2 nathanw
379 1.24.8.2 nathanw bitmask_snprintf(bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT),
380 1.24.8.2 nathanw XE_RXSTAT_BITS, sbuf, sizeof(sbuf));
381 1.24.8.2 nathanw printf("rxstat = 0x%s\n", sbuf);
382 1.24.8.2 nathanw
383 1.24.8.2 nathanw bitmask_snprintf(bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK),
384 1.24.8.2 nathanw XE_RXMASK_BITS, sbuf, sizeof(sbuf));
385 1.24.8.2 nathanw printf("rxmask = 0x%s\n", sbuf);
386 1.24.8.2 nathanw
387 1.24.8.2 nathanw bitmask_snprintf(bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMODE),
388 1.24.8.2 nathanw XE_RXMODE_BITS, sbuf, sizeof(sbuf));
389 1.24.8.2 nathanw printf("rxmode = 0x%s\n", sbuf);
390 1.24.8.2 nathanw }
391 1.24.8.2 nathanw #endif
392 1.24.8.2 nathanw
393 1.24.8.2 nathanw return;
394 1.24.8.2 nathanw }
395 1.24.8.2 nathanw
396 1.24.8.2 nathanw /*
397 1.24.8.2 nathanw * Controller transmit interrupt.
398 1.24.8.2 nathanw */
399 1.24.8.2 nathanw void
400 1.24.8.2 nathanw mb8795_tint(sc)
401 1.24.8.2 nathanw struct mb8795_softc *sc;
402 1.24.8.2 nathanw
403 1.24.8.2 nathanw {
404 1.24.8.2 nathanw u_char txstat;
405 1.24.8.2 nathanw u_char txmask;
406 1.24.8.2 nathanw struct ifnet *ifp = &sc->sc_ethercom.ec_if;
407 1.24.8.2 nathanw
408 1.24.8.2 nathanw txstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT);
409 1.24.8.2 nathanw txmask = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK);
410 1.24.8.2 nathanw
411 1.24.8.2 nathanw if (txstat & XE_TXSTAT_SHORTED) {
412 1.24.8.2 nathanw printf("%s: tx cable shorted\n", sc->sc_dev.dv_xname);
413 1.24.8.2 nathanw ifp->if_oerrors++;
414 1.24.8.2 nathanw }
415 1.24.8.2 nathanw if (txstat & XE_TXSTAT_UNDERFLOW) {
416 1.24.8.2 nathanw printf("%s: tx underflow\n", sc->sc_dev.dv_xname);
417 1.24.8.2 nathanw ifp->if_oerrors++;
418 1.24.8.2 nathanw }
419 1.24.8.2 nathanw if (txstat & XE_TXSTAT_COLLERR) {
420 1.24.8.2 nathanw DPRINTF(("%s: tx collision\n", sc->sc_dev.dv_xname));
421 1.24.8.2 nathanw ifp->if_collisions++;
422 1.24.8.2 nathanw }
423 1.24.8.2 nathanw if (txstat & XE_TXSTAT_COLLERR16) {
424 1.24.8.2 nathanw printf("%s: tx 16th collision\n", sc->sc_dev.dv_xname);
425 1.24.8.2 nathanw ifp->if_oerrors++;
426 1.24.8.2 nathanw ifp->if_collisions += 16;
427 1.24.8.2 nathanw }
428 1.24.8.2 nathanw
429 1.24.8.2 nathanw #if 0
430 1.24.8.2 nathanw if (txstat & XE_TXSTAT_READY) {
431 1.24.8.2 nathanw char sbuf[256];
432 1.24.8.2 nathanw
433 1.24.8.2 nathanw bitmask_snprintf(txstat, XE_TXSTAT_BITS, sbuf, sizeof(sbuf));
434 1.24.8.2 nathanw panic("%s: unexpected tx interrupt %s",
435 1.24.8.2 nathanw sc->sc_dev.dv_xname, sbuf);
436 1.24.8.2 nathanw
437 1.24.8.2 nathanw /* turn interrupt off */
438 1.24.8.2 nathanw bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK,
439 1.24.8.2 nathanw txmask & ~XE_TXMASK_READYIE);
440 1.24.8.2 nathanw }
441 1.24.8.2 nathanw #endif
442 1.24.8.2 nathanw
443 1.24.8.2 nathanw return;
444 1.24.8.2 nathanw }
445 1.24.8.2 nathanw
446 1.24.8.2 nathanw /****************************************************************/
447 1.24.8.2 nathanw
448 1.24.8.2 nathanw void
449 1.24.8.2 nathanw mb8795_reset(sc)
450 1.24.8.2 nathanw struct mb8795_softc *sc;
451 1.24.8.2 nathanw {
452 1.24.8.2 nathanw int s;
453 1.24.8.2 nathanw
454 1.24.8.2 nathanw s = splnet();
455 1.24.8.2 nathanw mb8795_init(sc);
456 1.24.8.2 nathanw splx(s);
457 1.24.8.2 nathanw }
458 1.24.8.2 nathanw
459 1.24.8.2 nathanw void
460 1.24.8.2 nathanw mb8795_watchdog(ifp)
461 1.24.8.2 nathanw struct ifnet *ifp;
462 1.24.8.2 nathanw {
463 1.24.8.2 nathanw struct mb8795_softc *sc = ifp->if_softc;
464 1.24.8.2 nathanw
465 1.24.8.2 nathanw log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
466 1.24.8.2 nathanw ++ifp->if_oerrors;
467 1.24.8.2 nathanw
468 1.24.8.2 nathanw DPRINTF(("%s: %lld input errors, %lld input packets\n",
469 1.24.8.2 nathanw sc->sc_dev.dv_xname, ifp->if_ierrors, ifp->if_ipackets));
470 1.24.8.2 nathanw
471 1.24.8.2 nathanw mb8795_reset(sc);
472 1.24.8.2 nathanw }
473 1.24.8.2 nathanw
474 1.24.8.2 nathanw /*
475 1.24.8.2 nathanw * Initialization of interface; set up initialization block
476 1.24.8.2 nathanw * and transmit/receive descriptor rings.
477 1.24.8.2 nathanw * @@@ error handling is bogus in here. memory leaks
478 1.24.8.2 nathanw */
479 1.24.8.2 nathanw void
480 1.24.8.2 nathanw mb8795_init(sc)
481 1.24.8.2 nathanw struct mb8795_softc *sc;
482 1.24.8.2 nathanw {
483 1.24.8.2 nathanw struct ifnet *ifp = &sc->sc_ethercom.ec_if;
484 1.24.8.2 nathanw
485 1.24.8.2 nathanw m_freem(sc->sc_tx_mb_head);
486 1.24.8.2 nathanw sc->sc_tx_mb_head = NULL;
487 1.24.8.2 nathanw sc->sc_tx_loaded = 0;
488 1.24.8.2 nathanw
489 1.24.8.2 nathanw {
490 1.24.8.2 nathanw int i;
491 1.24.8.2 nathanw for(i=0;i<MB8795_NRXBUFS;i++) {
492 1.24.8.2 nathanw if (sc->sc_rx_mb_head[i]) {
493 1.24.8.2 nathanw bus_dmamap_unload(sc->sc_rx_dmat, sc->sc_rx_dmamap[i]);
494 1.24.8.2 nathanw m_freem(sc->sc_rx_mb_head[i]);
495 1.24.8.2 nathanw }
496 1.24.8.2 nathanw sc->sc_rx_mb_head[i] =
497 1.24.8.2 nathanw mb8795_rxdmamap_load(sc, sc->sc_rx_dmamap[i]);
498 1.24.8.2 nathanw }
499 1.24.8.2 nathanw sc->sc_rx_loaded_idx = 0;
500 1.24.8.2 nathanw sc->sc_rx_completed_idx = 0;
501 1.24.8.2 nathanw sc->sc_rx_handled_idx = 0;
502 1.24.8.2 nathanw }
503 1.24.8.2 nathanw
504 1.24.8.2 nathanw bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RESET, XE_RESET_MODE);
505 1.24.8.2 nathanw
506 1.24.8.2 nathanw bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMODE, XE_TXMODE_LB_DISABLE);
507 1.24.8.2 nathanw #if 0 /* This interrupt was sometimes failing to ack correctly
508 1.24.8.2 nathanw * causing a loop @@@
509 1.24.8.2 nathanw */
510 1.24.8.2 nathanw bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK,
511 1.24.8.2 nathanw XE_TXMASK_UNDERFLOWIE | XE_TXMASK_COLLIE | XE_TXMASK_COLL16IE
512 1.24.8.2 nathanw | XE_TXMASK_PARERRIE);
513 1.24.8.2 nathanw #else
514 1.24.8.2 nathanw bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 0);
515 1.24.8.2 nathanw #endif
516 1.24.8.2 nathanw bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT, XE_TXSTAT_CLEAR);
517 1.24.8.2 nathanw
518 1.24.8.2 nathanw bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXMODE, XE_RXMODE_NORMAL);
519 1.24.8.2 nathanw
520 1.24.8.2 nathanw #if 0
521 1.24.8.2 nathanw bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK,
522 1.24.8.2 nathanw XE_RXMASK_OKIE | XE_RXMASK_RESETIE | XE_RXMASK_SHORTIE |
523 1.24.8.2 nathanw XE_RXMASK_ALIGNERRIE | XE_RXMASK_CRCERRIE | XE_RXMASK_OVERFLOWIE);
524 1.24.8.2 nathanw #else
525 1.24.8.2 nathanw bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK,
526 1.24.8.2 nathanw XE_RXMASK_OKIE | XE_RXMASK_RESETIE | XE_RXMASK_SHORTIE);
527 1.24.8.2 nathanw #endif
528 1.24.8.2 nathanw
529 1.24.8.2 nathanw bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT, XE_RXSTAT_CLEAR);
530 1.24.8.2 nathanw
531 1.24.8.2 nathanw {
532 1.24.8.2 nathanw int i;
533 1.24.8.2 nathanw for(i=0;i<sizeof(sc->sc_enaddr);i++) {
534 1.24.8.2 nathanw bus_space_write_1(sc->sc_bst,sc->sc_bsh,XE_ENADDR+i,sc->sc_enaddr[i]);
535 1.24.8.2 nathanw }
536 1.24.8.2 nathanw }
537 1.24.8.2 nathanw
538 1.24.8.2 nathanw DPRINTF(("%s: initializing ethernet %02x:%02x:%02x:%02x:%02x:%02x, size=%d\n",
539 1.24.8.2 nathanw sc->sc_dev.dv_xname,
540 1.24.8.2 nathanw sc->sc_enaddr[0],sc->sc_enaddr[1],sc->sc_enaddr[2],
541 1.24.8.2 nathanw sc->sc_enaddr[3],sc->sc_enaddr[4],sc->sc_enaddr[5],
542 1.24.8.2 nathanw sizeof(sc->sc_enaddr)));
543 1.24.8.2 nathanw
544 1.24.8.2 nathanw bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RESET, 0);
545 1.24.8.2 nathanw
546 1.24.8.2 nathanw ifp->if_flags |= IFF_RUNNING;
547 1.24.8.2 nathanw ifp->if_flags &= ~IFF_OACTIVE;
548 1.24.8.2 nathanw ifp->if_timer = 0;
549 1.24.8.2 nathanw
550 1.24.8.2 nathanw nextdma_init(sc->sc_tx_nd);
551 1.24.8.2 nathanw nextdma_init(sc->sc_rx_nd);
552 1.24.8.2 nathanw
553 1.24.8.2 nathanw nextdma_start(sc->sc_rx_nd, DMACSR_SETREAD);
554 1.24.8.2 nathanw
555 1.24.8.2 nathanw if (! IF_IS_EMPTY(&sc->sc_tx_snd)) {
556 1.24.8.2 nathanw mb8795_start_dma(ifp);
557 1.24.8.2 nathanw }
558 1.24.8.2 nathanw }
559 1.24.8.2 nathanw
560 1.24.8.2 nathanw void
561 1.24.8.2 nathanw mb8795_stop(sc)
562 1.24.8.2 nathanw struct mb8795_softc *sc;
563 1.24.8.2 nathanw {
564 1.24.8.2 nathanw printf("%s: stop not implemented\n", sc->sc_dev.dv_xname);
565 1.24.8.2 nathanw }
566 1.24.8.2 nathanw
567 1.24.8.2 nathanw
568 1.24.8.2 nathanw void
569 1.24.8.2 nathanw mb8795_shutdown(arg)
570 1.24.8.2 nathanw void *arg;
571 1.24.8.2 nathanw {
572 1.24.8.2 nathanw struct mb8795_softc *sc = (struct mb8795_softc *)arg;
573 1.24.8.2 nathanw mb8795_stop(sc);
574 1.24.8.2 nathanw }
575 1.24.8.2 nathanw
576 1.24.8.2 nathanw /****************************************************************/
577 1.24.8.2 nathanw int
578 1.24.8.2 nathanw mb8795_ioctl(ifp, cmd, data)
579 1.24.8.2 nathanw register struct ifnet *ifp;
580 1.24.8.2 nathanw u_long cmd;
581 1.24.8.2 nathanw caddr_t data;
582 1.24.8.2 nathanw {
583 1.24.8.2 nathanw register struct mb8795_softc *sc = ifp->if_softc;
584 1.24.8.2 nathanw struct ifaddr *ifa = (struct ifaddr *)data;
585 1.24.8.2 nathanw struct ifreq *ifr = (struct ifreq *)data;
586 1.24.8.2 nathanw int s, error = 0;
587 1.24.8.2 nathanw
588 1.24.8.2 nathanw s = splnet();
589 1.24.8.2 nathanw
590 1.24.8.2 nathanw switch (cmd) {
591 1.24.8.2 nathanw
592 1.24.8.2 nathanw case SIOCSIFADDR:
593 1.24.8.2 nathanw ifp->if_flags |= IFF_UP;
594 1.24.8.2 nathanw
595 1.24.8.2 nathanw switch (ifa->ifa_addr->sa_family) {
596 1.24.8.2 nathanw #ifdef INET
597 1.24.8.2 nathanw case AF_INET:
598 1.24.8.2 nathanw mb8795_init(sc);
599 1.24.8.2 nathanw arp_ifinit(ifp, ifa);
600 1.24.8.2 nathanw break;
601 1.24.8.2 nathanw #endif
602 1.24.8.2 nathanw #ifdef NS
603 1.24.8.2 nathanw case AF_NS:
604 1.24.8.2 nathanw {
605 1.24.8.2 nathanw register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
606 1.24.8.2 nathanw
607 1.24.8.2 nathanw if (ns_nullhost(*ina))
608 1.24.8.2 nathanw ina->x_host =
609 1.24.8.2 nathanw *(union ns_host *)LLADDR(ifp->if_sadl);
610 1.24.8.2 nathanw else {
611 1.24.8.2 nathanw bcopy(ina->x_host.c_host,
612 1.24.8.2 nathanw LLADDR(ifp->if_sadl),
613 1.24.8.2 nathanw sizeof(sc->sc_enaddr));
614 1.24.8.2 nathanw }
615 1.24.8.2 nathanw /* Set new address. */
616 1.24.8.2 nathanw mb8795_init(sc);
617 1.24.8.2 nathanw break;
618 1.24.8.2 nathanw }
619 1.24.8.2 nathanw #endif
620 1.24.8.2 nathanw default:
621 1.24.8.2 nathanw mb8795_init(sc);
622 1.24.8.2 nathanw break;
623 1.24.8.2 nathanw }
624 1.24.8.2 nathanw break;
625 1.24.8.2 nathanw
626 1.24.8.2 nathanw #if defined(CCITT) && defined(LLC)
627 1.24.8.2 nathanw case SIOCSIFCONF_X25:
628 1.24.8.2 nathanw ifp->if_flags |= IFF_UP;
629 1.24.8.2 nathanw ifa->ifa_rtrequest = cons_rtrequest; /* XXX */
630 1.24.8.2 nathanw error = x25_llcglue(PRC_IFUP, ifa->ifa_addr);
631 1.24.8.2 nathanw if (error == 0)
632 1.24.8.2 nathanw mb8795_init(sc);
633 1.24.8.2 nathanw break;
634 1.24.8.2 nathanw #endif /* CCITT && LLC */
635 1.24.8.2 nathanw
636 1.24.8.2 nathanw case SIOCSIFFLAGS:
637 1.24.8.2 nathanw if ((ifp->if_flags & IFF_UP) == 0 &&
638 1.24.8.2 nathanw (ifp->if_flags & IFF_RUNNING) != 0) {
639 1.24.8.2 nathanw /*
640 1.24.8.2 nathanw * If interface is marked down and it is running, then
641 1.24.8.2 nathanw * stop it.
642 1.24.8.2 nathanw */
643 1.24.8.2 nathanw mb8795_stop(sc);
644 1.24.8.2 nathanw ifp->if_flags &= ~IFF_RUNNING;
645 1.24.8.2 nathanw } else if ((ifp->if_flags & IFF_UP) != 0 &&
646 1.24.8.2 nathanw (ifp->if_flags & IFF_RUNNING) == 0) {
647 1.24.8.2 nathanw /*
648 1.24.8.2 nathanw * If interface is marked up and it is stopped, then
649 1.24.8.2 nathanw * start it.
650 1.24.8.2 nathanw */
651 1.24.8.2 nathanw mb8795_init(sc);
652 1.24.8.2 nathanw } else {
653 1.24.8.2 nathanw /*
654 1.24.8.2 nathanw * Reset the interface to pick up changes in any other
655 1.24.8.2 nathanw * flags that affect hardware registers.
656 1.24.8.2 nathanw */
657 1.24.8.2 nathanw /*mb8795_stop(sc);*/
658 1.24.8.2 nathanw mb8795_init(sc);
659 1.24.8.2 nathanw }
660 1.24.8.2 nathanw #ifdef XE_DEBUG
661 1.24.8.2 nathanw if (ifp->if_flags & IFF_DEBUG)
662 1.24.8.2 nathanw sc->sc_debug = 1;
663 1.24.8.2 nathanw else
664 1.24.8.2 nathanw sc->sc_debug = 0;
665 1.24.8.2 nathanw #endif
666 1.24.8.2 nathanw break;
667 1.24.8.2 nathanw
668 1.24.8.2 nathanw case SIOCADDMULTI:
669 1.24.8.2 nathanw case SIOCDELMULTI:
670 1.24.8.2 nathanw error = (cmd == SIOCADDMULTI) ?
671 1.24.8.2 nathanw ether_addmulti(ifr, &sc->sc_ethercom) :
672 1.24.8.2 nathanw ether_delmulti(ifr, &sc->sc_ethercom);
673 1.24.8.2 nathanw
674 1.24.8.2 nathanw if (error == ENETRESET) {
675 1.24.8.2 nathanw /*
676 1.24.8.2 nathanw * Multicast list has changed; set the hardware filter
677 1.24.8.2 nathanw * accordingly.
678 1.24.8.2 nathanw */
679 1.24.8.2 nathanw mb8795_reset(sc);
680 1.24.8.2 nathanw error = 0;
681 1.24.8.2 nathanw }
682 1.24.8.2 nathanw break;
683 1.24.8.2 nathanw
684 1.24.8.2 nathanw #if 0
685 1.24.8.2 nathanw case SIOCGIFMEDIA:
686 1.24.8.2 nathanw case SIOCSIFMEDIA:
687 1.24.8.2 nathanw error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd);
688 1.24.8.2 nathanw break;
689 1.24.8.2 nathanw #endif
690 1.24.8.2 nathanw
691 1.24.8.2 nathanw default:
692 1.24.8.2 nathanw error = EINVAL;
693 1.24.8.2 nathanw break;
694 1.24.8.2 nathanw }
695 1.24.8.2 nathanw
696 1.24.8.2 nathanw splx(s);
697 1.24.8.2 nathanw
698 1.24.8.2 nathanw #if 0
699 1.24.8.2 nathanw DPRINTF(("DEBUG: mb8795_ioctl(0x%lx) returning %d\n",
700 1.24.8.2 nathanw cmd,error));
701 1.24.8.2 nathanw #endif
702 1.24.8.2 nathanw
703 1.24.8.2 nathanw return (error);
704 1.24.8.2 nathanw }
705 1.24.8.2 nathanw
706 1.24.8.2 nathanw /*
707 1.24.8.2 nathanw * Setup output on interface.
708 1.24.8.2 nathanw * Get another datagram to send off of the interface queue, and map it to the
709 1.24.8.2 nathanw * interface before starting the output.
710 1.24.8.2 nathanw * Called only at splnet or interrupt level.
711 1.24.8.2 nathanw */
712 1.24.8.2 nathanw void
713 1.24.8.2 nathanw mb8795_start(ifp)
714 1.24.8.2 nathanw struct ifnet *ifp;
715 1.24.8.2 nathanw {
716 1.24.8.2 nathanw struct mb8795_softc *sc = ifp->if_softc;
717 1.24.8.2 nathanw struct mbuf *m;
718 1.24.8.2 nathanw int s;
719 1.24.8.2 nathanw
720 1.24.8.2 nathanw DPRINTF(("%s: mb8795_start()\n",sc->sc_dev.dv_xname));
721 1.24.8.2 nathanw
722 1.24.8.2 nathanw #ifdef DIAGNOSTIC
723 1.24.8.2 nathanw IFQ_POLL(&ifp->if_snd, m);
724 1.24.8.2 nathanw if (m == 0) {
725 1.24.8.2 nathanw panic("%s: No packet to start\n",
726 1.24.8.2 nathanw sc->sc_dev.dv_xname);
727 1.24.8.2 nathanw }
728 1.24.8.2 nathanw #endif
729 1.24.8.2 nathanw
730 1.24.8.2 nathanw while (1) {
731 1.24.8.2 nathanw if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
732 1.24.8.2 nathanw return;
733 1.24.8.2 nathanw
734 1.24.8.2 nathanw #if 0
735 1.24.8.2 nathanw return; /* @@@ Turn off xmit for debugging */
736 1.24.8.2 nathanw #endif
737 1.24.8.2 nathanw
738 1.24.8.2 nathanw ifp->if_flags |= IFF_OACTIVE;
739 1.24.8.2 nathanw
740 1.24.8.2 nathanw IFQ_DEQUEUE(&ifp->if_snd, m);
741 1.24.8.2 nathanw if (m == 0) {
742 1.24.8.2 nathanw ifp->if_flags &= ~IFF_OACTIVE;
743 1.24.8.2 nathanw return;
744 1.24.8.2 nathanw }
745 1.24.8.2 nathanw
746 1.24.8.2 nathanw #if NBPFILTER > 0
747 1.24.8.2 nathanw /*
748 1.24.8.2 nathanw * Pass packet to bpf if there is a listener.
749 1.24.8.2 nathanw */
750 1.24.8.2 nathanw if (ifp->if_bpf)
751 1.24.8.2 nathanw bpf_mtap(ifp->if_bpf, m);
752 1.24.8.2 nathanw #endif
753 1.24.8.2 nathanw
754 1.24.8.2 nathanw s = spldma();
755 1.24.8.2 nathanw IF_ENQUEUE(&sc->sc_tx_snd, m);
756 1.24.8.2 nathanw if (sc->sc_tx_loaded == 0)
757 1.24.8.2 nathanw mb8795_start_dma(ifp);
758 1.24.8.2 nathanw splx(s);
759 1.24.8.2 nathanw
760 1.24.8.2 nathanw ifp->if_flags &= ~IFF_OACTIVE;
761 1.24.8.2 nathanw }
762 1.24.8.2 nathanw
763 1.24.8.2 nathanw }
764 1.24.8.2 nathanw
765 1.24.8.2 nathanw void
766 1.24.8.2 nathanw mb8795_start_dma(ifp)
767 1.24.8.2 nathanw struct ifnet *ifp;
768 1.24.8.2 nathanw {
769 1.24.8.2 nathanw int error;
770 1.24.8.2 nathanw struct mb8795_softc *sc = ifp->if_softc;
771 1.24.8.2 nathanw
772 1.24.8.2 nathanw DPRINTF(("%s: mb8795_start_dma()\n",sc->sc_dev.dv_xname));
773 1.24.8.2 nathanw
774 1.24.8.2 nathanw #if (defined(DIAGNOSTIC))
775 1.24.8.2 nathanw {
776 1.24.8.2 nathanw u_char txstat;
777 1.24.8.2 nathanw txstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT);
778 1.24.8.2 nathanw if (!(txstat & XE_TXSTAT_READY)) {
779 1.24.8.2 nathanw /* @@@ I used to panic here, but then it paniced once.
780 1.24.8.2 nathanw * Let's see if I can just reset instead. [ dbj 980706.1900 ]
781 1.24.8.2 nathanw */
782 1.24.8.2 nathanw printf("%s: transmitter not ready\n",
783 1.24.8.2 nathanw sc->sc_dev.dv_xname);
784 1.24.8.2 nathanw mb8795_reset(sc);
785 1.24.8.2 nathanw return;
786 1.24.8.2 nathanw }
787 1.24.8.2 nathanw }
788 1.24.8.2 nathanw #endif
789 1.24.8.2 nathanw
790 1.24.8.2 nathanw #if 0
791 1.24.8.2 nathanw return; /* @@@ Turn off xmit for debugging */
792 1.24.8.2 nathanw #endif
793 1.24.8.2 nathanw
794 1.24.8.2 nathanw IF_DEQUEUE(&sc->sc_tx_snd, sc->sc_tx_mb_head);
795 1.24.8.2 nathanw if (sc->sc_tx_mb_head == 0) {
796 1.24.8.2 nathanw #ifdef DIAGNOSTIC
797 1.24.8.2 nathanw panic("%s: No packet to start_dma\n",
798 1.24.8.2 nathanw sc->sc_dev.dv_xname);
799 1.24.8.2 nathanw #endif
800 1.24.8.2 nathanw return;
801 1.24.8.2 nathanw }
802 1.24.8.2 nathanw
803 1.24.8.2 nathanw bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT, XE_TXSTAT_CLEAR);
804 1.24.8.2 nathanw
805 1.24.8.2 nathanw ifp->if_timer = 5;
806 1.24.8.2 nathanw
807 1.24.8.2 nathanw /* The following is a next specific hack that should
808 1.24.8.2 nathanw * probably be moved out of MI code.
809 1.24.8.2 nathanw * This macro assumes it can move forward as needed
810 1.24.8.2 nathanw * in the buffer. Perhaps it should zero the extra buffer.
811 1.24.8.2 nathanw */
812 1.24.8.2 nathanw #define REALIGN_DMABUF(s,l) \
813 1.24.8.2 nathanw { (s) = ((u_char *)(((unsigned)(s)+DMA_BEGINALIGNMENT-1) \
814 1.24.8.2 nathanw &~(DMA_BEGINALIGNMENT-1))); \
815 1.24.8.2 nathanw (l) = ((u_char *)(((unsigned)((s)+(l))+DMA_ENDALIGNMENT-1) \
816 1.24.8.2 nathanw &~(DMA_ENDALIGNMENT-1)))-(s);}
817 1.24.8.2 nathanw
818 1.24.8.2 nathanw #if 0
819 1.24.8.2 nathanw error = bus_dmamap_load_mbuf(sc->sc_tx_dmat,
820 1.24.8.2 nathanw sc->sc_tx_dmamap, sc->sc_tx_mb_head, BUS_DMA_NOWAIT);
821 1.24.8.2 nathanw #else
822 1.24.8.2 nathanw {
823 1.24.8.2 nathanw u_char *buf = sc->sc_txbuf;
824 1.24.8.2 nathanw int buflen = 0;
825 1.24.8.2 nathanw struct mbuf *m = sc->sc_tx_mb_head;
826 1.24.8.2 nathanw buflen = m->m_pkthdr.len;
827 1.24.8.2 nathanw
828 1.24.8.2 nathanw /* Fix runt packets, @@@ memory overrun */
829 1.24.8.2 nathanw if (buflen < ETHERMIN+sizeof(struct ether_header)) {
830 1.24.8.2 nathanw buflen = ETHERMIN+sizeof(struct ether_header);
831 1.24.8.2 nathanw }
832 1.24.8.2 nathanw
833 1.24.8.2 nathanw {
834 1.24.8.2 nathanw u_char *p = buf;
835 1.24.8.2 nathanw for (m=sc->sc_tx_mb_head; m; m = m->m_next) {
836 1.24.8.2 nathanw if (m->m_len == 0) continue;
837 1.24.8.2 nathanw bcopy(mtod(m, u_char *), p, m->m_len);
838 1.24.8.2 nathanw p += m->m_len;
839 1.24.8.2 nathanw }
840 1.24.8.2 nathanw }
841 1.24.8.2 nathanw
842 1.24.8.2 nathanw error = bus_dmamap_load(sc->sc_tx_dmat, sc->sc_tx_dmamap,
843 1.24.8.2 nathanw buf,buflen,NULL,BUS_DMA_NOWAIT);
844 1.24.8.2 nathanw }
845 1.24.8.2 nathanw #endif
846 1.24.8.2 nathanw if (error) {
847 1.24.8.2 nathanw printf("%s: can't load mbuf chain, error = %d\n",
848 1.24.8.2 nathanw sc->sc_dev.dv_xname, error);
849 1.24.8.2 nathanw m_freem(sc->sc_tx_mb_head);
850 1.24.8.2 nathanw sc->sc_tx_mb_head = NULL;
851 1.24.8.2 nathanw return;
852 1.24.8.2 nathanw }
853 1.24.8.2 nathanw
854 1.24.8.2 nathanw #ifdef DIAGNOSTIC
855 1.24.8.2 nathanw if (sc->sc_tx_loaded != 0) {
856 1.24.8.2 nathanw panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname,
857 1.24.8.2 nathanw sc->sc_tx_loaded);
858 1.24.8.2 nathanw }
859 1.24.8.2 nathanw #endif
860 1.24.8.2 nathanw
861 1.24.8.2 nathanw bus_dmamap_sync(sc->sc_tx_dmat, sc->sc_tx_dmamap, 0,
862 1.24.8.2 nathanw sc->sc_tx_dmamap->dm_mapsize, BUS_DMASYNC_PREWRITE);
863 1.24.8.2 nathanw
864 1.24.8.2 nathanw nextdma_start(sc->sc_tx_nd, DMACSR_SETWRITE);
865 1.24.8.2 nathanw
866 1.24.8.2 nathanw ifp->if_opackets++;
867 1.24.8.2 nathanw }
868 1.24.8.2 nathanw
869 1.24.8.2 nathanw /****************************************************************/
870 1.24.8.2 nathanw
871 1.24.8.2 nathanw void
872 1.24.8.2 nathanw mb8795_txdma_completed(map, arg)
873 1.24.8.2 nathanw bus_dmamap_t map;
874 1.24.8.2 nathanw void *arg;
875 1.24.8.2 nathanw {
876 1.24.8.2 nathanw struct mb8795_softc *sc = arg;
877 1.24.8.2 nathanw
878 1.24.8.2 nathanw DPRINTF(("%s: mb8795_txdma_completed()\n",sc->sc_dev.dv_xname));
879 1.24.8.2 nathanw
880 1.24.8.2 nathanw #ifdef DIAGNOSTIC
881 1.24.8.2 nathanw if (!sc->sc_tx_loaded) {
882 1.24.8.2 nathanw panic("%s: tx completed never loaded ",sc->sc_dev.dv_xname);
883 1.24.8.2 nathanw }
884 1.24.8.2 nathanw if (map != sc->sc_tx_dmamap) {
885 1.24.8.2 nathanw panic("%s: unexpected tx completed map",sc->sc_dev.dv_xname);
886 1.24.8.2 nathanw }
887 1.24.8.2 nathanw
888 1.24.8.2 nathanw #endif
889 1.24.8.2 nathanw }
890 1.24.8.2 nathanw
891 1.24.8.2 nathanw void
892 1.24.8.2 nathanw mb8795_txdma_shutdown(arg)
893 1.24.8.2 nathanw void *arg;
894 1.24.8.2 nathanw {
895 1.24.8.2 nathanw struct mb8795_softc *sc = arg;
896 1.24.8.2 nathanw struct ifnet *ifp = &sc->sc_ethercom.ec_if;
897 1.24.8.2 nathanw
898 1.24.8.2 nathanw DPRINTF(("%s: mb8795_txdma_shutdown()\n",sc->sc_dev.dv_xname));
899 1.24.8.2 nathanw
900 1.24.8.2 nathanw #ifdef DIAGNOSTIC
901 1.24.8.2 nathanw if (!sc->sc_tx_loaded) {
902 1.24.8.2 nathanw panic("%s: tx shutdown never loaded ",sc->sc_dev.dv_xname);
903 1.24.8.2 nathanw }
904 1.24.8.2 nathanw #endif
905 1.24.8.2 nathanw
906 1.24.8.2 nathanw {
907 1.24.8.2 nathanw
908 1.24.8.2 nathanw if (sc->sc_tx_loaded) {
909 1.24.8.2 nathanw bus_dmamap_sync(sc->sc_tx_dmat, sc->sc_tx_dmamap,
910 1.24.8.2 nathanw 0, sc->sc_tx_dmamap->dm_mapsize,
911 1.24.8.2 nathanw BUS_DMASYNC_POSTWRITE);
912 1.24.8.2 nathanw bus_dmamap_unload(sc->sc_tx_dmat, sc->sc_tx_dmamap);
913 1.24.8.2 nathanw m_freem(sc->sc_tx_mb_head);
914 1.24.8.2 nathanw sc->sc_tx_mb_head = NULL;
915 1.24.8.2 nathanw
916 1.24.8.2 nathanw sc->sc_tx_loaded--;
917 1.24.8.2 nathanw }
918 1.24.8.2 nathanw
919 1.24.8.2 nathanw #ifdef DIAGNOSTIC
920 1.24.8.2 nathanw if (sc->sc_tx_loaded != 0) {
921 1.24.8.2 nathanw panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname,
922 1.24.8.2 nathanw sc->sc_tx_loaded);
923 1.24.8.2 nathanw }
924 1.24.8.2 nathanw #endif
925 1.24.8.2 nathanw
926 1.24.8.2 nathanw ifp->if_timer = 0;
927 1.24.8.2 nathanw
928 1.24.8.2 nathanw if (! IF_IS_EMPTY(&sc->sc_tx_snd)) {
929 1.24.8.2 nathanw mb8795_start_dma(ifp);
930 1.24.8.2 nathanw }
931 1.24.8.2 nathanw
932 1.24.8.2 nathanw }
933 1.24.8.2 nathanw
934 1.24.8.2 nathanw #if 0
935 1.24.8.2 nathanw /* Enable ready interrupt */
936 1.24.8.2 nathanw bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK,
937 1.24.8.2 nathanw bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK)
938 1.24.8.2 nathanw | XE_TXMASK_READYIE);
939 1.24.8.2 nathanw #endif
940 1.24.8.2 nathanw }
941 1.24.8.2 nathanw
942 1.24.8.2 nathanw
943 1.24.8.2 nathanw void
944 1.24.8.2 nathanw mb8795_rxdma_completed(map, arg)
945 1.24.8.2 nathanw bus_dmamap_t map;
946 1.24.8.2 nathanw void *arg;
947 1.24.8.2 nathanw {
948 1.24.8.2 nathanw struct mb8795_softc *sc = arg;
949 1.24.8.2 nathanw
950 1.24.8.2 nathanw sc->sc_rx_completed_idx++;
951 1.24.8.2 nathanw sc->sc_rx_completed_idx %= MB8795_NRXBUFS;
952 1.24.8.2 nathanw
953 1.24.8.2 nathanw DPRINTF(("%s: mb8795_rxdma_completed(), sc->sc_rx_completed_idx = %d\n",
954 1.24.8.2 nathanw sc->sc_dev.dv_xname, sc->sc_rx_completed_idx));
955 1.24.8.2 nathanw
956 1.24.8.2 nathanw #if (defined(DIAGNOSTIC))
957 1.24.8.2 nathanw if (map != sc->sc_rx_dmamap[sc->sc_rx_completed_idx]) {
958 1.24.8.2 nathanw panic("%s: Unexpected rx dmamap completed\n",
959 1.24.8.2 nathanw sc->sc_dev.dv_xname);
960 1.24.8.2 nathanw }
961 1.24.8.2 nathanw #endif
962 1.24.8.2 nathanw }
963 1.24.8.2 nathanw
964 1.24.8.2 nathanw void
965 1.24.8.2 nathanw mb8795_rxdma_shutdown(arg)
966 1.24.8.2 nathanw void *arg;
967 1.24.8.2 nathanw {
968 1.24.8.2 nathanw struct mb8795_softc *sc = arg;
969 1.24.8.2 nathanw
970 1.24.8.2 nathanw DPRINTF(("%s: mb8795_rxdma_shutdown(), restarting.\n",
971 1.24.8.2 nathanw sc->sc_dev.dv_xname));
972 1.24.8.2 nathanw
973 1.24.8.2 nathanw nextdma_start(sc->sc_rx_nd, DMACSR_SETREAD);
974 1.24.8.2 nathanw }
975 1.24.8.2 nathanw
976 1.24.8.2 nathanw
977 1.24.8.2 nathanw /*
978 1.24.8.2 nathanw * load a dmamap with a freshly allocated mbuf
979 1.24.8.2 nathanw */
980 1.24.8.2 nathanw struct mbuf *
981 1.24.8.2 nathanw mb8795_rxdmamap_load(sc,map)
982 1.24.8.2 nathanw struct mb8795_softc *sc;
983 1.24.8.2 nathanw bus_dmamap_t map;
984 1.24.8.2 nathanw {
985 1.24.8.2 nathanw struct ifnet *ifp = &sc->sc_ethercom.ec_if;
986 1.24.8.2 nathanw struct mbuf *m;
987 1.24.8.2 nathanw int error;
988 1.24.8.2 nathanw
989 1.24.8.2 nathanw MGETHDR(m, M_DONTWAIT, MT_DATA);
990 1.24.8.2 nathanw if (m) {
991 1.24.8.2 nathanw MCLGET(m, M_DONTWAIT);
992 1.24.8.2 nathanw if ((m->m_flags & M_EXT) == 0) {
993 1.24.8.2 nathanw m_freem(m);
994 1.24.8.2 nathanw m = NULL;
995 1.24.8.2 nathanw } else {
996 1.24.8.2 nathanw m->m_len = MCLBYTES;
997 1.24.8.2 nathanw }
998 1.24.8.2 nathanw }
999 1.24.8.2 nathanw if (!m) {
1000 1.24.8.2 nathanw /* @@@ Handle this gracefully by reusing a scratch buffer
1001 1.24.8.2 nathanw * or something.
1002 1.24.8.2 nathanw */
1003 1.24.8.2 nathanw panic("Unable to get memory for incoming ethernet\n");
1004 1.24.8.2 nathanw }
1005 1.24.8.2 nathanw
1006 1.24.8.2 nathanw /* Align buffer, @@@ next specific.
1007 1.24.8.2 nathanw * perhaps should be using M_ALIGN here instead?
1008 1.24.8.2 nathanw * First we give us a little room to align with.
1009 1.24.8.2 nathanw */
1010 1.24.8.2 nathanw {
1011 1.24.8.2 nathanw u_char *buf = m->m_data;
1012 1.24.8.2 nathanw int buflen = m->m_len;
1013 1.24.8.2 nathanw buflen -= DMA_ENDALIGNMENT+DMA_BEGINALIGNMENT;
1014 1.24.8.2 nathanw REALIGN_DMABUF(buf, buflen);
1015 1.24.8.2 nathanw m->m_data = buf;
1016 1.24.8.2 nathanw m->m_len = buflen;
1017 1.24.8.2 nathanw }
1018 1.24.8.2 nathanw
1019 1.24.8.2 nathanw m->m_pkthdr.rcvif = ifp;
1020 1.24.8.2 nathanw m->m_pkthdr.len = m->m_len;
1021 1.24.8.2 nathanw
1022 1.24.8.2 nathanw error = bus_dmamap_load_mbuf(sc->sc_rx_dmat,
1023 1.24.8.2 nathanw map, m, BUS_DMA_NOWAIT);
1024 1.24.8.2 nathanw
1025 1.24.8.2 nathanw bus_dmamap_sync(sc->sc_rx_dmat, map, 0,
1026 1.24.8.2 nathanw map->dm_mapsize, BUS_DMASYNC_PREREAD);
1027 1.24.8.2 nathanw
1028 1.24.8.2 nathanw if (error) {
1029 1.24.8.2 nathanw DPRINTF(("DEBUG: m->m_data = %p, m->m_len = %d\n",
1030 1.24.8.2 nathanw m->m_data, m->m_len));
1031 1.24.8.2 nathanw DPRINTF(("DEBUG: MCLBYTES = %d, map->_dm_size = %ld\n",
1032 1.24.8.2 nathanw MCLBYTES, map->_dm_size));
1033 1.24.8.2 nathanw
1034 1.24.8.2 nathanw panic("%s: can't load rx mbuf chain, error = %d\n",
1035 1.24.8.2 nathanw sc->sc_dev.dv_xname, error);
1036 1.24.8.2 nathanw m_freem(m);
1037 1.24.8.2 nathanw m = NULL;
1038 1.24.8.2 nathanw }
1039 1.24.8.2 nathanw
1040 1.24.8.2 nathanw return(m);
1041 1.24.8.2 nathanw }
1042 1.24.8.2 nathanw
1043 1.24.8.2 nathanw bus_dmamap_t
1044 1.24.8.2 nathanw mb8795_rxdma_continue(arg)
1045 1.24.8.2 nathanw void *arg;
1046 1.24.8.2 nathanw {
1047 1.24.8.2 nathanw struct mb8795_softc *sc = arg;
1048 1.24.8.2 nathanw bus_dmamap_t map = NULL;
1049 1.24.8.2 nathanw
1050 1.24.8.2 nathanw /*
1051 1.24.8.2 nathanw * Currently, starts dumping new packets if the buffers
1052 1.24.8.2 nathanw * fill up. This should probably reclaim unhandled
1053 1.24.8.2 nathanw * buffers instead so we drop older packets instead
1054 1.24.8.2 nathanw * of newer ones.
1055 1.24.8.2 nathanw */
1056 1.24.8.2 nathanw if (((sc->sc_rx_loaded_idx+1)%MB8795_NRXBUFS) != sc->sc_rx_handled_idx){
1057 1.24.8.2 nathanw sc->sc_rx_loaded_idx++;
1058 1.24.8.2 nathanw sc->sc_rx_loaded_idx %= MB8795_NRXBUFS;
1059 1.24.8.2 nathanw map = sc->sc_rx_dmamap[sc->sc_rx_loaded_idx];
1060 1.24.8.2 nathanw
1061 1.24.8.2 nathanw DPRINTF(("%s: mb8795_rxdma_continue() sc->sc_rx_loaded_idx = %d\nn",
1062 1.24.8.2 nathanw sc->sc_dev.dv_xname,sc->sc_rx_loaded_idx));
1063 1.24.8.2 nathanw }
1064 1.24.8.2 nathanw #if (defined(DIAGNOSTIC))
1065 1.24.8.2 nathanw else {
1066 1.24.8.2 nathanw panic("%s: out of receive DMA buffers\n",sc->sc_dev.dv_xname);
1067 1.24.8.2 nathanw }
1068 1.24.8.2 nathanw #endif
1069 1.24.8.2 nathanw
1070 1.24.8.2 nathanw return(map);
1071 1.24.8.2 nathanw }
1072 1.24.8.2 nathanw
1073 1.24.8.2 nathanw bus_dmamap_t
1074 1.24.8.2 nathanw mb8795_txdma_continue(arg)
1075 1.24.8.2 nathanw void *arg;
1076 1.24.8.2 nathanw {
1077 1.24.8.2 nathanw struct mb8795_softc *sc = arg;
1078 1.24.8.2 nathanw bus_dmamap_t map;
1079 1.24.8.2 nathanw
1080 1.24.8.2 nathanw DPRINTF(("%s: mb8795_txdma_continue()\n",sc->sc_dev.dv_xname));
1081 1.24.8.2 nathanw
1082 1.24.8.2 nathanw if (sc->sc_tx_loaded) {
1083 1.24.8.2 nathanw map = NULL;
1084 1.24.8.2 nathanw } else {
1085 1.24.8.2 nathanw map = sc->sc_tx_dmamap;
1086 1.24.8.2 nathanw sc->sc_tx_loaded++;
1087 1.24.8.2 nathanw }
1088 1.24.8.2 nathanw
1089 1.24.8.2 nathanw #ifdef DIAGNOSTIC
1090 1.24.8.2 nathanw if (sc->sc_tx_loaded != 1) {
1091 1.24.8.2 nathanw panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname,
1092 1.24.8.2 nathanw sc->sc_tx_loaded);
1093 1.24.8.2 nathanw }
1094 1.24.8.2 nathanw #endif
1095 1.24.8.2 nathanw
1096 1.24.8.2 nathanw return(map);
1097 1.24.8.2 nathanw }
1098 1.24.8.2 nathanw
1099 1.24.8.2 nathanw /****************************************************************/
1100