mb8795.c revision 1.27 1 1.27 christos /* $NetBSD: mb8795.c,v 1.27 2002/07/11 16:03:11 christos Exp $ */
2 1.1 dbj /*
3 1.1 dbj * Copyright (c) 1998 Darrin B. Jewell
4 1.1 dbj * All rights reserved.
5 1.1 dbj *
6 1.1 dbj * Redistribution and use in source and binary forms, with or without
7 1.1 dbj * modification, are permitted provided that the following conditions
8 1.1 dbj * are met:
9 1.1 dbj * 1. Redistributions of source code must retain the above copyright
10 1.1 dbj * notice, this list of conditions and the following disclaimer.
11 1.1 dbj * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 dbj * notice, this list of conditions and the following disclaimer in the
13 1.1 dbj * documentation and/or other materials provided with the distribution.
14 1.1 dbj * 3. All advertising materials mentioning features or use of this software
15 1.1 dbj * must display the following acknowledgement:
16 1.1 dbj * This product includes software developed by Darrin B. Jewell
17 1.1 dbj * 4. The name of the author may not be used to endorse or promote products
18 1.1 dbj * derived from this software without specific prior written permission
19 1.1 dbj *
20 1.1 dbj * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21 1.1 dbj * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 1.1 dbj * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 1.1 dbj * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 1.1 dbj * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 1.1 dbj * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 1.1 dbj * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 1.1 dbj * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 1.1 dbj * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 1.1 dbj * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 1.1 dbj */
31 1.1 dbj
32 1.2 jonathan #include "opt_inet.h"
33 1.3 jonathan #include "opt_ccitt.h"
34 1.4 jonathan #include "opt_llc.h"
35 1.5 jonathan #include "opt_ns.h"
36 1.1 dbj #include "bpfilter.h"
37 1.1 dbj #include "rnd.h"
38 1.1 dbj
39 1.1 dbj #include <sys/param.h>
40 1.1 dbj #include <sys/systm.h>
41 1.1 dbj #include <sys/mbuf.h>
42 1.1 dbj #include <sys/syslog.h>
43 1.1 dbj #include <sys/socket.h>
44 1.1 dbj #include <sys/device.h>
45 1.1 dbj #include <sys/malloc.h>
46 1.1 dbj #include <sys/ioctl.h>
47 1.1 dbj #include <sys/errno.h>
48 1.1 dbj #if NRND > 0
49 1.1 dbj #include <sys/rnd.h>
50 1.1 dbj #endif
51 1.1 dbj
52 1.1 dbj #include <net/if.h>
53 1.1 dbj #include <net/if_dl.h>
54 1.1 dbj #include <net/if_ether.h>
55 1.1 dbj
56 1.1 dbj #include <net/if_media.h>
57 1.1 dbj
58 1.1 dbj #ifdef INET
59 1.1 dbj #include <netinet/in.h>
60 1.1 dbj #include <netinet/if_inarp.h>
61 1.1 dbj #include <netinet/in_systm.h>
62 1.1 dbj #include <netinet/in_var.h>
63 1.1 dbj #include <netinet/ip.h>
64 1.1 dbj #endif
65 1.1 dbj
66 1.1 dbj #ifdef NS
67 1.1 dbj #include <netns/ns.h>
68 1.1 dbj #include <netns/ns_if.h>
69 1.1 dbj #endif
70 1.1 dbj
71 1.1 dbj #if defined(CCITT) && defined(LLC)
72 1.1 dbj #include <sys/socketvar.h>
73 1.1 dbj #include <netccitt/x25.h>
74 1.1 dbj #include <netccitt/pk.h>
75 1.1 dbj #include <netccitt/pk_var.h>
76 1.1 dbj #include <netccitt/pk_extern.h>
77 1.1 dbj #endif
78 1.1 dbj
79 1.1 dbj #if NBPFILTER > 0
80 1.1 dbj #include <net/bpf.h>
81 1.1 dbj #include <net/bpfdesc.h>
82 1.1 dbj #endif
83 1.1 dbj
84 1.1 dbj #include <machine/cpu.h>
85 1.1 dbj #include <machine/bus.h>
86 1.1 dbj #include <machine/intr.h>
87 1.1 dbj
88 1.1 dbj /* @@@ this is here for the REALIGN_DMABUF hack below */
89 1.1 dbj #include "nextdmareg.h"
90 1.1 dbj #include "nextdmavar.h"
91 1.1 dbj
92 1.1 dbj #include "mb8795reg.h"
93 1.1 dbj #include "mb8795var.h"
94 1.1 dbj
95 1.27 christos #include "bmapreg.h"
96 1.27 christos
97 1.17 dbj #if 1
98 1.1 dbj #define XE_DEBUG
99 1.1 dbj #endif
100 1.1 dbj
101 1.27 christos #define PRINTF(x) printf x;
102 1.1 dbj #ifdef XE_DEBUG
103 1.17 dbj int xe_debug = 0;
104 1.17 dbj #define DPRINTF(x) if (xe_debug) printf x;
105 1.1 dbj #else
106 1.1 dbj #define DPRINTF(x)
107 1.1 dbj #endif
108 1.1 dbj
109 1.1 dbj
110 1.1 dbj /*
111 1.1 dbj * Support for
112 1.1 dbj * Fujitsu Ethernet Data Link Controller (MB8795)
113 1.1 dbj * and the Fujitsu Manchester Encoder/Decoder (MB502).
114 1.1 dbj */
115 1.1 dbj
116 1.1 dbj void mb8795_shutdown __P((void *));
117 1.1 dbj
118 1.1 dbj struct mbuf * mb8795_rxdmamap_load __P((struct mb8795_softc *,
119 1.1 dbj bus_dmamap_t map));
120 1.1 dbj
121 1.1 dbj bus_dmamap_t mb8795_rxdma_continue __P((void *));
122 1.1 dbj void mb8795_rxdma_completed __P((bus_dmamap_t,void *));
123 1.1 dbj bus_dmamap_t mb8795_txdma_continue __P((void *));
124 1.1 dbj void mb8795_txdma_completed __P((bus_dmamap_t,void *));
125 1.1 dbj void mb8795_rxdma_shutdown __P((void *));
126 1.1 dbj void mb8795_txdma_shutdown __P((void *));
127 1.1 dbj bus_dmamap_t mb8795_txdma_restart __P((bus_dmamap_t,void *));
128 1.26 jdolecek void mb8795_start_dma __P((struct ifnet *));
129 1.1 dbj
130 1.27 christos int mb8795_mediachange __P((struct ifnet *));
131 1.27 christos void mb8795_mediastatus __P((struct ifnet *, struct ifmediareq *));
132 1.27 christos
133 1.1 dbj void
134 1.27 christos mb8795_config(sc, media, nmedia, defmedia)
135 1.27 christos struct mb8795_softc *sc;
136 1.27 christos int *media, nmedia, defmedia;
137 1.1 dbj {
138 1.27 christos struct ifnet *ifp = &sc->sc_ethercom.ec_if;
139 1.27 christos int i;
140 1.1 dbj
141 1.1 dbj DPRINTF(("%s: mb8795_config()\n",sc->sc_dev.dv_xname));
142 1.1 dbj
143 1.1 dbj /* Initialize ifnet structure. */
144 1.1 dbj bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
145 1.1 dbj ifp->if_softc = sc;
146 1.1 dbj ifp->if_start = mb8795_start;
147 1.1 dbj ifp->if_ioctl = mb8795_ioctl;
148 1.1 dbj ifp->if_watchdog = mb8795_watchdog;
149 1.1 dbj ifp->if_flags =
150 1.1 dbj IFF_BROADCAST | IFF_NOTRAILERS;
151 1.1 dbj
152 1.27 christos /* Initialize media goo. */
153 1.27 christos ifmedia_init(&sc->sc_media, 0, mb8795_mediachange,
154 1.27 christos mb8795_mediastatus);
155 1.27 christos if (media != NULL) {
156 1.27 christos for (i = 0; i < nmedia; i++)
157 1.27 christos ifmedia_add(&sc->sc_media, media[i], 0, NULL);
158 1.27 christos ifmedia_set(&sc->sc_media, defmedia);
159 1.27 christos } else {
160 1.27 christos ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_MANUAL, 0, NULL);
161 1.27 christos ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_MANUAL);
162 1.27 christos }
163 1.27 christos
164 1.1 dbj /* Attach the interface. */
165 1.1 dbj if_attach(ifp);
166 1.1 dbj ether_ifattach(ifp, sc->sc_enaddr);
167 1.1 dbj
168 1.1 dbj sc->sc_sh = shutdownhook_establish(mb8795_shutdown, sc);
169 1.1 dbj if (sc->sc_sh == NULL)
170 1.1 dbj panic("mb8795_config: can't establish shutdownhook");
171 1.1 dbj
172 1.1 dbj #if NRND > 0
173 1.1 dbj rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname,
174 1.10 explorer RND_TYPE_NET, 0);
175 1.1 dbj #endif
176 1.1 dbj
177 1.1 dbj /* Initialize the dma maps */
178 1.1 dbj {
179 1.1 dbj int error;
180 1.1 dbj if ((error = bus_dmamap_create(sc->sc_tx_dmat, MCLBYTES,
181 1.1 dbj (MCLBYTES/MSIZE), MCLBYTES, 0, BUS_DMA_ALLOCNOW,
182 1.1 dbj &sc->sc_tx_dmamap)) != 0) {
183 1.1 dbj panic("%s: can't create tx DMA map, error = %d\n",
184 1.1 dbj sc->sc_dev.dv_xname, error);
185 1.1 dbj }
186 1.1 dbj {
187 1.1 dbj int i;
188 1.1 dbj for(i=0;i<MB8795_NRXBUFS;i++) {
189 1.1 dbj if ((error = bus_dmamap_create(sc->sc_rx_dmat, MCLBYTES,
190 1.1 dbj (MCLBYTES/MSIZE), MCLBYTES, 0, BUS_DMA_ALLOCNOW,
191 1.1 dbj &sc->sc_rx_dmamap[i])) != 0) {
192 1.1 dbj panic("%s: can't create rx DMA map, error = %d\n",
193 1.1 dbj sc->sc_dev.dv_xname, error);
194 1.1 dbj }
195 1.1 dbj sc->sc_rx_mb_head[i] = NULL;
196 1.1 dbj }
197 1.1 dbj sc->sc_rx_loaded_idx = 0;
198 1.1 dbj sc->sc_rx_completed_idx = 0;
199 1.1 dbj sc->sc_rx_handled_idx = 0;
200 1.1 dbj }
201 1.1 dbj }
202 1.1 dbj
203 1.1 dbj /* @@@ more next hacks
204 1.1 dbj * the 2000 covers at least a 1500 mtu + headers
205 1.9 dbj * + DMA_BEGINALIGNMENT+ DMA_ENDALIGNMENT
206 1.1 dbj */
207 1.1 dbj sc->sc_txbuf = malloc(2000, M_DEVBUF, M_NOWAIT);
208 1.1 dbj if (!sc->sc_txbuf) panic("%s: can't malloc tx DMA buffer",
209 1.1 dbj sc->sc_dev.dv_xname);
210 1.1 dbj
211 1.1 dbj sc->sc_tx_mb_head = NULL;
212 1.1 dbj sc->sc_tx_loaded = 0;
213 1.1 dbj
214 1.1 dbj sc->sc_tx_nd->nd_shutdown_cb = mb8795_txdma_shutdown;
215 1.1 dbj sc->sc_tx_nd->nd_continue_cb = mb8795_txdma_continue;
216 1.1 dbj sc->sc_tx_nd->nd_completed_cb = mb8795_txdma_completed;
217 1.1 dbj sc->sc_tx_nd->nd_cb_arg = sc;
218 1.1 dbj
219 1.1 dbj sc->sc_rx_nd->nd_shutdown_cb = mb8795_rxdma_shutdown;
220 1.1 dbj sc->sc_rx_nd->nd_continue_cb = mb8795_rxdma_continue;
221 1.1 dbj sc->sc_rx_nd->nd_completed_cb = mb8795_rxdma_completed;
222 1.1 dbj sc->sc_rx_nd->nd_cb_arg = sc;
223 1.1 dbj
224 1.1 dbj DPRINTF(("%s: leaving mb8795_config()\n",sc->sc_dev.dv_xname));
225 1.1 dbj }
226 1.1 dbj
227 1.27 christos /*
228 1.27 christos * Media change callback.
229 1.27 christos */
230 1.27 christos int
231 1.27 christos mb8795_mediachange(ifp)
232 1.27 christos struct ifnet *ifp;
233 1.27 christos {
234 1.27 christos struct mb8795_softc *sc = ifp->if_softc;
235 1.27 christos int data;
236 1.27 christos
237 1.27 christos switch IFM_SUBTYPE(sc->sc_media.ifm_media) {
238 1.27 christos case IFM_AUTO:
239 1.27 christos if (bus_space_read_1(sc->sc_bmap_bst, sc->sc_bmap_bsh, BMAP_DATA) &
240 1.27 christos BMAP_DATA_UTPCARRIER_MASK) {
241 1.27 christos data = 0;
242 1.27 christos sc->sc_media.ifm_cur->ifm_data = IFM_ETHER|IFM_10_2;
243 1.27 christos } else {
244 1.27 christos data = BMAP_DATA_UTPENABLE;
245 1.27 christos sc->sc_media.ifm_cur->ifm_data = IFM_ETHER|IFM_10_T;
246 1.27 christos }
247 1.27 christos break;
248 1.27 christos case IFM_10_T:
249 1.27 christos data = BMAP_DATA_UTPENABLE;
250 1.27 christos break;
251 1.27 christos case IFM_10_2:
252 1.27 christos data = 0;
253 1.27 christos break;
254 1.27 christos default:
255 1.27 christos return (1);
256 1.27 christos break;
257 1.27 christos }
258 1.27 christos
259 1.27 christos bus_space_write_1(sc->sc_bmap_bst, sc->sc_bmap_bsh,
260 1.27 christos BMAP_DDIR, BMAP_DDIR_UTPENABLE_MASK);
261 1.27 christos bus_space_write_1(sc->sc_bmap_bst, sc->sc_bmap_bsh,
262 1.27 christos BMAP_DATA, data);
263 1.27 christos
264 1.27 christos return (0);
265 1.27 christos }
266 1.27 christos
267 1.27 christos /*
268 1.27 christos * Media status callback.
269 1.27 christos */
270 1.27 christos void
271 1.27 christos mb8795_mediastatus(ifp, ifmr)
272 1.27 christos struct ifnet *ifp;
273 1.27 christos struct ifmediareq *ifmr;
274 1.27 christos {
275 1.27 christos struct mb8795_softc *sc = ifp->if_softc;
276 1.27 christos
277 1.27 christos if (IFM_SUBTYPE(ifmr->ifm_active) == IFM_AUTO) {
278 1.27 christos ifmr->ifm_active = sc->sc_media.ifm_cur->ifm_data;
279 1.27 christos }
280 1.27 christos if (IFM_SUBTYPE(ifmr->ifm_active) == IFM_10_T) {
281 1.27 christos ifmr->ifm_status = IFM_AVALID;
282 1.27 christos if (!(bus_space_read_1(sc->sc_bmap_bst, sc->sc_bmap_bsh, BMAP_DATA) &
283 1.27 christos BMAP_DATA_UTPCARRIER_MASK))
284 1.27 christos ifmr->ifm_status |= IFM_ACTIVE;
285 1.27 christos } else {
286 1.27 christos ifmr->ifm_status &= ~IFM_AVALID; /* don't know for 10_2 */
287 1.27 christos }
288 1.27 christos return;
289 1.27 christos }
290 1.1 dbj
291 1.1 dbj /****************************************************************/
292 1.21 dbj #ifdef XE_DEBUG
293 1.1 dbj #define XCHR(x) "0123456789abcdef"[(x) & 0xf]
294 1.1 dbj static void
295 1.21 dbj xe_hex_dump(unsigned char *pkt, size_t len)
296 1.1 dbj {
297 1.1 dbj size_t i, j;
298 1.1 dbj
299 1.21 dbj printf("00000000 ");
300 1.1 dbj for(i=0; i<len; i++) {
301 1.1 dbj printf("%c%c ", XCHR(pkt[i]>>4), XCHR(pkt[i]));
302 1.21 dbj if ((i+1) % 16 == 8) {
303 1.21 dbj printf(" ");
304 1.21 dbj }
305 1.1 dbj if ((i+1) % 16 == 0) {
306 1.21 dbj printf(" %c", '|');
307 1.21 dbj for(j=0; j<16; j++) {
308 1.1 dbj printf("%c", pkt[i-15+j]>=32 && pkt[i-15+j]<127?pkt[i-15+j]:'.');
309 1.21 dbj }
310 1.21 dbj printf("%c\n%c%c%c%c%c%c%c%c ", '|',
311 1.21 dbj XCHR((i+1)>>28),XCHR((i+1)>>24),XCHR((i+1)>>20),XCHR((i+1)>>16),
312 1.21 dbj XCHR((i+1)>>12), XCHR((i+1)>>8), XCHR((i+1)>>4), XCHR(i+1));
313 1.1 dbj }
314 1.1 dbj }
315 1.1 dbj printf("\n");
316 1.1 dbj }
317 1.21 dbj #undef XCHR
318 1.7 dbj #endif
319 1.1 dbj
320 1.1 dbj /*
321 1.1 dbj * Controller receive interrupt.
322 1.1 dbj */
323 1.1 dbj void
324 1.1 dbj mb8795_rint(sc)
325 1.1 dbj struct mb8795_softc *sc;
326 1.1 dbj {
327 1.1 dbj struct ifnet *ifp = &sc->sc_ethercom.ec_if;
328 1.1 dbj int error = 0;
329 1.1 dbj u_char rxstat;
330 1.1 dbj u_char rxmask;
331 1.1 dbj
332 1.1 dbj rxstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT);
333 1.1 dbj rxmask = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK);
334 1.1 dbj
335 1.1 dbj bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT, XE_RXSTAT_CLEAR);
336 1.1 dbj
337 1.1 dbj if (rxstat & XE_RXSTAT_RESET) {
338 1.1 dbj DPRINTF(("%s: rx reset packet\n",
339 1.1 dbj sc->sc_dev.dv_xname));
340 1.1 dbj error++;
341 1.1 dbj }
342 1.1 dbj if (rxstat & XE_RXSTAT_SHORT) {
343 1.1 dbj DPRINTF(("%s: rx short packet\n",
344 1.1 dbj sc->sc_dev.dv_xname));
345 1.1 dbj error++;
346 1.1 dbj }
347 1.1 dbj if (rxstat & XE_RXSTAT_ALIGNERR) {
348 1.1 dbj DPRINTF(("%s: rx alignment error\n",
349 1.1 dbj sc->sc_dev.dv_xname));
350 1.21 dbj #if 0
351 1.1 dbj error++;
352 1.21 dbj #endif
353 1.1 dbj }
354 1.1 dbj if (rxstat & XE_RXSTAT_CRCERR) {
355 1.1 dbj DPRINTF(("%s: rx CRC error\n",
356 1.1 dbj sc->sc_dev.dv_xname));
357 1.21 dbj #if 0
358 1.1 dbj error++;
359 1.21 dbj #endif
360 1.1 dbj }
361 1.1 dbj if (rxstat & XE_RXSTAT_OVERFLOW) {
362 1.1 dbj DPRINTF(("%s: rx overflow error\n",
363 1.1 dbj sc->sc_dev.dv_xname));
364 1.21 dbj #if 0
365 1.1 dbj error++;
366 1.21 dbj #endif
367 1.1 dbj }
368 1.1 dbj
369 1.1 dbj if (error) {
370 1.1 dbj ifp->if_ierrors++;
371 1.1 dbj /* @@@ handle more gracefully, free memory, etc. */
372 1.1 dbj }
373 1.1 dbj
374 1.1 dbj if (rxstat & XE_RXSTAT_OK) {
375 1.1 dbj int s;
376 1.1 dbj s = spldma();
377 1.1 dbj
378 1.1 dbj while(sc->sc_rx_handled_idx != sc->sc_rx_completed_idx) {
379 1.1 dbj struct mbuf *m;
380 1.1 dbj bus_dmamap_t map;
381 1.1 dbj
382 1.1 dbj sc->sc_rx_handled_idx++;
383 1.1 dbj sc->sc_rx_handled_idx %= MB8795_NRXBUFS;
384 1.1 dbj
385 1.1 dbj /* Should probably not do this much while interrupts
386 1.1 dbj * are disabled, but for now we will.
387 1.1 dbj */
388 1.1 dbj
389 1.1 dbj map = sc->sc_rx_dmamap[sc->sc_rx_handled_idx];
390 1.1 dbj m = sc->sc_rx_mb_head[sc->sc_rx_handled_idx];
391 1.1 dbj
392 1.22 dbj m->m_pkthdr.len = m->m_len = map->dm_xfer_len;
393 1.22 dbj m->m_flags |= M_HASFCS;
394 1.22 dbj m->m_pkthdr.rcvif = ifp;
395 1.22 dbj
396 1.1 dbj bus_dmamap_sync(sc->sc_rx_dmat, map,
397 1.1 dbj 0, map->dm_mapsize, BUS_DMASYNC_POSTREAD);
398 1.1 dbj
399 1.21 dbj bus_dmamap_unload(sc->sc_rx_dmat, map);
400 1.21 dbj
401 1.21 dbj /* Install a fresh mbuf for next packet */
402 1.21 dbj
403 1.21 dbj sc->sc_rx_mb_head[sc->sc_rx_handled_idx] =
404 1.21 dbj mb8795_rxdmamap_load(sc,map);
405 1.21 dbj
406 1.22 dbj /* Punt runt packets
407 1.22 dbj * dma restarts create 0 length packets for example
408 1.22 dbj */
409 1.22 dbj if (m->m_len < ETHER_MIN_LEN) {
410 1.21 dbj m_freem(m);
411 1.21 dbj continue;
412 1.21 dbj }
413 1.21 dbj
414 1.22 dbj /* Find receive length, keep crc */
415 1.22 dbj /* enable dma interrupts while we process the packet */
416 1.1 dbj splx(s);
417 1.1 dbj
418 1.1 dbj #if defined(XE_DEBUG)
419 1.1 dbj /* Peek at the packet */
420 1.23 chs DPRINTF(("%s: received packet, at VA %p-%p,len %d\n",
421 1.1 dbj sc->sc_dev.dv_xname,mtod(m,u_char *),mtod(m,u_char *)+m->m_len,m->m_len));
422 1.21 dbj if (xe_debug > 3) {
423 1.21 dbj xe_hex_dump(mtod(m,u_char *), m->m_pkthdr.len);
424 1.21 dbj } else if (xe_debug > 2) {
425 1.21 dbj xe_hex_dump(mtod(m,u_char *), m->m_pkthdr.len < 255 ? m->m_pkthdr.len : 128 );
426 1.21 dbj }
427 1.1 dbj #endif
428 1.22 dbj
429 1.22 dbj #if NBPFILTER > 0
430 1.22 dbj /*
431 1.22 dbj * Pass packet to bpf if there is a listener.
432 1.22 dbj */
433 1.22 dbj if (ifp->if_bpf)
434 1.22 dbj bpf_mtap(ifp->if_bpf, m);
435 1.22 dbj #endif
436 1.22 dbj
437 1.1 dbj {
438 1.1 dbj ifp->if_ipackets++;
439 1.1 dbj
440 1.11 thorpej /* Pass the packet up. */
441 1.11 thorpej (*ifp->if_input)(ifp, m);
442 1.1 dbj }
443 1.1 dbj
444 1.1 dbj s = spldma();
445 1.1 dbj
446 1.1 dbj }
447 1.1 dbj
448 1.1 dbj splx(s);
449 1.1 dbj
450 1.1 dbj }
451 1.1 dbj
452 1.18 tv #ifdef XE_DEBUG
453 1.18 tv if (xe_debug) {
454 1.18 tv char sbuf[256];
455 1.18 tv
456 1.18 tv bitmask_snprintf(rxstat, XE_RXSTAT_BITS, sbuf, sizeof(sbuf));
457 1.18 tv printf("%s: rx interrupt, rxstat = %s\n",
458 1.18 tv sc->sc_dev.dv_xname, sbuf);
459 1.18 tv
460 1.18 tv bitmask_snprintf(bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT),
461 1.18 tv XE_RXSTAT_BITS, sbuf, sizeof(sbuf));
462 1.18 tv printf("rxstat = 0x%s\n", sbuf);
463 1.18 tv
464 1.18 tv bitmask_snprintf(bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK),
465 1.18 tv XE_RXMASK_BITS, sbuf, sizeof(sbuf));
466 1.18 tv printf("rxmask = 0x%s\n", sbuf);
467 1.18 tv
468 1.18 tv bitmask_snprintf(bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMODE),
469 1.18 tv XE_RXMODE_BITS, sbuf, sizeof(sbuf));
470 1.18 tv printf("rxmode = 0x%s\n", sbuf);
471 1.18 tv }
472 1.18 tv #endif
473 1.17 dbj
474 1.1 dbj return;
475 1.1 dbj }
476 1.1 dbj
477 1.1 dbj /*
478 1.1 dbj * Controller transmit interrupt.
479 1.1 dbj */
480 1.1 dbj void
481 1.1 dbj mb8795_tint(sc)
482 1.1 dbj struct mb8795_softc *sc;
483 1.1 dbj
484 1.1 dbj {
485 1.1 dbj u_char txstat;
486 1.1 dbj u_char txmask;
487 1.1 dbj struct ifnet *ifp = &sc->sc_ethercom.ec_if;
488 1.1 dbj
489 1.1 dbj txstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT);
490 1.1 dbj txmask = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK);
491 1.1 dbj
492 1.1 dbj if (txstat & XE_TXSTAT_SHORTED) {
493 1.1 dbj printf("%s: tx cable shorted\n", sc->sc_dev.dv_xname);
494 1.1 dbj ifp->if_oerrors++;
495 1.1 dbj }
496 1.1 dbj if (txstat & XE_TXSTAT_UNDERFLOW) {
497 1.1 dbj printf("%s: tx underflow\n", sc->sc_dev.dv_xname);
498 1.1 dbj ifp->if_oerrors++;
499 1.1 dbj }
500 1.1 dbj if (txstat & XE_TXSTAT_COLLERR) {
501 1.1 dbj DPRINTF(("%s: tx collision\n", sc->sc_dev.dv_xname));
502 1.1 dbj ifp->if_collisions++;
503 1.1 dbj }
504 1.1 dbj if (txstat & XE_TXSTAT_COLLERR16) {
505 1.1 dbj printf("%s: tx 16th collision\n", sc->sc_dev.dv_xname);
506 1.1 dbj ifp->if_oerrors++;
507 1.1 dbj ifp->if_collisions += 16;
508 1.1 dbj }
509 1.1 dbj
510 1.1 dbj #if 0
511 1.1 dbj if (txstat & XE_TXSTAT_READY) {
512 1.18 tv char sbuf[256];
513 1.1 dbj
514 1.18 tv bitmask_snprintf(txstat, XE_TXSTAT_BITS, sbuf, sizeof(sbuf));
515 1.18 tv panic("%s: unexpected tx interrupt %s",
516 1.18 tv sc->sc_dev.dv_xname, sbuf);
517 1.1 dbj
518 1.1 dbj /* turn interrupt off */
519 1.1 dbj bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK,
520 1.1 dbj txmask & ~XE_TXMASK_READYIE);
521 1.1 dbj }
522 1.1 dbj #endif
523 1.1 dbj
524 1.1 dbj return;
525 1.1 dbj }
526 1.1 dbj
527 1.1 dbj /****************************************************************/
528 1.1 dbj
529 1.1 dbj void
530 1.1 dbj mb8795_reset(sc)
531 1.1 dbj struct mb8795_softc *sc;
532 1.1 dbj {
533 1.1 dbj int s;
534 1.27 christos int i;
535 1.1 dbj
536 1.20 thorpej s = splnet();
537 1.27 christos
538 1.27 christos DPRINTF (("%s: mb8795_reset()\n",sc->sc_dev.dv_xname));
539 1.27 christos
540 1.27 christos sc->sc_ethercom.ec_if.if_flags &= ~(IFF_RUNNING|IFF_OACTIVE);
541 1.27 christos sc->sc_ethercom.ec_if.if_timer = 0;
542 1.27 christos
543 1.27 christos nextdma_reset(sc->sc_tx_nd);
544 1.27 christos nextdma_reset(sc->sc_rx_nd);
545 1.27 christos
546 1.27 christos if (sc->sc_tx_loaded) {
547 1.27 christos bus_dmamap_sync(sc->sc_tx_dmat, sc->sc_tx_dmamap,
548 1.27 christos 0, sc->sc_tx_dmamap->dm_mapsize,
549 1.27 christos BUS_DMASYNC_POSTWRITE);
550 1.27 christos bus_dmamap_unload(sc->sc_tx_dmat, sc->sc_tx_dmamap);
551 1.27 christos }
552 1.27 christos sc->sc_tx_loaded = 0;
553 1.27 christos if (sc->sc_tx_mb_head) {
554 1.27 christos m_freem(sc->sc_tx_mb_head);
555 1.27 christos sc->sc_tx_mb_head = NULL;
556 1.27 christos }
557 1.27 christos
558 1.27 christos for(i=0;i<MB8795_NRXBUFS;i++) {
559 1.27 christos if (sc->sc_rx_mb_head[i]) {
560 1.27 christos bus_dmamap_unload(sc->sc_rx_dmat, sc->sc_rx_dmamap[i]);
561 1.27 christos m_freem(sc->sc_rx_mb_head[i]);
562 1.27 christos sc->sc_rx_mb_head[i] = NULL;
563 1.27 christos }
564 1.27 christos }
565 1.27 christos
566 1.27 christos bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RESET, XE_RESET_MODE);
567 1.27 christos
568 1.27 christos mb8795_mediachange(&sc->sc_ethercom.ec_if);
569 1.27 christos
570 1.27 christos #if 0 /* This interrupt was sometimes failing to ack correctly
571 1.27 christos * causing a loop @@@
572 1.27 christos */
573 1.27 christos bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK,
574 1.27 christos XE_TXMASK_UNDERFLOWIE | XE_TXMASK_COLLIE | XE_TXMASK_COLL16IE
575 1.27 christos | XE_TXMASK_PARERRIE);
576 1.27 christos #else
577 1.27 christos bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 0);
578 1.27 christos #endif
579 1.27 christos bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT, XE_TXSTAT_CLEAR);
580 1.27 christos
581 1.27 christos #if 0
582 1.27 christos bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK,
583 1.27 christos XE_RXMASK_OKIE | XE_RXMASK_RESETIE | XE_RXMASK_SHORTIE |
584 1.27 christos XE_RXMASK_ALIGNERRIE | XE_RXMASK_CRCERRIE | XE_RXMASK_OVERFLOWIE);
585 1.27 christos #else
586 1.27 christos bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK,
587 1.27 christos XE_RXMASK_OKIE | XE_RXMASK_RESETIE | XE_RXMASK_SHORTIE);
588 1.27 christos #endif
589 1.27 christos
590 1.27 christos bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT, XE_RXSTAT_CLEAR);
591 1.27 christos
592 1.27 christos for(i=0;i<sizeof(sc->sc_enaddr);i++) {
593 1.27 christos bus_space_write_1(sc->sc_bst,sc->sc_bsh,XE_ENADDR+i,sc->sc_enaddr[i]);
594 1.27 christos }
595 1.27 christos
596 1.27 christos DPRINTF(("%s: initializing ethernet %02x:%02x:%02x:%02x:%02x:%02x, size=%d\n",
597 1.27 christos sc->sc_dev.dv_xname,
598 1.27 christos sc->sc_enaddr[0],sc->sc_enaddr[1],sc->sc_enaddr[2],
599 1.27 christos sc->sc_enaddr[3],sc->sc_enaddr[4],sc->sc_enaddr[5],
600 1.27 christos sizeof(sc->sc_enaddr)));
601 1.27 christos
602 1.27 christos bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RESET, 0);
603 1.27 christos
604 1.1 dbj splx(s);
605 1.1 dbj }
606 1.1 dbj
607 1.1 dbj void
608 1.1 dbj mb8795_watchdog(ifp)
609 1.1 dbj struct ifnet *ifp;
610 1.1 dbj {
611 1.1 dbj struct mb8795_softc *sc = ifp->if_softc;
612 1.1 dbj
613 1.1 dbj log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
614 1.1 dbj ++ifp->if_oerrors;
615 1.1 dbj
616 1.23 chs DPRINTF(("%s: %lld input errors, %lld input packets\n",
617 1.1 dbj sc->sc_dev.dv_xname, ifp->if_ierrors, ifp->if_ipackets));
618 1.1 dbj
619 1.27 christos ifp->if_flags &= ~IFF_RUNNING;
620 1.27 christos mb8795_init(sc);
621 1.1 dbj }
622 1.1 dbj
623 1.1 dbj /*
624 1.1 dbj * Initialization of interface; set up initialization block
625 1.1 dbj * and transmit/receive descriptor rings.
626 1.1 dbj */
627 1.1 dbj void
628 1.1 dbj mb8795_init(sc)
629 1.1 dbj struct mb8795_softc *sc;
630 1.1 dbj {
631 1.27 christos struct ifnet *ifp = &sc->sc_ethercom.ec_if;
632 1.27 christos int s;
633 1.27 christos int i;
634 1.1 dbj
635 1.27 christos DPRINTF (("%s: mb8795_init()\n",sc->sc_dev.dv_xname));
636 1.27 christos if (ifp->if_flags & IFF_UP) {
637 1.27 christos int rxmode;
638 1.1 dbj
639 1.27 christos s = splnet ();
640 1.27 christos if ((ifp->if_flags & IFF_RUNNING) == 0) {
641 1.27 christos mb8795_reset(sc);
642 1.27 christos }
643 1.27 christos if (ifp->if_flags & IFF_PROMISC) {
644 1.27 christos rxmode = XE_RXMODE_PROMISCUOUS;
645 1.27 christos } else {
646 1.27 christos /* XXX add support for multicast */
647 1.27 christos rxmode = XE_RXMODE_NORMAL;
648 1.27 christos }
649 1.27 christos
650 1.27 christos bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMODE, XE_TXMODE_LB_DISABLE);
651 1.27 christos bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXMODE, rxmode);
652 1.27 christos
653 1.27 christos if ((ifp->if_flags & IFF_RUNNING) == 0) {
654 1.27 christos for(i=0;i<MB8795_NRXBUFS;i++) {
655 1.27 christos sc->sc_rx_mb_head[i] =
656 1.27 christos mb8795_rxdmamap_load(sc, sc->sc_rx_dmamap[i]);
657 1.1 dbj }
658 1.27 christos sc->sc_rx_loaded_idx = 0;
659 1.27 christos sc->sc_rx_completed_idx = 0;
660 1.27 christos sc->sc_rx_handled_idx = 0;
661 1.27 christos
662 1.27 christos ifp->if_flags |= IFF_RUNNING;
663 1.27 christos ifp->if_flags &= ~IFF_OACTIVE;
664 1.27 christos ifp->if_timer = 0;
665 1.27 christos
666 1.27 christos nextdma_init(sc->sc_tx_nd);
667 1.27 christos nextdma_init(sc->sc_rx_nd);
668 1.27 christos
669 1.27 christos nextdma_start(sc->sc_rx_nd, DMACSR_SETREAD);
670 1.1 dbj }
671 1.27 christos splx(s);
672 1.21 dbj #if 0
673 1.27 christos s = spldma();
674 1.27 christos if (! IF_IS_EMPTY(&sc->sc_tx_snd)) {
675 1.27 christos mb8795_start_dma(ifp);
676 1.27 christos }
677 1.27 christos splx(s);
678 1.21 dbj #endif
679 1.27 christos } else {
680 1.27 christos /* ifp->if_flags &= ~IFF_RUNNING; */
681 1.27 christos /* ifp->if_flags &= ~IFF_OACTIVE; */
682 1.27 christos /* ifp->if_timer = 0; */
683 1.27 christos mb8795_reset(sc);
684 1.1 dbj }
685 1.1 dbj }
686 1.1 dbj
687 1.1 dbj void
688 1.1 dbj mb8795_shutdown(arg)
689 1.1 dbj void *arg;
690 1.1 dbj {
691 1.27 christos struct mb8795_softc *sc = (struct mb8795_softc *)arg;
692 1.27 christos /* struct ifnet *ifp = &sc->sc_ethercom.ec_if; */
693 1.27 christos /* ifp->if_flags &= ~IFF_RUNNING; */
694 1.27 christos mb8795_reset(sc);
695 1.1 dbj }
696 1.1 dbj
697 1.1 dbj /****************************************************************/
698 1.1 dbj int
699 1.1 dbj mb8795_ioctl(ifp, cmd, data)
700 1.1 dbj register struct ifnet *ifp;
701 1.1 dbj u_long cmd;
702 1.1 dbj caddr_t data;
703 1.1 dbj {
704 1.1 dbj register struct mb8795_softc *sc = ifp->if_softc;
705 1.1 dbj struct ifaddr *ifa = (struct ifaddr *)data;
706 1.1 dbj struct ifreq *ifr = (struct ifreq *)data;
707 1.1 dbj int s, error = 0;
708 1.1 dbj
709 1.20 thorpej s = splnet();
710 1.1 dbj
711 1.1 dbj switch (cmd) {
712 1.1 dbj
713 1.1 dbj case SIOCSIFADDR:
714 1.1 dbj ifp->if_flags |= IFF_UP;
715 1.1 dbj
716 1.1 dbj switch (ifa->ifa_addr->sa_family) {
717 1.1 dbj #ifdef INET
718 1.1 dbj case AF_INET:
719 1.1 dbj mb8795_init(sc);
720 1.1 dbj arp_ifinit(ifp, ifa);
721 1.1 dbj break;
722 1.1 dbj #endif
723 1.1 dbj #ifdef NS
724 1.1 dbj case AF_NS:
725 1.1 dbj {
726 1.1 dbj register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
727 1.1 dbj
728 1.1 dbj if (ns_nullhost(*ina))
729 1.1 dbj ina->x_host =
730 1.1 dbj *(union ns_host *)LLADDR(ifp->if_sadl);
731 1.1 dbj else {
732 1.1 dbj bcopy(ina->x_host.c_host,
733 1.1 dbj LLADDR(ifp->if_sadl),
734 1.1 dbj sizeof(sc->sc_enaddr));
735 1.1 dbj }
736 1.1 dbj /* Set new address. */
737 1.1 dbj mb8795_init(sc);
738 1.1 dbj break;
739 1.1 dbj }
740 1.1 dbj #endif
741 1.1 dbj default:
742 1.1 dbj mb8795_init(sc);
743 1.1 dbj break;
744 1.1 dbj }
745 1.1 dbj break;
746 1.1 dbj
747 1.1 dbj #if defined(CCITT) && defined(LLC)
748 1.1 dbj case SIOCSIFCONF_X25:
749 1.1 dbj ifp->if_flags |= IFF_UP;
750 1.1 dbj ifa->ifa_rtrequest = cons_rtrequest; /* XXX */
751 1.1 dbj error = x25_llcglue(PRC_IFUP, ifa->ifa_addr);
752 1.1 dbj if (error == 0)
753 1.1 dbj mb8795_init(sc);
754 1.1 dbj break;
755 1.1 dbj #endif /* CCITT && LLC */
756 1.1 dbj
757 1.1 dbj case SIOCSIFFLAGS:
758 1.1 dbj if ((ifp->if_flags & IFF_UP) == 0 &&
759 1.1 dbj (ifp->if_flags & IFF_RUNNING) != 0) {
760 1.1 dbj /*
761 1.1 dbj * If interface is marked down and it is running, then
762 1.1 dbj * stop it.
763 1.1 dbj */
764 1.27 christos /* ifp->if_flags &= ~IFF_RUNNING; */
765 1.27 christos mb8795_reset(sc);
766 1.1 dbj } else if ((ifp->if_flags & IFF_UP) != 0 &&
767 1.1 dbj (ifp->if_flags & IFF_RUNNING) == 0) {
768 1.1 dbj /*
769 1.1 dbj * If interface is marked up and it is stopped, then
770 1.1 dbj * start it.
771 1.1 dbj */
772 1.1 dbj mb8795_init(sc);
773 1.1 dbj } else {
774 1.1 dbj /*
775 1.1 dbj * Reset the interface to pick up changes in any other
776 1.1 dbj * flags that affect hardware registers.
777 1.1 dbj */
778 1.1 dbj mb8795_init(sc);
779 1.1 dbj }
780 1.1 dbj #ifdef XE_DEBUG
781 1.1 dbj if (ifp->if_flags & IFF_DEBUG)
782 1.1 dbj sc->sc_debug = 1;
783 1.1 dbj else
784 1.1 dbj sc->sc_debug = 0;
785 1.1 dbj #endif
786 1.1 dbj break;
787 1.1 dbj
788 1.1 dbj case SIOCADDMULTI:
789 1.1 dbj case SIOCDELMULTI:
790 1.1 dbj error = (cmd == SIOCADDMULTI) ?
791 1.1 dbj ether_addmulti(ifr, &sc->sc_ethercom) :
792 1.1 dbj ether_delmulti(ifr, &sc->sc_ethercom);
793 1.1 dbj
794 1.1 dbj if (error == ENETRESET) {
795 1.1 dbj /*
796 1.1 dbj * Multicast list has changed; set the hardware filter
797 1.1 dbj * accordingly.
798 1.1 dbj */
799 1.27 christos mb8795_init(sc);
800 1.1 dbj error = 0;
801 1.1 dbj }
802 1.1 dbj break;
803 1.1 dbj
804 1.1 dbj case SIOCGIFMEDIA:
805 1.1 dbj case SIOCSIFMEDIA:
806 1.1 dbj error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd);
807 1.1 dbj break;
808 1.1 dbj
809 1.1 dbj default:
810 1.1 dbj error = EINVAL;
811 1.1 dbj break;
812 1.1 dbj }
813 1.1 dbj
814 1.1 dbj splx(s);
815 1.1 dbj
816 1.1 dbj #if 0
817 1.1 dbj DPRINTF(("DEBUG: mb8795_ioctl(0x%lx) returning %d\n",
818 1.1 dbj cmd,error));
819 1.1 dbj #endif
820 1.1 dbj
821 1.1 dbj return (error);
822 1.1 dbj }
823 1.1 dbj
824 1.1 dbj /*
825 1.1 dbj * Setup output on interface.
826 1.1 dbj * Get another datagram to send off of the interface queue, and map it to the
827 1.1 dbj * interface before starting the output.
828 1.20 thorpej * Called only at splnet or interrupt level.
829 1.1 dbj */
830 1.1 dbj void
831 1.1 dbj mb8795_start(ifp)
832 1.25 jdolecek struct ifnet *ifp;
833 1.1 dbj {
834 1.26 jdolecek struct mb8795_softc *sc = ifp->if_softc;
835 1.26 jdolecek struct mbuf *m;
836 1.26 jdolecek int s;
837 1.26 jdolecek
838 1.26 jdolecek DPRINTF(("%s: mb8795_start()\n",sc->sc_dev.dv_xname));
839 1.26 jdolecek
840 1.26 jdolecek #ifdef DIAGNOSTIC
841 1.26 jdolecek IFQ_POLL(&ifp->if_snd, m);
842 1.26 jdolecek if (m == 0) {
843 1.26 jdolecek panic("%s: No packet to start\n",
844 1.26 jdolecek sc->sc_dev.dv_xname);
845 1.26 jdolecek }
846 1.26 jdolecek #endif
847 1.26 jdolecek
848 1.26 jdolecek while (1) {
849 1.26 jdolecek if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
850 1.26 jdolecek return;
851 1.26 jdolecek
852 1.26 jdolecek #if 0
853 1.26 jdolecek return; /* @@@ Turn off xmit for debugging */
854 1.26 jdolecek #endif
855 1.26 jdolecek
856 1.26 jdolecek ifp->if_flags |= IFF_OACTIVE;
857 1.26 jdolecek
858 1.26 jdolecek IFQ_DEQUEUE(&ifp->if_snd, m);
859 1.26 jdolecek if (m == 0) {
860 1.26 jdolecek ifp->if_flags &= ~IFF_OACTIVE;
861 1.26 jdolecek return;
862 1.26 jdolecek }
863 1.26 jdolecek
864 1.26 jdolecek #if NBPFILTER > 0
865 1.26 jdolecek /*
866 1.26 jdolecek * Pass packet to bpf if there is a listener.
867 1.26 jdolecek */
868 1.26 jdolecek if (ifp->if_bpf)
869 1.26 jdolecek bpf_mtap(ifp->if_bpf, m);
870 1.26 jdolecek #endif
871 1.26 jdolecek
872 1.26 jdolecek s = spldma();
873 1.26 jdolecek IF_ENQUEUE(&sc->sc_tx_snd, m);
874 1.26 jdolecek if (sc->sc_tx_loaded == 0)
875 1.26 jdolecek mb8795_start_dma(ifp);
876 1.26 jdolecek splx(s);
877 1.26 jdolecek
878 1.26 jdolecek ifp->if_flags &= ~IFF_OACTIVE;
879 1.26 jdolecek }
880 1.26 jdolecek
881 1.26 jdolecek }
882 1.26 jdolecek
883 1.26 jdolecek void
884 1.26 jdolecek mb8795_start_dma(ifp)
885 1.26 jdolecek struct ifnet *ifp;
886 1.26 jdolecek {
887 1.25 jdolecek int error;
888 1.25 jdolecek struct mb8795_softc *sc = ifp->if_softc;
889 1.1 dbj
890 1.26 jdolecek DPRINTF(("%s: mb8795_start_dma()\n",sc->sc_dev.dv_xname));
891 1.1 dbj
892 1.1 dbj #if (defined(DIAGNOSTIC))
893 1.25 jdolecek {
894 1.25 jdolecek u_char txstat;
895 1.25 jdolecek txstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT);
896 1.25 jdolecek if (!(txstat & XE_TXSTAT_READY)) {
897 1.6 dbj /* @@@ I used to panic here, but then it paniced once.
898 1.6 dbj * Let's see if I can just reset instead. [ dbj 980706.1900 ]
899 1.6 dbj */
900 1.25 jdolecek printf("%s: transmitter not ready\n",
901 1.25 jdolecek sc->sc_dev.dv_xname);
902 1.27 christos ifp->if_flags &= ~IFF_RUNNING;
903 1.27 christos mb8795_init(sc);
904 1.6 dbj return;
905 1.25 jdolecek }
906 1.25 jdolecek }
907 1.1 dbj #endif
908 1.1 dbj
909 1.1 dbj #if 0
910 1.1 dbj return; /* @@@ Turn off xmit for debugging */
911 1.1 dbj #endif
912 1.1 dbj
913 1.26 jdolecek IF_DEQUEUE(&sc->sc_tx_snd, sc->sc_tx_mb_head);
914 1.25 jdolecek if (sc->sc_tx_mb_head == 0) {
915 1.26 jdolecek #ifdef DIAGNOSTIC
916 1.26 jdolecek panic("%s: No packet to start_dma\n",
917 1.26 jdolecek sc->sc_dev.dv_xname);
918 1.26 jdolecek #endif
919 1.25 jdolecek return;
920 1.25 jdolecek }
921 1.1 dbj
922 1.26 jdolecek bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT, XE_TXSTAT_CLEAR);
923 1.26 jdolecek
924 1.1 dbj ifp->if_timer = 5;
925 1.1 dbj
926 1.1 dbj /* The following is a next specific hack that should
927 1.1 dbj * probably be moved out of MI code.
928 1.1 dbj * This macro assumes it can move forward as needed
929 1.1 dbj * in the buffer. Perhaps it should zero the extra buffer.
930 1.1 dbj */
931 1.1 dbj #define REALIGN_DMABUF(s,l) \
932 1.1 dbj { (s) = ((u_char *)(((unsigned)(s)+DMA_BEGINALIGNMENT-1) \
933 1.1 dbj &~(DMA_BEGINALIGNMENT-1))); \
934 1.9 dbj (l) = ((u_char *)(((unsigned)((s)+(l))+DMA_ENDALIGNMENT-1) \
935 1.9 dbj &~(DMA_ENDALIGNMENT-1)))-(s);}
936 1.1 dbj
937 1.1 dbj #if 0
938 1.25 jdolecek error = bus_dmamap_load_mbuf(sc->sc_tx_dmat,
939 1.25 jdolecek sc->sc_tx_dmamap, sc->sc_tx_mb_head, BUS_DMA_NOWAIT);
940 1.1 dbj #else
941 1.1 dbj {
942 1.1 dbj u_char *buf = sc->sc_txbuf;
943 1.1 dbj int buflen = 0;
944 1.1 dbj struct mbuf *m = sc->sc_tx_mb_head;
945 1.1 dbj buflen = m->m_pkthdr.len;
946 1.1 dbj
947 1.1 dbj /* Fix runt packets, @@@ memory overrun */
948 1.1 dbj if (buflen < ETHERMIN+sizeof(struct ether_header)) {
949 1.1 dbj buflen = ETHERMIN+sizeof(struct ether_header);
950 1.1 dbj }
951 1.1 dbj
952 1.1 dbj {
953 1.1 dbj u_char *p = buf;
954 1.1 dbj for (m=sc->sc_tx_mb_head; m; m = m->m_next) {
955 1.1 dbj if (m->m_len == 0) continue;
956 1.1 dbj bcopy(mtod(m, u_char *), p, m->m_len);
957 1.1 dbj p += m->m_len;
958 1.1 dbj }
959 1.1 dbj }
960 1.1 dbj
961 1.1 dbj error = bus_dmamap_load(sc->sc_tx_dmat, sc->sc_tx_dmamap,
962 1.25 jdolecek buf,buflen,NULL,BUS_DMA_NOWAIT);
963 1.1 dbj }
964 1.1 dbj #endif
965 1.25 jdolecek if (error) {
966 1.25 jdolecek printf("%s: can't load mbuf chain, error = %d\n",
967 1.25 jdolecek sc->sc_dev.dv_xname, error);
968 1.25 jdolecek m_freem(sc->sc_tx_mb_head);
969 1.25 jdolecek sc->sc_tx_mb_head = NULL;
970 1.25 jdolecek return;
971 1.25 jdolecek }
972 1.1 dbj
973 1.1 dbj #ifdef DIAGNOSTIC
974 1.8 dbj if (sc->sc_tx_loaded != 0) {
975 1.25 jdolecek panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname,
976 1.25 jdolecek sc->sc_tx_loaded);
977 1.1 dbj }
978 1.1 dbj #endif
979 1.1 dbj
980 1.25 jdolecek bus_dmamap_sync(sc->sc_tx_dmat, sc->sc_tx_dmamap, 0,
981 1.1 dbj sc->sc_tx_dmamap->dm_mapsize, BUS_DMASYNC_PREWRITE);
982 1.1 dbj
983 1.16 dbj nextdma_start(sc->sc_tx_nd, DMACSR_SETWRITE);
984 1.25 jdolecek
985 1.26 jdolecek ifp->if_opackets++;
986 1.1 dbj }
987 1.1 dbj
988 1.1 dbj /****************************************************************/
989 1.1 dbj
990 1.1 dbj void
991 1.1 dbj mb8795_txdma_completed(map, arg)
992 1.1 dbj bus_dmamap_t map;
993 1.1 dbj void *arg;
994 1.1 dbj {
995 1.1 dbj struct mb8795_softc *sc = arg;
996 1.1 dbj
997 1.1 dbj DPRINTF(("%s: mb8795_txdma_completed()\n",sc->sc_dev.dv_xname));
998 1.1 dbj
999 1.1 dbj #ifdef DIAGNOSTIC
1000 1.1 dbj if (!sc->sc_tx_loaded) {
1001 1.1 dbj panic("%s: tx completed never loaded ",sc->sc_dev.dv_xname);
1002 1.1 dbj }
1003 1.1 dbj if (map != sc->sc_tx_dmamap) {
1004 1.1 dbj panic("%s: unexpected tx completed map",sc->sc_dev.dv_xname);
1005 1.1 dbj }
1006 1.1 dbj
1007 1.1 dbj #endif
1008 1.1 dbj }
1009 1.1 dbj
1010 1.1 dbj void
1011 1.1 dbj mb8795_txdma_shutdown(arg)
1012 1.1 dbj void *arg;
1013 1.1 dbj {
1014 1.1 dbj struct mb8795_softc *sc = arg;
1015 1.1 dbj struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1016 1.1 dbj
1017 1.25 jdolecek DPRINTF(("%s: mb8795_txdma_shutdown()\n",sc->sc_dev.dv_xname));
1018 1.1 dbj
1019 1.1 dbj #ifdef DIAGNOSTIC
1020 1.1 dbj if (!sc->sc_tx_loaded) {
1021 1.1 dbj panic("%s: tx shutdown never loaded ",sc->sc_dev.dv_xname);
1022 1.1 dbj }
1023 1.1 dbj #endif
1024 1.1 dbj
1025 1.1 dbj {
1026 1.1 dbj
1027 1.1 dbj if (sc->sc_tx_loaded) {
1028 1.1 dbj bus_dmamap_sync(sc->sc_tx_dmat, sc->sc_tx_dmamap,
1029 1.1 dbj 0, sc->sc_tx_dmamap->dm_mapsize,
1030 1.1 dbj BUS_DMASYNC_POSTWRITE);
1031 1.1 dbj bus_dmamap_unload(sc->sc_tx_dmat, sc->sc_tx_dmamap);
1032 1.1 dbj m_freem(sc->sc_tx_mb_head);
1033 1.1 dbj sc->sc_tx_mb_head = NULL;
1034 1.1 dbj
1035 1.1 dbj sc->sc_tx_loaded--;
1036 1.1 dbj }
1037 1.1 dbj
1038 1.1 dbj #ifdef DIAGNOSTIC
1039 1.1 dbj if (sc->sc_tx_loaded != 0) {
1040 1.1 dbj panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname,
1041 1.1 dbj sc->sc_tx_loaded);
1042 1.1 dbj }
1043 1.1 dbj #endif
1044 1.1 dbj
1045 1.1 dbj ifp->if_timer = 0;
1046 1.1 dbj
1047 1.27 christos if ((ifp->if_flags & IFF_RUNNING) && !IF_IS_EMPTY(&sc->sc_tx_snd)) {
1048 1.26 jdolecek mb8795_start_dma(ifp);
1049 1.1 dbj }
1050 1.1 dbj
1051 1.1 dbj }
1052 1.1 dbj
1053 1.1 dbj #if 0
1054 1.1 dbj /* Enable ready interrupt */
1055 1.1 dbj bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK,
1056 1.1 dbj bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK)
1057 1.1 dbj | XE_TXMASK_READYIE);
1058 1.1 dbj #endif
1059 1.1 dbj }
1060 1.1 dbj
1061 1.1 dbj
1062 1.1 dbj void
1063 1.1 dbj mb8795_rxdma_completed(map, arg)
1064 1.1 dbj bus_dmamap_t map;
1065 1.1 dbj void *arg;
1066 1.1 dbj {
1067 1.1 dbj struct mb8795_softc *sc = arg;
1068 1.27 christos struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1069 1.1 dbj
1070 1.27 christos if (ifp->if_flags & IFF_RUNNING) {
1071 1.27 christos sc->sc_rx_completed_idx++;
1072 1.27 christos sc->sc_rx_completed_idx %= MB8795_NRXBUFS;
1073 1.27 christos
1074 1.27 christos DPRINTF(("%s: mb8795_rxdma_completed(), sc->sc_rx_completed_idx = %d\n",
1075 1.27 christos sc->sc_dev.dv_xname, sc->sc_rx_completed_idx));
1076 1.27 christos
1077 1.1 dbj #if (defined(DIAGNOSTIC))
1078 1.27 christos if (map != sc->sc_rx_dmamap[sc->sc_rx_completed_idx]) {
1079 1.27 christos panic("%s: Unexpected rx dmamap completed\n",
1080 1.27 christos sc->sc_dev.dv_xname);
1081 1.27 christos }
1082 1.27 christos #endif
1083 1.1 dbj }
1084 1.27 christos #ifdef DIAGNOSTIC
1085 1.27 christos else
1086 1.27 christos DPRINTF(("%s: Unexpected rx dmamap completed while if not running\n",
1087 1.27 christos sc->sc_dev.dv_xname));
1088 1.1 dbj #endif
1089 1.1 dbj }
1090 1.1 dbj
1091 1.1 dbj void
1092 1.1 dbj mb8795_rxdma_shutdown(arg)
1093 1.1 dbj void *arg;
1094 1.1 dbj {
1095 1.1 dbj struct mb8795_softc *sc = arg;
1096 1.27 christos struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1097 1.1 dbj
1098 1.27 christos if (ifp->if_flags & IFF_RUNNING) {
1099 1.27 christos DPRINTF(("%s: mb8795_rxdma_shutdown(), restarting.\n",
1100 1.27 christos sc->sc_dev.dv_xname));
1101 1.27 christos
1102 1.27 christos nextdma_start(sc->sc_rx_nd, DMACSR_SETREAD);
1103 1.27 christos }
1104 1.27 christos #ifdef DIAGNOSTIC
1105 1.27 christos else
1106 1.27 christos DPRINTF(("%s: Unexpected rx dma shutdown while if not running\n",
1107 1.27 christos sc->sc_dev.dv_xname));
1108 1.27 christos #endif
1109 1.1 dbj }
1110 1.1 dbj
1111 1.1 dbj /*
1112 1.1 dbj * load a dmamap with a freshly allocated mbuf
1113 1.1 dbj */
1114 1.1 dbj struct mbuf *
1115 1.1 dbj mb8795_rxdmamap_load(sc,map)
1116 1.1 dbj struct mb8795_softc *sc;
1117 1.1 dbj bus_dmamap_t map;
1118 1.1 dbj {
1119 1.1 dbj struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1120 1.1 dbj struct mbuf *m;
1121 1.1 dbj int error;
1122 1.1 dbj
1123 1.1 dbj MGETHDR(m, M_DONTWAIT, MT_DATA);
1124 1.1 dbj if (m) {
1125 1.1 dbj MCLGET(m, M_DONTWAIT);
1126 1.1 dbj if ((m->m_flags & M_EXT) == 0) {
1127 1.1 dbj m_freem(m);
1128 1.1 dbj m = NULL;
1129 1.1 dbj } else {
1130 1.1 dbj m->m_len = MCLBYTES;
1131 1.1 dbj }
1132 1.1 dbj }
1133 1.1 dbj if (!m) {
1134 1.1 dbj /* @@@ Handle this gracefully by reusing a scratch buffer
1135 1.1 dbj * or something.
1136 1.1 dbj */
1137 1.1 dbj panic("Unable to get memory for incoming ethernet\n");
1138 1.1 dbj }
1139 1.1 dbj
1140 1.1 dbj /* Align buffer, @@@ next specific.
1141 1.1 dbj * perhaps should be using M_ALIGN here instead?
1142 1.1 dbj * First we give us a little room to align with.
1143 1.1 dbj */
1144 1.1 dbj {
1145 1.1 dbj u_char *buf = m->m_data;
1146 1.1 dbj int buflen = m->m_len;
1147 1.9 dbj buflen -= DMA_ENDALIGNMENT+DMA_BEGINALIGNMENT;
1148 1.1 dbj REALIGN_DMABUF(buf, buflen);
1149 1.1 dbj m->m_data = buf;
1150 1.1 dbj m->m_len = buflen;
1151 1.1 dbj }
1152 1.1 dbj
1153 1.1 dbj m->m_pkthdr.rcvif = ifp;
1154 1.1 dbj m->m_pkthdr.len = m->m_len;
1155 1.1 dbj
1156 1.25 jdolecek error = bus_dmamap_load_mbuf(sc->sc_rx_dmat,
1157 1.1 dbj map, m, BUS_DMA_NOWAIT);
1158 1.1 dbj
1159 1.25 jdolecek bus_dmamap_sync(sc->sc_rx_dmat, map, 0,
1160 1.1 dbj map->dm_mapsize, BUS_DMASYNC_PREREAD);
1161 1.1 dbj
1162 1.25 jdolecek if (error) {
1163 1.23 chs DPRINTF(("DEBUG: m->m_data = %p, m->m_len = %d\n",
1164 1.1 dbj m->m_data, m->m_len));
1165 1.23 chs DPRINTF(("DEBUG: MCLBYTES = %d, map->_dm_size = %ld\n",
1166 1.1 dbj MCLBYTES, map->_dm_size));
1167 1.1 dbj
1168 1.25 jdolecek panic("%s: can't load rx mbuf chain, error = %d\n",
1169 1.1 dbj sc->sc_dev.dv_xname, error);
1170 1.25 jdolecek m_freem(m);
1171 1.1 dbj m = NULL;
1172 1.25 jdolecek }
1173 1.1 dbj
1174 1.1 dbj return(m);
1175 1.1 dbj }
1176 1.1 dbj
1177 1.1 dbj bus_dmamap_t
1178 1.1 dbj mb8795_rxdma_continue(arg)
1179 1.1 dbj void *arg;
1180 1.1 dbj {
1181 1.1 dbj struct mb8795_softc *sc = arg;
1182 1.1 dbj bus_dmamap_t map = NULL;
1183 1.27 christos struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1184 1.1 dbj
1185 1.27 christos if (ifp->if_flags & IFF_RUNNING) {
1186 1.27 christos /*
1187 1.27 christos * Currently, starts dumping new packets if the buffers
1188 1.27 christos * fill up. This should probably reclaim unhandled
1189 1.27 christos * buffers instead so we drop older packets instead
1190 1.27 christos * of newer ones.
1191 1.27 christos */
1192 1.27 christos if (((sc->sc_rx_loaded_idx+1)%MB8795_NRXBUFS) != sc->sc_rx_handled_idx){
1193 1.27 christos sc->sc_rx_loaded_idx++;
1194 1.27 christos sc->sc_rx_loaded_idx %= MB8795_NRXBUFS;
1195 1.27 christos map = sc->sc_rx_dmamap[sc->sc_rx_loaded_idx];
1196 1.1 dbj
1197 1.27 christos DPRINTF(("%s: mb8795_rxdma_continue() sc->sc_rx_loaded_idx = %d\nn",
1198 1.27 christos sc->sc_dev.dv_xname,sc->sc_rx_loaded_idx));
1199 1.27 christos }
1200 1.1 dbj #if (defined(DIAGNOSTIC))
1201 1.27 christos else {
1202 1.27 christos DPRINTF(("%s: out of receive DMA buffers\n",sc->sc_dev.dv_xname));
1203 1.27 christos }
1204 1.27 christos #endif
1205 1.1 dbj }
1206 1.27 christos #ifdef DIAGNOSTIC
1207 1.27 christos else
1208 1.27 christos panic("%s: Unexpected rx dma continue while if not running\n",
1209 1.27 christos sc->sc_dev.dv_xname);
1210 1.1 dbj #endif
1211 1.27 christos
1212 1.1 dbj return(map);
1213 1.1 dbj }
1214 1.1 dbj
1215 1.1 dbj bus_dmamap_t
1216 1.1 dbj mb8795_txdma_continue(arg)
1217 1.1 dbj void *arg;
1218 1.1 dbj {
1219 1.1 dbj struct mb8795_softc *sc = arg;
1220 1.8 dbj bus_dmamap_t map;
1221 1.1 dbj
1222 1.25 jdolecek DPRINTF(("%s: mb8795_txdma_continue()\n",sc->sc_dev.dv_xname));
1223 1.1 dbj
1224 1.8 dbj if (sc->sc_tx_loaded) {
1225 1.8 dbj map = NULL;
1226 1.8 dbj } else {
1227 1.8 dbj map = sc->sc_tx_dmamap;
1228 1.8 dbj sc->sc_tx_loaded++;
1229 1.8 dbj }
1230 1.8 dbj
1231 1.1 dbj #ifdef DIAGNOSTIC
1232 1.1 dbj if (sc->sc_tx_loaded != 1) {
1233 1.8 dbj panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname,
1234 1.8 dbj sc->sc_tx_loaded);
1235 1.1 dbj }
1236 1.1 dbj #endif
1237 1.1 dbj
1238 1.1 dbj return(map);
1239 1.1 dbj }
1240 1.1 dbj
1241 1.1 dbj /****************************************************************/
1242