mb8795.c revision 1.12
1 /* $NetBSD: mb8795.c,v 1.12 1999/06/23 04:17:11 abs Exp $ */ 2 /* 3 * Copyright (c) 1998 Darrin B. Jewell 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Darrin B. Jewell 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include "opt_inet.h" 33 #include "opt_ccitt.h" 34 #include "opt_llc.h" 35 #include "opt_ns.h" 36 #include "bpfilter.h" 37 #include "rnd.h" 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/mbuf.h> 42 #include <sys/syslog.h> 43 #include <sys/socket.h> 44 #include <sys/device.h> 45 #include <sys/malloc.h> 46 #include <sys/ioctl.h> 47 #include <sys/errno.h> 48 #if NRND > 0 49 #include <sys/rnd.h> 50 #endif 51 52 #include <net/if.h> 53 #include <net/if_dl.h> 54 #include <net/if_ether.h> 55 56 #if 0 57 #include <net/if_media.h> 58 #endif 59 60 #ifdef INET 61 #include <netinet/in.h> 62 #include <netinet/if_inarp.h> 63 #include <netinet/in_systm.h> 64 #include <netinet/in_var.h> 65 #include <netinet/ip.h> 66 #endif 67 68 #ifdef NS 69 #include <netns/ns.h> 70 #include <netns/ns_if.h> 71 #endif 72 73 #if defined(CCITT) && defined(LLC) 74 #include <sys/socketvar.h> 75 #include <netccitt/x25.h> 76 #include <netccitt/pk.h> 77 #include <netccitt/pk_var.h> 78 #include <netccitt/pk_extern.h> 79 #endif 80 81 #if NBPFILTER > 0 82 #include <net/bpf.h> 83 #include <net/bpfdesc.h> 84 #endif 85 86 #include <machine/cpu.h> 87 #include <machine/bus.h> 88 #include <machine/intr.h> 89 90 /* @@@ this is here for the REALIGN_DMABUF hack below */ 91 #include "nextdmareg.h" 92 #include "nextdmavar.h" 93 94 #include "mb8795reg.h" 95 #include "mb8795var.h" 96 97 #if 0 98 #define XE_DEBUG 99 #endif 100 101 #ifdef XE_DEBUG 102 #define DPRINTF(x) printf x; 103 #else 104 #define DPRINTF(x) 105 #endif 106 107 108 /* 109 * Support for 110 * Fujitsu Ethernet Data Link Controller (MB8795) 111 * and the Fujitsu Manchester Encoder/Decoder (MB502). 112 */ 113 114 int debugipkt = 0; 115 116 117 void mb8795_shutdown __P((void *)); 118 119 #if 0 120 int mb8795_mediachange __P((struct ifnet *)); 121 void mb8795_mediastatus __P((struct ifnet *, struct ifmediareq *)); 122 #endif 123 124 struct mbuf * mb8795_rxdmamap_load __P((struct mb8795_softc *, 125 bus_dmamap_t map)); 126 127 bus_dmamap_t mb8795_rxdma_continue __P((void *)); 128 void mb8795_rxdma_completed __P((bus_dmamap_t,void *)); 129 bus_dmamap_t mb8795_txdma_continue __P((void *)); 130 void mb8795_txdma_completed __P((bus_dmamap_t,void *)); 131 void mb8795_rxdma_shutdown __P((void *)); 132 void mb8795_txdma_shutdown __P((void *)); 133 bus_dmamap_t mb8795_txdma_restart __P((bus_dmamap_t,void *)); 134 135 void 136 mb8795_config(sc) 137 struct mb8795_softc *sc; 138 { 139 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 140 141 DPRINTF(("%s: mb8795_config()\n",sc->sc_dev.dv_xname)); 142 143 /* Initialize ifnet structure. */ 144 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 145 ifp->if_softc = sc; 146 ifp->if_start = mb8795_start; 147 ifp->if_ioctl = mb8795_ioctl; 148 ifp->if_watchdog = mb8795_watchdog; 149 ifp->if_flags = 150 IFF_BROADCAST | IFF_NOTRAILERS; 151 152 #if 0 153 /* Initialize ifmedia structures. */ 154 ifmedia_init(&sc->sc_media, 0, mb8795_mediachange, mb8795_mediastatus); 155 if (sc->sc_supmedia != NULL) { 156 int i; 157 for (i = 0; i < sc->sc_nsupmedia; i++) 158 ifmedia_add(&sc->sc_media, sc->sc_supmedia[i], 159 0, NULL); 160 ifmedia_set(&sc->sc_media, sc->sc_defaultmedia); 161 } else { 162 ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_MANUAL, 0, NULL); 163 ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_MANUAL); 164 } 165 #endif 166 167 /* Attach the interface. */ 168 if_attach(ifp); 169 ether_ifattach(ifp, sc->sc_enaddr); 170 171 /* decrease the mtu on this interface to deal with 172 * alignment problems 173 */ 174 ifp->if_mtu -= 16; 175 176 #if NBPFILTER > 0 177 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 178 #endif 179 180 sc->sc_sh = shutdownhook_establish(mb8795_shutdown, sc); 181 if (sc->sc_sh == NULL) 182 panic("mb8795_config: can't establish shutdownhook"); 183 184 #if NRND > 0 185 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 186 RND_TYPE_NET, 0); 187 #endif 188 189 /* Initialize the dma maps */ 190 { 191 int error; 192 if ((error = bus_dmamap_create(sc->sc_tx_dmat, MCLBYTES, 193 (MCLBYTES/MSIZE), MCLBYTES, 0, BUS_DMA_ALLOCNOW, 194 &sc->sc_tx_dmamap)) != 0) { 195 panic("%s: can't create tx DMA map, error = %d\n", 196 sc->sc_dev.dv_xname, error); 197 } 198 { 199 int i; 200 for(i=0;i<MB8795_NRXBUFS;i++) { 201 if ((error = bus_dmamap_create(sc->sc_rx_dmat, MCLBYTES, 202 (MCLBYTES/MSIZE), MCLBYTES, 0, BUS_DMA_ALLOCNOW, 203 &sc->sc_rx_dmamap[i])) != 0) { 204 panic("%s: can't create rx DMA map, error = %d\n", 205 sc->sc_dev.dv_xname, error); 206 } 207 sc->sc_rx_mb_head[i] = NULL; 208 } 209 sc->sc_rx_loaded_idx = 0; 210 sc->sc_rx_completed_idx = 0; 211 sc->sc_rx_handled_idx = 0; 212 } 213 } 214 215 /* @@@ more next hacks 216 * the 2000 covers at least a 1500 mtu + headers 217 * + DMA_BEGINALIGNMENT+ DMA_ENDALIGNMENT 218 */ 219 sc->sc_txbuf = malloc(2000, M_DEVBUF, M_NOWAIT); 220 if (!sc->sc_txbuf) panic("%s: can't malloc tx DMA buffer", 221 sc->sc_dev.dv_xname); 222 223 sc->sc_tx_mb_head = NULL; 224 sc->sc_tx_loaded = 0; 225 226 sc->sc_tx_nd->nd_shutdown_cb = mb8795_txdma_shutdown; 227 sc->sc_tx_nd->nd_continue_cb = mb8795_txdma_continue; 228 sc->sc_tx_nd->nd_completed_cb = mb8795_txdma_completed; 229 sc->sc_tx_nd->nd_cb_arg = sc; 230 231 sc->sc_rx_nd->nd_shutdown_cb = mb8795_rxdma_shutdown; 232 sc->sc_rx_nd->nd_continue_cb = mb8795_rxdma_continue; 233 sc->sc_rx_nd->nd_completed_cb = mb8795_rxdma_completed; 234 sc->sc_rx_nd->nd_cb_arg = sc; 235 236 DPRINTF(("%s: leaving mb8795_config()\n",sc->sc_dev.dv_xname)); 237 } 238 239 240 /****************************************************************/ 241 #if 0 242 #define XCHR(x) "0123456789abcdef"[(x) & 0xf] 243 static void 244 hex_dump(unsigned char *pkt, size_t len) 245 { 246 size_t i, j; 247 248 printf("0000: "); 249 for(i=0; i<len; i++) { 250 printf("%c%c ", XCHR(pkt[i]>>4), XCHR(pkt[i])); 251 if ((i+1) % 16 == 0) { 252 printf(" %c", '"'); 253 for(j=0; j<16; j++) 254 printf("%c", pkt[i-15+j]>=32 && pkt[i-15+j]<127?pkt[i-15+j]:'.'); 255 printf("%c\n%c%c%c%c: ", '"', XCHR((i+1)>>12), 256 XCHR((i+1)>>8), XCHR((i+1)>>4), XCHR(i+1)); 257 } 258 } 259 printf("\n"); 260 } 261 #endif 262 263 /* 264 * Controller receive interrupt. 265 */ 266 void 267 mb8795_rint(sc) 268 struct mb8795_softc *sc; 269 { 270 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 271 int error = 0; 272 u_char rxstat; 273 u_char rxmask; 274 275 rxstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT); 276 rxmask = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK); 277 278 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT, XE_RXSTAT_CLEAR); 279 280 #if 0 281 DPRINTF(("%s: rx interrupt, rxstat = %b\n", 282 sc->sc_dev.dv_xname, rxstat, XE_RXSTAT_BITS)); 283 #endif 284 285 if (rxstat & XE_RXSTAT_RESET) { 286 DPRINTF(("%s: rx reset packet\n", 287 sc->sc_dev.dv_xname)); 288 error++; 289 } 290 if (rxstat & XE_RXSTAT_SHORT) { 291 DPRINTF(("%s: rx short packet\n", 292 sc->sc_dev.dv_xname)); 293 error++; 294 } 295 if (rxstat & XE_RXSTAT_ALIGNERR) { 296 DPRINTF(("%s: rx alignment error\n", 297 sc->sc_dev.dv_xname)); 298 error++; 299 } 300 if (rxstat & XE_RXSTAT_CRCERR) { 301 DPRINTF(("%s: rx CRC error\n", 302 sc->sc_dev.dv_xname)); 303 error++; 304 } 305 if (rxstat & XE_RXSTAT_OVERFLOW) { 306 DPRINTF(("%s: rx overflow error\n", 307 sc->sc_dev.dv_xname)); 308 error++; 309 } 310 311 if (error) { 312 ifp->if_ierrors++; 313 /* @@@ handle more gracefully, free memory, etc. */ 314 } 315 316 if (rxstat & XE_RXSTAT_OK) { 317 int s; 318 s = spldma(); 319 320 while(sc->sc_rx_handled_idx != sc->sc_rx_completed_idx) { 321 struct mbuf *m; 322 bus_dmamap_t map; 323 324 sc->sc_rx_handled_idx++; 325 sc->sc_rx_handled_idx %= MB8795_NRXBUFS; 326 327 /* Should probably not do this much while interrupts 328 * are disabled, but for now we will. 329 */ 330 331 map = sc->sc_rx_dmamap[sc->sc_rx_handled_idx]; 332 m = sc->sc_rx_mb_head[sc->sc_rx_handled_idx]; 333 334 bus_dmamap_sync(sc->sc_rx_dmat, map, 335 0, map->dm_mapsize, BUS_DMASYNC_POSTREAD); 336 337 338 /* Find receive length and chop off CRC */ 339 /* @@@ assumes packet is all in first segment 340 * also assumes segment length is length of packet. 341 * see comment in nextdma.c nextdma_intr(); 342 */ 343 m->m_pkthdr.len = map->dm_segs[0].ds_len-4; 344 m->m_len = map->dm_segs[0].ds_len-4; 345 m->m_pkthdr.rcvif = ifp; 346 347 bus_dmamap_unload(sc->sc_rx_dmat, map); 348 349 /* Install a fresh mbuf for next packet */ 350 351 sc->sc_rx_mb_head[sc->sc_rx_handled_idx] = 352 mb8795_rxdmamap_load(sc,map); 353 354 /* enable interrupts while we process the packet */ 355 splx(s); 356 357 #if defined(XE_DEBUG) 358 /* Peek at the packet */ 359 DPRINTF(("%s: received packet, at VA 0x%08x-0x%08x,len %d\n", 360 sc->sc_dev.dv_xname,mtod(m,u_char *),mtod(m,u_char *)+m->m_len,m->m_len)); 361 #if 0 362 hex_dump(mtod(m,u_char *), m->m_pkthdr.len < 255 ? m->m_pkthdr.len : 128 ); 363 #endif 364 #endif 365 366 { 367 struct ether_header *eh; 368 369 ifp->if_ipackets++; 370 debugipkt++; 371 372 /* Pass the packet up. */ 373 (*ifp->if_input)(ifp, m); 374 } 375 376 s = spldma(); 377 378 } 379 380 splx(s); 381 382 } 383 384 DPRINTF(("%s: rx interrupt, rxstat = %b\n", 385 sc->sc_dev.dv_xname, rxstat, XE_RXSTAT_BITS)); 386 387 #if 0 && defined(XE_DEBUG) 388 { 389 DPRINTF(("rxstat = 0x%b\n", 390 bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT), XE_RXSTAT_BITS)); 391 DPRINTF(("rxmask = 0x%b\n", 392 bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK), XE_RXMASK_BITS)); 393 DPRINTF(("rxmode = 0x%b\n", 394 bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMODE), XE_RXMODE_BITS)); 395 } 396 #endif 397 398 return; 399 } 400 401 /* 402 * Controller transmit interrupt. 403 */ 404 void 405 mb8795_tint(sc) 406 struct mb8795_softc *sc; 407 408 { 409 int reset = 0; 410 u_char txstat; 411 u_char txmask; 412 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 413 414 txstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT); 415 txmask = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK); 416 417 #if 0 418 DPRINTF(("%s: tx interrupt, txstat = %b\n", 419 sc->sc_dev.dv_xname, txstat, XE_TXSTAT_BITS)); 420 #endif 421 422 if (txstat & XE_TXSTAT_SHORTED) { 423 printf("%s: tx cable shorted\n", sc->sc_dev.dv_xname); 424 ifp->if_oerrors++; 425 } 426 if (txstat & XE_TXSTAT_UNDERFLOW) { 427 printf("%s: tx underflow\n", sc->sc_dev.dv_xname); 428 ifp->if_oerrors++; 429 } 430 if (txstat & XE_TXSTAT_COLLERR) { 431 DPRINTF(("%s: tx collision\n", sc->sc_dev.dv_xname)); 432 ifp->if_collisions++; 433 } 434 if (txstat & XE_TXSTAT_COLLERR16) { 435 printf("%s: tx 16th collision\n", sc->sc_dev.dv_xname); 436 ifp->if_oerrors++; 437 ifp->if_collisions += 16; 438 } 439 440 if (reset) { 441 mb8795_reset(sc); 442 return; 443 } 444 445 #if 0 446 if (txstat & XE_TXSTAT_READY) { 447 448 panic("%s: unexpected tx interrupt %b", 449 sc->sc_dev.dv_xname,txstat,XE_TXSTAT_BITS); 450 451 /* turn interrupt off */ 452 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 453 txmask & ~XE_TXMASK_READYIE); 454 } 455 #endif 456 457 return; 458 } 459 460 /****************************************************************/ 461 462 void 463 mb8795_reset(sc) 464 struct mb8795_softc *sc; 465 { 466 int s; 467 468 s = splimp(); 469 mb8795_init(sc); 470 splx(s); 471 } 472 473 void 474 mb8795_watchdog(ifp) 475 struct ifnet *ifp; 476 { 477 struct mb8795_softc *sc = ifp->if_softc; 478 479 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 480 ++ifp->if_oerrors; 481 482 DPRINTF(("%s: %d input errors, %d input packets\n", 483 sc->sc_dev.dv_xname, ifp->if_ierrors, ifp->if_ipackets)); 484 485 mb8795_reset(sc); 486 } 487 488 /* 489 * Initialization of interface; set up initialization block 490 * and transmit/receive descriptor rings. 491 * @@@ error handling is bogus in here. memory leaks 492 */ 493 void 494 mb8795_init(sc) 495 struct mb8795_softc *sc; 496 { 497 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 498 499 m_freem(sc->sc_tx_mb_head); 500 sc->sc_tx_mb_head = NULL; 501 sc->sc_tx_loaded = 0; 502 503 { 504 int i; 505 for(i=0;i<MB8795_NRXBUFS;i++) { 506 if (sc->sc_rx_mb_head[i]) { 507 bus_dmamap_unload(sc->sc_rx_dmat, sc->sc_rx_dmamap[i]); 508 m_freem(sc->sc_rx_mb_head[i]); 509 } 510 sc->sc_rx_mb_head[i] = 511 mb8795_rxdmamap_load(sc, sc->sc_rx_dmamap[i]); 512 } 513 sc->sc_rx_loaded_idx = 0; 514 sc->sc_rx_completed_idx = 0; 515 sc->sc_rx_handled_idx = 0; 516 } 517 518 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RESET, XE_RESET_MODE); 519 520 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMODE, XE_TXMODE_LB_DISABLE); 521 #if 0 /* This interrupt was sometimes failing to ack correctly 522 * causing a loop @@@ 523 */ 524 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 525 XE_TXMASK_UNDERFLOWIE | XE_TXMASK_COLLIE | XE_TXMASK_COLL16IE 526 | XE_TXMASK_PARERRIE); 527 #else 528 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 0); 529 #endif 530 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT, XE_TXSTAT_CLEAR); 531 532 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXMODE, XE_RXMODE_NORMAL); 533 534 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK, 535 XE_RXMASK_OKIE | XE_RXMASK_RESETIE | XE_RXMASK_SHORTIE | 536 XE_RXMASK_ALIGNERRIE | XE_RXMASK_CRCERRIE | XE_RXMASK_OVERFLOWIE); 537 538 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT, XE_RXSTAT_CLEAR); 539 540 { 541 int i; 542 for(i=0;i<sizeof(sc->sc_enaddr);i++) { 543 bus_space_write_1(sc->sc_bst,sc->sc_bsh,XE_ENADDR+i,sc->sc_enaddr[i]); 544 } 545 } 546 547 DPRINTF(("%s: initializing ethernet %02x:%02x:%02x:%02x:%02x:%02x, size=%d\n", 548 sc->sc_dev.dv_xname, 549 sc->sc_enaddr[0],sc->sc_enaddr[1],sc->sc_enaddr[2], 550 sc->sc_enaddr[3],sc->sc_enaddr[4],sc->sc_enaddr[5], 551 sizeof(sc->sc_enaddr))); 552 553 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RESET, 0); 554 555 ifp->if_flags |= IFF_RUNNING; 556 ifp->if_flags &= ~IFF_OACTIVE; 557 ifp->if_timer = 0; 558 559 nextdma_init(sc->sc_tx_nd); 560 nextdma_init(sc->sc_rx_nd); 561 562 nextdma_start(sc->sc_rx_nd, DMACSR_READ); 563 564 if (ifp->if_snd.ifq_head != NULL) { 565 mb8795_start(ifp); 566 } 567 } 568 569 void 570 mb8795_stop(sc) 571 struct mb8795_softc *sc; 572 { 573 printf("%s: stop not implemented\n", sc->sc_dev.dv_xname); 574 } 575 576 577 void 578 mb8795_shutdown(arg) 579 void *arg; 580 { 581 struct mb8795_softc *sc = (struct mb8795_softc *)arg; 582 mb8795_stop(sc); 583 } 584 585 /****************************************************************/ 586 int 587 mb8795_ioctl(ifp, cmd, data) 588 register struct ifnet *ifp; 589 u_long cmd; 590 caddr_t data; 591 { 592 register struct mb8795_softc *sc = ifp->if_softc; 593 struct ifaddr *ifa = (struct ifaddr *)data; 594 struct ifreq *ifr = (struct ifreq *)data; 595 int s, error = 0; 596 597 s = splimp(); 598 599 switch (cmd) { 600 601 case SIOCSIFADDR: 602 ifp->if_flags |= IFF_UP; 603 604 switch (ifa->ifa_addr->sa_family) { 605 #ifdef INET 606 case AF_INET: 607 mb8795_init(sc); 608 arp_ifinit(ifp, ifa); 609 break; 610 #endif 611 #ifdef NS 612 case AF_NS: 613 { 614 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 615 616 if (ns_nullhost(*ina)) 617 ina->x_host = 618 *(union ns_host *)LLADDR(ifp->if_sadl); 619 else { 620 bcopy(ina->x_host.c_host, 621 LLADDR(ifp->if_sadl), 622 sizeof(sc->sc_enaddr)); 623 } 624 /* Set new address. */ 625 mb8795_init(sc); 626 break; 627 } 628 #endif 629 default: 630 mb8795_init(sc); 631 break; 632 } 633 break; 634 635 #if defined(CCITT) && defined(LLC) 636 case SIOCSIFCONF_X25: 637 ifp->if_flags |= IFF_UP; 638 ifa->ifa_rtrequest = cons_rtrequest; /* XXX */ 639 error = x25_llcglue(PRC_IFUP, ifa->ifa_addr); 640 if (error == 0) 641 mb8795_init(sc); 642 break; 643 #endif /* CCITT && LLC */ 644 645 case SIOCSIFFLAGS: 646 if ((ifp->if_flags & IFF_UP) == 0 && 647 (ifp->if_flags & IFF_RUNNING) != 0) { 648 /* 649 * If interface is marked down and it is running, then 650 * stop it. 651 */ 652 mb8795_stop(sc); 653 ifp->if_flags &= ~IFF_RUNNING; 654 } else if ((ifp->if_flags & IFF_UP) != 0 && 655 (ifp->if_flags & IFF_RUNNING) == 0) { 656 /* 657 * If interface is marked up and it is stopped, then 658 * start it. 659 */ 660 mb8795_init(sc); 661 } else { 662 /* 663 * Reset the interface to pick up changes in any other 664 * flags that affect hardware registers. 665 */ 666 /*mb8795_stop(sc);*/ 667 mb8795_init(sc); 668 } 669 #ifdef XE_DEBUG 670 if (ifp->if_flags & IFF_DEBUG) 671 sc->sc_debug = 1; 672 else 673 sc->sc_debug = 0; 674 #endif 675 break; 676 677 case SIOCADDMULTI: 678 case SIOCDELMULTI: 679 error = (cmd == SIOCADDMULTI) ? 680 ether_addmulti(ifr, &sc->sc_ethercom) : 681 ether_delmulti(ifr, &sc->sc_ethercom); 682 683 if (error == ENETRESET) { 684 /* 685 * Multicast list has changed; set the hardware filter 686 * accordingly. 687 */ 688 mb8795_reset(sc); 689 error = 0; 690 } 691 break; 692 693 #if 0 694 case SIOCGIFMEDIA: 695 case SIOCSIFMEDIA: 696 error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd); 697 break; 698 #endif 699 700 default: 701 error = EINVAL; 702 break; 703 } 704 705 splx(s); 706 707 #if 0 708 DPRINTF(("DEBUG: mb8795_ioctl(0x%lx) returning %d\n", 709 cmd,error)); 710 #endif 711 712 return (error); 713 } 714 715 /* 716 * Setup output on interface. 717 * Get another datagram to send off of the interface queue, and map it to the 718 * interface before starting the output. 719 * Called only at splimp or interrupt level. 720 */ 721 void 722 mb8795_start(ifp) 723 struct ifnet *ifp; 724 { 725 int error; 726 struct mb8795_softc *sc = ifp->if_softc; 727 728 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 729 return; 730 731 DPRINTF(("%s: mb8795_start()\n",sc->sc_dev.dv_xname)); 732 733 #if (defined(DIAGNOSTIC)) 734 { 735 u_char txstat; 736 txstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT); 737 if (!(txstat & XE_TXSTAT_READY)) { 738 /* @@@ I used to panic here, but then it paniced once. 739 * Let's see if I can just reset instead. [ dbj 980706.1900 ] 740 */ 741 printf("%s: transmitter not ready\n", sc->sc_dev.dv_xname); 742 mb8795_reset(sc); 743 return; 744 } 745 } 746 #endif 747 748 #if 0 749 return; /* @@@ Turn off xmit for debugging */ 750 #endif 751 752 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT, XE_TXSTAT_CLEAR); 753 754 IF_DEQUEUE(&ifp->if_snd, sc->sc_tx_mb_head); 755 if (sc->sc_tx_mb_head == 0) { 756 printf("%s: No packet to start\n", 757 sc->sc_dev.dv_xname); 758 return; 759 } 760 761 ifp->if_timer = 5; 762 763 /* The following is a next specific hack that should 764 * probably be moved out of MI code. 765 * This macro assumes it can move forward as needed 766 * in the buffer. Perhaps it should zero the extra buffer. 767 */ 768 #define REALIGN_DMABUF(s,l) \ 769 { (s) = ((u_char *)(((unsigned)(s)+DMA_BEGINALIGNMENT-1) \ 770 &~(DMA_BEGINALIGNMENT-1))); \ 771 (l) = ((u_char *)(((unsigned)((s)+(l))+DMA_ENDALIGNMENT-1) \ 772 &~(DMA_ENDALIGNMENT-1)))-(s);} 773 774 #if 0 775 error = bus_dmamap_load_mbuf(sc->sc_tx_dmat, 776 sc->sc_tx_dmamap, 777 sc->sc_tx_mb_head, 778 BUS_DMA_NOWAIT); 779 #else 780 { 781 u_char *buf = sc->sc_txbuf; 782 int buflen = 0; 783 struct mbuf *m = sc->sc_tx_mb_head; 784 buflen = m->m_pkthdr.len; 785 786 /* Fix runt packets, @@@ memory overrun */ 787 if (buflen < ETHERMIN+sizeof(struct ether_header)) { 788 buflen = ETHERMIN+sizeof(struct ether_header); 789 } 790 791 buflen += 15; 792 REALIGN_DMABUF(buf,buflen); 793 if (buflen > 1520) { 794 panic("%s: packet too long\n",sc->sc_dev.dv_xname); 795 } 796 797 { 798 u_char *p = buf; 799 for (m=sc->sc_tx_mb_head; m; m = m->m_next) { 800 if (m->m_len == 0) continue; 801 bcopy(mtod(m, u_char *), p, m->m_len); 802 p += m->m_len; 803 } 804 } 805 806 error = bus_dmamap_load(sc->sc_tx_dmat, sc->sc_tx_dmamap, 807 buf,buflen,NULL,BUS_DMA_NOWAIT); 808 } 809 #endif 810 if (error) { 811 printf("%s: can't load mbuf chain, error = %d\n", 812 sc->sc_dev.dv_xname, error); 813 m_freem(sc->sc_tx_mb_head); 814 sc->sc_tx_mb_head = NULL; 815 return; 816 } 817 818 #ifdef DIAGNOSTIC 819 if (sc->sc_tx_loaded != 0) { 820 panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname, 821 sc->sc_tx_loaded); 822 } 823 #endif 824 825 ifp->if_flags |= IFF_OACTIVE; 826 827 bus_dmamap_sync(sc->sc_tx_dmat, sc->sc_tx_dmamap, 0, 828 sc->sc_tx_dmamap->dm_mapsize, BUS_DMASYNC_PREWRITE); 829 830 nextdma_start(sc->sc_tx_nd, DMACSR_WRITE); 831 832 #if NBPFILTER > 0 833 /* 834 * Pass packet to bpf if there is a listener. 835 */ 836 if (ifp->if_bpf) 837 bpf_mtap(ifp->if_bpf, sc->sc_tx_mb_head); 838 #endif 839 840 } 841 842 /****************************************************************/ 843 844 void 845 mb8795_txdma_completed(map, arg) 846 bus_dmamap_t map; 847 void *arg; 848 { 849 struct mb8795_softc *sc = arg; 850 851 DPRINTF(("%s: mb8795_txdma_completed()\n",sc->sc_dev.dv_xname)); 852 853 #ifdef DIAGNOSTIC 854 if (!sc->sc_tx_loaded) { 855 panic("%s: tx completed never loaded ",sc->sc_dev.dv_xname); 856 } 857 if (map != sc->sc_tx_dmamap) { 858 panic("%s: unexpected tx completed map",sc->sc_dev.dv_xname); 859 } 860 861 #endif 862 } 863 864 void 865 mb8795_txdma_shutdown(arg) 866 void *arg; 867 { 868 struct mb8795_softc *sc = arg; 869 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 870 871 DPRINTF(("%s: mb8795_txdma_shutdown()\n",sc->sc_dev.dv_xname)); 872 873 #ifdef DIAGNOSTIC 874 if (!sc->sc_tx_loaded) { 875 panic("%s: tx shutdown never loaded ",sc->sc_dev.dv_xname); 876 } 877 #endif 878 879 { 880 881 if (sc->sc_tx_loaded) { 882 bus_dmamap_sync(sc->sc_tx_dmat, sc->sc_tx_dmamap, 883 0, sc->sc_tx_dmamap->dm_mapsize, 884 BUS_DMASYNC_POSTWRITE); 885 bus_dmamap_unload(sc->sc_tx_dmat, sc->sc_tx_dmamap); 886 m_freem(sc->sc_tx_mb_head); 887 sc->sc_tx_mb_head = NULL; 888 889 sc->sc_tx_loaded--; 890 } 891 892 #ifdef DIAGNOSTIC 893 if (sc->sc_tx_loaded != 0) { 894 panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname, 895 sc->sc_tx_loaded); 896 } 897 #endif 898 899 ifp->if_flags &= ~IFF_OACTIVE; 900 901 ifp->if_timer = 0; 902 903 if (ifp->if_snd.ifq_head != NULL) { 904 mb8795_start(ifp); 905 } 906 907 } 908 909 #if 0 910 /* Enable ready interrupt */ 911 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 912 bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK) 913 | XE_TXMASK_READYIE); 914 #endif 915 } 916 917 918 void 919 mb8795_rxdma_completed(map, arg) 920 bus_dmamap_t map; 921 void *arg; 922 { 923 struct mb8795_softc *sc = arg; 924 925 sc->sc_rx_completed_idx++; 926 sc->sc_rx_completed_idx %= MB8795_NRXBUFS; 927 928 DPRINTF(("%s: mb8795_rxdma_completed(), sc->sc_rx_completed_idx = %d\n", 929 sc->sc_dev.dv_xname, sc->sc_rx_completed_idx)); 930 931 #if (defined(DIAGNOSTIC)) 932 if (map != sc->sc_rx_dmamap[sc->sc_rx_completed_idx]) { 933 panic("%s: Unexpected rx dmamap completed\n", 934 sc->sc_dev.dv_xname); 935 } 936 #endif 937 } 938 939 void 940 mb8795_rxdma_shutdown(arg) 941 void *arg; 942 { 943 struct mb8795_softc *sc = arg; 944 945 panic("%s: mb8795_rxdma_shutdown() unexpected", sc->sc_dev.dv_xname); 946 } 947 948 949 /* 950 * load a dmamap with a freshly allocated mbuf 951 */ 952 struct mbuf * 953 mb8795_rxdmamap_load(sc,map) 954 struct mb8795_softc *sc; 955 bus_dmamap_t map; 956 { 957 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 958 struct mbuf *m; 959 int error; 960 961 MGETHDR(m, M_DONTWAIT, MT_DATA); 962 if (m) { 963 MCLGET(m, M_DONTWAIT); 964 if ((m->m_flags & M_EXT) == 0) { 965 m_freem(m); 966 m = NULL; 967 } else { 968 m->m_len = MCLBYTES; 969 } 970 } 971 if (!m) { 972 /* @@@ Handle this gracefully by reusing a scratch buffer 973 * or something. 974 */ 975 panic("Unable to get memory for incoming ethernet\n"); 976 } 977 978 /* Align buffer, @@@ next specific. 979 * perhaps should be using M_ALIGN here instead? 980 * First we give us a little room to align with. 981 */ 982 { 983 u_char *buf = m->m_data; 984 int buflen = m->m_len; 985 buflen -= DMA_ENDALIGNMENT+DMA_BEGINALIGNMENT; 986 REALIGN_DMABUF(buf, buflen); 987 m->m_data = buf; 988 m->m_len = buflen; 989 } 990 991 m->m_pkthdr.rcvif = ifp; 992 m->m_pkthdr.len = m->m_len; 993 994 error = bus_dmamap_load_mbuf(sc->sc_rx_dmat, 995 map, m, BUS_DMA_NOWAIT); 996 997 bus_dmamap_sync(sc->sc_rx_dmat, map, 0, 998 map->dm_mapsize, BUS_DMASYNC_PREREAD); 999 1000 if (error) { 1001 DPRINTF(("DEBUG: m->m_data = 0x%08x, m->m_len = %d\n", 1002 m->m_data, m->m_len)); 1003 DPRINTF(("DEBUG: MCLBYTES = %d, map->_dm_size = %d\n", 1004 MCLBYTES, map->_dm_size)); 1005 1006 panic("%s: can't load rx mbuf chain, error = %d\n", 1007 sc->sc_dev.dv_xname, error); 1008 m_freem(m); 1009 m = NULL; 1010 } 1011 1012 return(m); 1013 } 1014 1015 bus_dmamap_t 1016 mb8795_rxdma_continue(arg) 1017 void *arg; 1018 { 1019 struct mb8795_softc *sc = arg; 1020 bus_dmamap_t map = NULL; 1021 1022 /* 1023 * Currently, starts dumping new packets if the buffers 1024 * fill up. This should probably reclaim unhandled 1025 * buffers instead so we drop older packets instead 1026 * of newer ones. 1027 */ 1028 if (((sc->sc_rx_loaded_idx+1)%MB8795_NRXBUFS) != sc->sc_rx_handled_idx) { 1029 sc->sc_rx_loaded_idx++; 1030 sc->sc_rx_loaded_idx %= MB8795_NRXBUFS; 1031 map = sc->sc_rx_dmamap[sc->sc_rx_loaded_idx]; 1032 1033 DPRINTF(("%s: mb8795_rxdma_continue() sc->sc_rx_loaded_idx = %d\nn", 1034 sc->sc_dev.dv_xname,sc->sc_rx_loaded_idx)); 1035 } 1036 #if (defined(DIAGNOSTIC)) 1037 else { 1038 printf("%s: out of receive DMA buffers\n",sc->sc_dev.dv_xname); 1039 } 1040 #endif 1041 1042 return(map); 1043 } 1044 1045 bus_dmamap_t 1046 mb8795_txdma_continue(arg) 1047 void *arg; 1048 { 1049 struct mb8795_softc *sc = arg; 1050 bus_dmamap_t map; 1051 1052 DPRINTF(("%s: mb8795_txdma_continue()\n",sc->sc_dev.dv_xname)); 1053 1054 if (sc->sc_tx_loaded) { 1055 map = NULL; 1056 } else { 1057 map = sc->sc_tx_dmamap; 1058 sc->sc_tx_loaded++; 1059 } 1060 1061 #ifdef DIAGNOSTIC 1062 if (sc->sc_tx_loaded != 1) { 1063 panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname, 1064 sc->sc_tx_loaded); 1065 } 1066 #endif 1067 1068 return(map); 1069 } 1070 1071 1072 /****************************************************************/ 1073 #if 0 1074 int 1075 mb8795_mediachange(ifp) 1076 struct ifnet *ifp; 1077 { 1078 struct mb8795_softc *sc = ifp->if_softc; 1079 1080 if (sc->sc_mediachange) 1081 return ((*sc->sc_mediachange)(sc)); 1082 return (0); 1083 } 1084 1085 void 1086 mb8795_mediastatus(ifp, ifmr) 1087 struct ifnet *ifp; 1088 struct ifmediareq *ifmr; 1089 { 1090 struct mb8795_softc *sc = ifp->if_softc; 1091 1092 if ((ifp->if_flags & IFF_UP) == 0) 1093 return; 1094 1095 ifmr->ifm_status = IFM_AVALID; 1096 if (sc->sc_havecarrier) 1097 ifmr->ifm_status |= IFM_ACTIVE; 1098 1099 if (sc->sc_mediastatus) 1100 (*sc->sc_mediastatus)(sc, ifmr); 1101 } 1102 #endif 1103 /****************************************************************/ 1104
Indexes created Wed Sep 24 02:09:48 GMT 2025