mb8795.c revision 1.13
1 /* $NetBSD: mb8795.c,v 1.13 1999/08/03 06:55:21 dbj Exp $ */ 2 /* 3 * Copyright (c) 1998 Darrin B. Jewell 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Darrin B. Jewell 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include "opt_inet.h" 33 #include "opt_ccitt.h" 34 #include "opt_llc.h" 35 #include "opt_ns.h" 36 #include "bpfilter.h" 37 #include "rnd.h" 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/mbuf.h> 42 #include <sys/syslog.h> 43 #include <sys/socket.h> 44 #include <sys/device.h> 45 #include <sys/malloc.h> 46 #include <sys/ioctl.h> 47 #include <sys/errno.h> 48 #if NRND > 0 49 #include <sys/rnd.h> 50 #endif 51 52 #include <net/if.h> 53 #include <net/if_dl.h> 54 #include <net/if_ether.h> 55 56 #if 0 57 #include <net/if_media.h> 58 #endif 59 60 #ifdef INET 61 #include <netinet/in.h> 62 #include <netinet/if_inarp.h> 63 #include <netinet/in_systm.h> 64 #include <netinet/in_var.h> 65 #include <netinet/ip.h> 66 #endif 67 68 #ifdef NS 69 #include <netns/ns.h> 70 #include <netns/ns_if.h> 71 #endif 72 73 #if defined(CCITT) && defined(LLC) 74 #include <sys/socketvar.h> 75 #include <netccitt/x25.h> 76 #include <netccitt/pk.h> 77 #include <netccitt/pk_var.h> 78 #include <netccitt/pk_extern.h> 79 #endif 80 81 #if NBPFILTER > 0 82 #include <net/bpf.h> 83 #include <net/bpfdesc.h> 84 #endif 85 86 #include <machine/cpu.h> 87 #include <machine/bus.h> 88 #include <machine/intr.h> 89 90 /* @@@ this is here for the REALIGN_DMABUF hack below */ 91 #include "nextdmareg.h" 92 #include "nextdmavar.h" 93 94 #include "mb8795reg.h" 95 #include "mb8795var.h" 96 97 #if 0 98 #define XE_DEBUG 99 #endif 100 101 #ifdef XE_DEBUG 102 #define DPRINTF(x) printf x; 103 #else 104 #define DPRINTF(x) 105 #endif 106 107 108 /* 109 * Support for 110 * Fujitsu Ethernet Data Link Controller (MB8795) 111 * and the Fujitsu Manchester Encoder/Decoder (MB502). 112 */ 113 114 int debugipkt = 0; 115 116 117 void mb8795_shutdown __P((void *)); 118 119 #if 0 120 int mb8795_mediachange __P((struct ifnet *)); 121 void mb8795_mediastatus __P((struct ifnet *, struct ifmediareq *)); 122 #endif 123 124 struct mbuf * mb8795_rxdmamap_load __P((struct mb8795_softc *, 125 bus_dmamap_t map)); 126 127 bus_dmamap_t mb8795_rxdma_continue __P((void *)); 128 void mb8795_rxdma_completed __P((bus_dmamap_t,void *)); 129 bus_dmamap_t mb8795_txdma_continue __P((void *)); 130 void mb8795_txdma_completed __P((bus_dmamap_t,void *)); 131 void mb8795_rxdma_shutdown __P((void *)); 132 void mb8795_txdma_shutdown __P((void *)); 133 bus_dmamap_t mb8795_txdma_restart __P((bus_dmamap_t,void *)); 134 135 void 136 mb8795_config(sc) 137 struct mb8795_softc *sc; 138 { 139 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 140 141 DPRINTF(("%s: mb8795_config()\n",sc->sc_dev.dv_xname)); 142 143 /* Initialize ifnet structure. */ 144 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 145 ifp->if_softc = sc; 146 ifp->if_start = mb8795_start; 147 ifp->if_ioctl = mb8795_ioctl; 148 ifp->if_watchdog = mb8795_watchdog; 149 ifp->if_flags = 150 IFF_BROADCAST | IFF_NOTRAILERS; 151 152 #if 0 153 /* Initialize ifmedia structures. */ 154 ifmedia_init(&sc->sc_media, 0, mb8795_mediachange, mb8795_mediastatus); 155 if (sc->sc_supmedia != NULL) { 156 int i; 157 for (i = 0; i < sc->sc_nsupmedia; i++) 158 ifmedia_add(&sc->sc_media, sc->sc_supmedia[i], 159 0, NULL); 160 ifmedia_set(&sc->sc_media, sc->sc_defaultmedia); 161 } else { 162 ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_MANUAL, 0, NULL); 163 ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_MANUAL); 164 } 165 #endif 166 167 /* Attach the interface. */ 168 if_attach(ifp); 169 ether_ifattach(ifp, sc->sc_enaddr); 170 171 /* decrease the mtu on this interface to deal with 172 * alignment problems 173 */ 174 ifp->if_mtu -= 16; 175 176 #if NBPFILTER > 0 177 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 178 #endif 179 180 sc->sc_sh = shutdownhook_establish(mb8795_shutdown, sc); 181 if (sc->sc_sh == NULL) 182 panic("mb8795_config: can't establish shutdownhook"); 183 184 #if NRND > 0 185 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 186 RND_TYPE_NET, 0); 187 #endif 188 189 /* Initialize the dma maps */ 190 { 191 int error; 192 if ((error = bus_dmamap_create(sc->sc_tx_dmat, MCLBYTES, 193 (MCLBYTES/MSIZE), MCLBYTES, 0, BUS_DMA_ALLOCNOW, 194 &sc->sc_tx_dmamap)) != 0) { 195 panic("%s: can't create tx DMA map, error = %d\n", 196 sc->sc_dev.dv_xname, error); 197 } 198 { 199 int i; 200 for(i=0;i<MB8795_NRXBUFS;i++) { 201 if ((error = bus_dmamap_create(sc->sc_rx_dmat, MCLBYTES, 202 (MCLBYTES/MSIZE), MCLBYTES, 0, BUS_DMA_ALLOCNOW, 203 &sc->sc_rx_dmamap[i])) != 0) { 204 panic("%s: can't create rx DMA map, error = %d\n", 205 sc->sc_dev.dv_xname, error); 206 } 207 sc->sc_rx_mb_head[i] = NULL; 208 } 209 sc->sc_rx_loaded_idx = 0; 210 sc->sc_rx_completed_idx = 0; 211 sc->sc_rx_handled_idx = 0; 212 } 213 } 214 215 /* @@@ more next hacks 216 * the 2000 covers at least a 1500 mtu + headers 217 * + DMA_BEGINALIGNMENT+ DMA_ENDALIGNMENT 218 */ 219 sc->sc_txbuf = malloc(2000, M_DEVBUF, M_NOWAIT); 220 if (!sc->sc_txbuf) panic("%s: can't malloc tx DMA buffer", 221 sc->sc_dev.dv_xname); 222 223 sc->sc_tx_mb_head = NULL; 224 sc->sc_tx_loaded = 0; 225 226 sc->sc_tx_nd->nd_shutdown_cb = mb8795_txdma_shutdown; 227 sc->sc_tx_nd->nd_continue_cb = mb8795_txdma_continue; 228 sc->sc_tx_nd->nd_completed_cb = mb8795_txdma_completed; 229 sc->sc_tx_nd->nd_cb_arg = sc; 230 231 sc->sc_rx_nd->nd_shutdown_cb = mb8795_rxdma_shutdown; 232 sc->sc_rx_nd->nd_continue_cb = mb8795_rxdma_continue; 233 sc->sc_rx_nd->nd_completed_cb = mb8795_rxdma_completed; 234 sc->sc_rx_nd->nd_cb_arg = sc; 235 236 DPRINTF(("%s: leaving mb8795_config()\n",sc->sc_dev.dv_xname)); 237 } 238 239 240 /****************************************************************/ 241 #if 0 242 #define XCHR(x) "0123456789abcdef"[(x) & 0xf] 243 static void 244 hex_dump(unsigned char *pkt, size_t len) 245 { 246 size_t i, j; 247 248 printf("0000: "); 249 for(i=0; i<len; i++) { 250 printf("%c%c ", XCHR(pkt[i]>>4), XCHR(pkt[i])); 251 if ((i+1) % 16 == 0) { 252 printf(" %c", '"'); 253 for(j=0; j<16; j++) 254 printf("%c", pkt[i-15+j]>=32 && pkt[i-15+j]<127?pkt[i-15+j]:'.'); 255 printf("%c\n%c%c%c%c: ", '"', XCHR((i+1)>>12), 256 XCHR((i+1)>>8), XCHR((i+1)>>4), XCHR(i+1)); 257 } 258 } 259 printf("\n"); 260 } 261 #endif 262 263 /* 264 * Controller receive interrupt. 265 */ 266 void 267 mb8795_rint(sc) 268 struct mb8795_softc *sc; 269 { 270 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 271 int error = 0; 272 u_char rxstat; 273 u_char rxmask; 274 275 rxstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT); 276 rxmask = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK); 277 278 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT, XE_RXSTAT_CLEAR); 279 280 #if 0 281 DPRINTF(("%s: rx interrupt, rxstat = %b\n", 282 sc->sc_dev.dv_xname, rxstat, XE_RXSTAT_BITS)); 283 #endif 284 285 if (rxstat & XE_RXSTAT_RESET) { 286 DPRINTF(("%s: rx reset packet\n", 287 sc->sc_dev.dv_xname)); 288 error++; 289 } 290 if (rxstat & XE_RXSTAT_SHORT) { 291 DPRINTF(("%s: rx short packet\n", 292 sc->sc_dev.dv_xname)); 293 error++; 294 } 295 if (rxstat & XE_RXSTAT_ALIGNERR) { 296 DPRINTF(("%s: rx alignment error\n", 297 sc->sc_dev.dv_xname)); 298 error++; 299 } 300 if (rxstat & XE_RXSTAT_CRCERR) { 301 DPRINTF(("%s: rx CRC error\n", 302 sc->sc_dev.dv_xname)); 303 error++; 304 } 305 if (rxstat & XE_RXSTAT_OVERFLOW) { 306 DPRINTF(("%s: rx overflow error\n", 307 sc->sc_dev.dv_xname)); 308 error++; 309 } 310 311 if (error) { 312 ifp->if_ierrors++; 313 /* @@@ handle more gracefully, free memory, etc. */ 314 } 315 316 if (rxstat & XE_RXSTAT_OK) { 317 int s; 318 s = spldma(); 319 320 while(sc->sc_rx_handled_idx != sc->sc_rx_completed_idx) { 321 struct mbuf *m; 322 bus_dmamap_t map; 323 324 sc->sc_rx_handled_idx++; 325 sc->sc_rx_handled_idx %= MB8795_NRXBUFS; 326 327 /* Should probably not do this much while interrupts 328 * are disabled, but for now we will. 329 */ 330 331 map = sc->sc_rx_dmamap[sc->sc_rx_handled_idx]; 332 m = sc->sc_rx_mb_head[sc->sc_rx_handled_idx]; 333 334 bus_dmamap_sync(sc->sc_rx_dmat, map, 335 0, map->dm_mapsize, BUS_DMASYNC_POSTREAD); 336 337 338 /* Find receive length and chop off CRC */ 339 /* @@@ assumes packet is all in first segment 340 * also assumes segment length is length of packet. 341 * see comment in nextdma.c nextdma_intr(); 342 */ 343 m->m_pkthdr.len = map->dm_segs[0].ds_len-4; 344 m->m_len = map->dm_segs[0].ds_len-4; 345 m->m_pkthdr.rcvif = ifp; 346 347 bus_dmamap_unload(sc->sc_rx_dmat, map); 348 349 /* Install a fresh mbuf for next packet */ 350 351 sc->sc_rx_mb_head[sc->sc_rx_handled_idx] = 352 mb8795_rxdmamap_load(sc,map); 353 354 /* enable interrupts while we process the packet */ 355 splx(s); 356 357 #if defined(XE_DEBUG) 358 /* Peek at the packet */ 359 DPRINTF(("%s: received packet, at VA 0x%08x-0x%08x,len %d\n", 360 sc->sc_dev.dv_xname,mtod(m,u_char *),mtod(m,u_char *)+m->m_len,m->m_len)); 361 #if 0 362 hex_dump(mtod(m,u_char *), m->m_pkthdr.len < 255 ? m->m_pkthdr.len : 128 ); 363 #endif 364 #endif 365 366 { 367 ifp->if_ipackets++; 368 debugipkt++; 369 370 /* Pass the packet up. */ 371 (*ifp->if_input)(ifp, m); 372 } 373 374 s = spldma(); 375 376 } 377 378 splx(s); 379 380 } 381 382 DPRINTF(("%s: rx interrupt, rxstat = %b\n", 383 sc->sc_dev.dv_xname, rxstat, XE_RXSTAT_BITS)); 384 385 #if 0 && defined(XE_DEBUG) 386 { 387 DPRINTF(("rxstat = 0x%b\n", 388 bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT), XE_RXSTAT_BITS)); 389 DPRINTF(("rxmask = 0x%b\n", 390 bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK), XE_RXMASK_BITS)); 391 DPRINTF(("rxmode = 0x%b\n", 392 bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMODE), XE_RXMODE_BITS)); 393 } 394 #endif 395 396 return; 397 } 398 399 /* 400 * Controller transmit interrupt. 401 */ 402 void 403 mb8795_tint(sc) 404 struct mb8795_softc *sc; 405 406 { 407 int reset = 0; 408 u_char txstat; 409 u_char txmask; 410 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 411 412 txstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT); 413 txmask = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK); 414 415 #if 0 416 DPRINTF(("%s: tx interrupt, txstat = %b\n", 417 sc->sc_dev.dv_xname, txstat, XE_TXSTAT_BITS)); 418 #endif 419 420 if (txstat & XE_TXSTAT_SHORTED) { 421 printf("%s: tx cable shorted\n", sc->sc_dev.dv_xname); 422 ifp->if_oerrors++; 423 } 424 if (txstat & XE_TXSTAT_UNDERFLOW) { 425 printf("%s: tx underflow\n", sc->sc_dev.dv_xname); 426 ifp->if_oerrors++; 427 } 428 if (txstat & XE_TXSTAT_COLLERR) { 429 DPRINTF(("%s: tx collision\n", sc->sc_dev.dv_xname)); 430 ifp->if_collisions++; 431 } 432 if (txstat & XE_TXSTAT_COLLERR16) { 433 printf("%s: tx 16th collision\n", sc->sc_dev.dv_xname); 434 ifp->if_oerrors++; 435 ifp->if_collisions += 16; 436 } 437 438 if (reset) { 439 mb8795_reset(sc); 440 return; 441 } 442 443 #if 0 444 if (txstat & XE_TXSTAT_READY) { 445 446 panic("%s: unexpected tx interrupt %b", 447 sc->sc_dev.dv_xname,txstat,XE_TXSTAT_BITS); 448 449 /* turn interrupt off */ 450 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 451 txmask & ~XE_TXMASK_READYIE); 452 } 453 #endif 454 455 return; 456 } 457 458 /****************************************************************/ 459 460 void 461 mb8795_reset(sc) 462 struct mb8795_softc *sc; 463 { 464 int s; 465 466 s = splimp(); 467 mb8795_init(sc); 468 splx(s); 469 } 470 471 void 472 mb8795_watchdog(ifp) 473 struct ifnet *ifp; 474 { 475 struct mb8795_softc *sc = ifp->if_softc; 476 477 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 478 ++ifp->if_oerrors; 479 480 DPRINTF(("%s: %d input errors, %d input packets\n", 481 sc->sc_dev.dv_xname, ifp->if_ierrors, ifp->if_ipackets)); 482 483 mb8795_reset(sc); 484 } 485 486 /* 487 * Initialization of interface; set up initialization block 488 * and transmit/receive descriptor rings. 489 * @@@ error handling is bogus in here. memory leaks 490 */ 491 void 492 mb8795_init(sc) 493 struct mb8795_softc *sc; 494 { 495 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 496 497 m_freem(sc->sc_tx_mb_head); 498 sc->sc_tx_mb_head = NULL; 499 sc->sc_tx_loaded = 0; 500 501 { 502 int i; 503 for(i=0;i<MB8795_NRXBUFS;i++) { 504 if (sc->sc_rx_mb_head[i]) { 505 bus_dmamap_unload(sc->sc_rx_dmat, sc->sc_rx_dmamap[i]); 506 m_freem(sc->sc_rx_mb_head[i]); 507 } 508 sc->sc_rx_mb_head[i] = 509 mb8795_rxdmamap_load(sc, sc->sc_rx_dmamap[i]); 510 } 511 sc->sc_rx_loaded_idx = 0; 512 sc->sc_rx_completed_idx = 0; 513 sc->sc_rx_handled_idx = 0; 514 } 515 516 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RESET, XE_RESET_MODE); 517 518 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMODE, XE_TXMODE_LB_DISABLE); 519 #if 0 /* This interrupt was sometimes failing to ack correctly 520 * causing a loop @@@ 521 */ 522 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 523 XE_TXMASK_UNDERFLOWIE | XE_TXMASK_COLLIE | XE_TXMASK_COLL16IE 524 | XE_TXMASK_PARERRIE); 525 #else 526 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 0); 527 #endif 528 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT, XE_TXSTAT_CLEAR); 529 530 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXMODE, XE_RXMODE_NORMAL); 531 532 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK, 533 XE_RXMASK_OKIE | XE_RXMASK_RESETIE | XE_RXMASK_SHORTIE | 534 XE_RXMASK_ALIGNERRIE | XE_RXMASK_CRCERRIE | XE_RXMASK_OVERFLOWIE); 535 536 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT, XE_RXSTAT_CLEAR); 537 538 { 539 int i; 540 for(i=0;i<sizeof(sc->sc_enaddr);i++) { 541 bus_space_write_1(sc->sc_bst,sc->sc_bsh,XE_ENADDR+i,sc->sc_enaddr[i]); 542 } 543 } 544 545 DPRINTF(("%s: initializing ethernet %02x:%02x:%02x:%02x:%02x:%02x, size=%d\n", 546 sc->sc_dev.dv_xname, 547 sc->sc_enaddr[0],sc->sc_enaddr[1],sc->sc_enaddr[2], 548 sc->sc_enaddr[3],sc->sc_enaddr[4],sc->sc_enaddr[5], 549 sizeof(sc->sc_enaddr))); 550 551 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RESET, 0); 552 553 ifp->if_flags |= IFF_RUNNING; 554 ifp->if_flags &= ~IFF_OACTIVE; 555 ifp->if_timer = 0; 556 557 nextdma_init(sc->sc_tx_nd); 558 nextdma_init(sc->sc_rx_nd); 559 560 nextdma_start(sc->sc_rx_nd, DMACSR_READ); 561 562 if (ifp->if_snd.ifq_head != NULL) { 563 mb8795_start(ifp); 564 } 565 } 566 567 void 568 mb8795_stop(sc) 569 struct mb8795_softc *sc; 570 { 571 printf("%s: stop not implemented\n", sc->sc_dev.dv_xname); 572 } 573 574 575 void 576 mb8795_shutdown(arg) 577 void *arg; 578 { 579 struct mb8795_softc *sc = (struct mb8795_softc *)arg; 580 mb8795_stop(sc); 581 } 582 583 /****************************************************************/ 584 int 585 mb8795_ioctl(ifp, cmd, data) 586 register struct ifnet *ifp; 587 u_long cmd; 588 caddr_t data; 589 { 590 register struct mb8795_softc *sc = ifp->if_softc; 591 struct ifaddr *ifa = (struct ifaddr *)data; 592 struct ifreq *ifr = (struct ifreq *)data; 593 int s, error = 0; 594 595 s = splimp(); 596 597 switch (cmd) { 598 599 case SIOCSIFADDR: 600 ifp->if_flags |= IFF_UP; 601 602 switch (ifa->ifa_addr->sa_family) { 603 #ifdef INET 604 case AF_INET: 605 mb8795_init(sc); 606 arp_ifinit(ifp, ifa); 607 break; 608 #endif 609 #ifdef NS 610 case AF_NS: 611 { 612 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 613 614 if (ns_nullhost(*ina)) 615 ina->x_host = 616 *(union ns_host *)LLADDR(ifp->if_sadl); 617 else { 618 bcopy(ina->x_host.c_host, 619 LLADDR(ifp->if_sadl), 620 sizeof(sc->sc_enaddr)); 621 } 622 /* Set new address. */ 623 mb8795_init(sc); 624 break; 625 } 626 #endif 627 default: 628 mb8795_init(sc); 629 break; 630 } 631 break; 632 633 #if defined(CCITT) && defined(LLC) 634 case SIOCSIFCONF_X25: 635 ifp->if_flags |= IFF_UP; 636 ifa->ifa_rtrequest = cons_rtrequest; /* XXX */ 637 error = x25_llcglue(PRC_IFUP, ifa->ifa_addr); 638 if (error == 0) 639 mb8795_init(sc); 640 break; 641 #endif /* CCITT && LLC */ 642 643 case SIOCSIFFLAGS: 644 if ((ifp->if_flags & IFF_UP) == 0 && 645 (ifp->if_flags & IFF_RUNNING) != 0) { 646 /* 647 * If interface is marked down and it is running, then 648 * stop it. 649 */ 650 mb8795_stop(sc); 651 ifp->if_flags &= ~IFF_RUNNING; 652 } else if ((ifp->if_flags & IFF_UP) != 0 && 653 (ifp->if_flags & IFF_RUNNING) == 0) { 654 /* 655 * If interface is marked up and it is stopped, then 656 * start it. 657 */ 658 mb8795_init(sc); 659 } else { 660 /* 661 * Reset the interface to pick up changes in any other 662 * flags that affect hardware registers. 663 */ 664 /*mb8795_stop(sc);*/ 665 mb8795_init(sc); 666 } 667 #ifdef XE_DEBUG 668 if (ifp->if_flags & IFF_DEBUG) 669 sc->sc_debug = 1; 670 else 671 sc->sc_debug = 0; 672 #endif 673 break; 674 675 case SIOCADDMULTI: 676 case SIOCDELMULTI: 677 error = (cmd == SIOCADDMULTI) ? 678 ether_addmulti(ifr, &sc->sc_ethercom) : 679 ether_delmulti(ifr, &sc->sc_ethercom); 680 681 if (error == ENETRESET) { 682 /* 683 * Multicast list has changed; set the hardware filter 684 * accordingly. 685 */ 686 mb8795_reset(sc); 687 error = 0; 688 } 689 break; 690 691 #if 0 692 case SIOCGIFMEDIA: 693 case SIOCSIFMEDIA: 694 error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd); 695 break; 696 #endif 697 698 default: 699 error = EINVAL; 700 break; 701 } 702 703 splx(s); 704 705 #if 0 706 DPRINTF(("DEBUG: mb8795_ioctl(0x%lx) returning %d\n", 707 cmd,error)); 708 #endif 709 710 return (error); 711 } 712 713 /* 714 * Setup output on interface. 715 * Get another datagram to send off of the interface queue, and map it to the 716 * interface before starting the output. 717 * Called only at splimp or interrupt level. 718 */ 719 void 720 mb8795_start(ifp) 721 struct ifnet *ifp; 722 { 723 int error; 724 struct mb8795_softc *sc = ifp->if_softc; 725 726 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 727 return; 728 729 DPRINTF(("%s: mb8795_start()\n",sc->sc_dev.dv_xname)); 730 731 #if (defined(DIAGNOSTIC)) 732 { 733 u_char txstat; 734 txstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT); 735 if (!(txstat & XE_TXSTAT_READY)) { 736 /* @@@ I used to panic here, but then it paniced once. 737 * Let's see if I can just reset instead. [ dbj 980706.1900 ] 738 */ 739 printf("%s: transmitter not ready\n", sc->sc_dev.dv_xname); 740 mb8795_reset(sc); 741 return; 742 } 743 } 744 #endif 745 746 #if 0 747 return; /* @@@ Turn off xmit for debugging */ 748 #endif 749 750 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT, XE_TXSTAT_CLEAR); 751 752 IF_DEQUEUE(&ifp->if_snd, sc->sc_tx_mb_head); 753 if (sc->sc_tx_mb_head == 0) { 754 printf("%s: No packet to start\n", 755 sc->sc_dev.dv_xname); 756 return; 757 } 758 759 ifp->if_timer = 5; 760 761 /* The following is a next specific hack that should 762 * probably be moved out of MI code. 763 * This macro assumes it can move forward as needed 764 * in the buffer. Perhaps it should zero the extra buffer. 765 */ 766 #define REALIGN_DMABUF(s,l) \ 767 { (s) = ((u_char *)(((unsigned)(s)+DMA_BEGINALIGNMENT-1) \ 768 &~(DMA_BEGINALIGNMENT-1))); \ 769 (l) = ((u_char *)(((unsigned)((s)+(l))+DMA_ENDALIGNMENT-1) \ 770 &~(DMA_ENDALIGNMENT-1)))-(s);} 771 772 #if 0 773 error = bus_dmamap_load_mbuf(sc->sc_tx_dmat, 774 sc->sc_tx_dmamap, 775 sc->sc_tx_mb_head, 776 BUS_DMA_NOWAIT); 777 #else 778 { 779 u_char *buf = sc->sc_txbuf; 780 int buflen = 0; 781 struct mbuf *m = sc->sc_tx_mb_head; 782 buflen = m->m_pkthdr.len; 783 784 /* Fix runt packets, @@@ memory overrun */ 785 if (buflen < ETHERMIN+sizeof(struct ether_header)) { 786 buflen = ETHERMIN+sizeof(struct ether_header); 787 } 788 789 buflen += 15; 790 REALIGN_DMABUF(buf,buflen); 791 if (buflen > 1520) { 792 panic("%s: packet too long\n",sc->sc_dev.dv_xname); 793 } 794 795 { 796 u_char *p = buf; 797 for (m=sc->sc_tx_mb_head; m; m = m->m_next) { 798 if (m->m_len == 0) continue; 799 bcopy(mtod(m, u_char *), p, m->m_len); 800 p += m->m_len; 801 } 802 } 803 804 error = bus_dmamap_load(sc->sc_tx_dmat, sc->sc_tx_dmamap, 805 buf,buflen,NULL,BUS_DMA_NOWAIT); 806 } 807 #endif 808 if (error) { 809 printf("%s: can't load mbuf chain, error = %d\n", 810 sc->sc_dev.dv_xname, error); 811 m_freem(sc->sc_tx_mb_head); 812 sc->sc_tx_mb_head = NULL; 813 return; 814 } 815 816 #ifdef DIAGNOSTIC 817 if (sc->sc_tx_loaded != 0) { 818 panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname, 819 sc->sc_tx_loaded); 820 } 821 #endif 822 823 ifp->if_flags |= IFF_OACTIVE; 824 825 bus_dmamap_sync(sc->sc_tx_dmat, sc->sc_tx_dmamap, 0, 826 sc->sc_tx_dmamap->dm_mapsize, BUS_DMASYNC_PREWRITE); 827 828 nextdma_start(sc->sc_tx_nd, DMACSR_WRITE); 829 830 #if NBPFILTER > 0 831 /* 832 * Pass packet to bpf if there is a listener. 833 */ 834 if (ifp->if_bpf) 835 bpf_mtap(ifp->if_bpf, sc->sc_tx_mb_head); 836 #endif 837 838 } 839 840 /****************************************************************/ 841 842 void 843 mb8795_txdma_completed(map, arg) 844 bus_dmamap_t map; 845 void *arg; 846 { 847 struct mb8795_softc *sc = arg; 848 849 DPRINTF(("%s: mb8795_txdma_completed()\n",sc->sc_dev.dv_xname)); 850 851 #ifdef DIAGNOSTIC 852 if (!sc->sc_tx_loaded) { 853 panic("%s: tx completed never loaded ",sc->sc_dev.dv_xname); 854 } 855 if (map != sc->sc_tx_dmamap) { 856 panic("%s: unexpected tx completed map",sc->sc_dev.dv_xname); 857 } 858 859 #endif 860 } 861 862 void 863 mb8795_txdma_shutdown(arg) 864 void *arg; 865 { 866 struct mb8795_softc *sc = arg; 867 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 868 869 DPRINTF(("%s: mb8795_txdma_shutdown()\n",sc->sc_dev.dv_xname)); 870 871 #ifdef DIAGNOSTIC 872 if (!sc->sc_tx_loaded) { 873 panic("%s: tx shutdown never loaded ",sc->sc_dev.dv_xname); 874 } 875 #endif 876 877 { 878 879 if (sc->sc_tx_loaded) { 880 bus_dmamap_sync(sc->sc_tx_dmat, sc->sc_tx_dmamap, 881 0, sc->sc_tx_dmamap->dm_mapsize, 882 BUS_DMASYNC_POSTWRITE); 883 bus_dmamap_unload(sc->sc_tx_dmat, sc->sc_tx_dmamap); 884 m_freem(sc->sc_tx_mb_head); 885 sc->sc_tx_mb_head = NULL; 886 887 sc->sc_tx_loaded--; 888 } 889 890 #ifdef DIAGNOSTIC 891 if (sc->sc_tx_loaded != 0) { 892 panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname, 893 sc->sc_tx_loaded); 894 } 895 #endif 896 897 ifp->if_flags &= ~IFF_OACTIVE; 898 899 ifp->if_timer = 0; 900 901 if (ifp->if_snd.ifq_head != NULL) { 902 mb8795_start(ifp); 903 } 904 905 } 906 907 #if 0 908 /* Enable ready interrupt */ 909 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 910 bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK) 911 | XE_TXMASK_READYIE); 912 #endif 913 } 914 915 916 void 917 mb8795_rxdma_completed(map, arg) 918 bus_dmamap_t map; 919 void *arg; 920 { 921 struct mb8795_softc *sc = arg; 922 923 sc->sc_rx_completed_idx++; 924 sc->sc_rx_completed_idx %= MB8795_NRXBUFS; 925 926 DPRINTF(("%s: mb8795_rxdma_completed(), sc->sc_rx_completed_idx = %d\n", 927 sc->sc_dev.dv_xname, sc->sc_rx_completed_idx)); 928 929 #if (defined(DIAGNOSTIC)) 930 if (map != sc->sc_rx_dmamap[sc->sc_rx_completed_idx]) { 931 panic("%s: Unexpected rx dmamap completed\n", 932 sc->sc_dev.dv_xname); 933 } 934 #endif 935 } 936 937 void 938 mb8795_rxdma_shutdown(arg) 939 void *arg; 940 { 941 struct mb8795_softc *sc = arg; 942 943 panic("%s: mb8795_rxdma_shutdown() unexpected", sc->sc_dev.dv_xname); 944 } 945 946 947 /* 948 * load a dmamap with a freshly allocated mbuf 949 */ 950 struct mbuf * 951 mb8795_rxdmamap_load(sc,map) 952 struct mb8795_softc *sc; 953 bus_dmamap_t map; 954 { 955 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 956 struct mbuf *m; 957 int error; 958 959 MGETHDR(m, M_DONTWAIT, MT_DATA); 960 if (m) { 961 MCLGET(m, M_DONTWAIT); 962 if ((m->m_flags & M_EXT) == 0) { 963 m_freem(m); 964 m = NULL; 965 } else { 966 m->m_len = MCLBYTES; 967 } 968 } 969 if (!m) { 970 /* @@@ Handle this gracefully by reusing a scratch buffer 971 * or something. 972 */ 973 panic("Unable to get memory for incoming ethernet\n"); 974 } 975 976 /* Align buffer, @@@ next specific. 977 * perhaps should be using M_ALIGN here instead? 978 * First we give us a little room to align with. 979 */ 980 { 981 u_char *buf = m->m_data; 982 int buflen = m->m_len; 983 buflen -= DMA_ENDALIGNMENT+DMA_BEGINALIGNMENT; 984 REALIGN_DMABUF(buf, buflen); 985 m->m_data = buf; 986 m->m_len = buflen; 987 } 988 989 m->m_pkthdr.rcvif = ifp; 990 m->m_pkthdr.len = m->m_len; 991 992 error = bus_dmamap_load_mbuf(sc->sc_rx_dmat, 993 map, m, BUS_DMA_NOWAIT); 994 995 bus_dmamap_sync(sc->sc_rx_dmat, map, 0, 996 map->dm_mapsize, BUS_DMASYNC_PREREAD); 997 998 if (error) { 999 DPRINTF(("DEBUG: m->m_data = 0x%08x, m->m_len = %d\n", 1000 m->m_data, m->m_len)); 1001 DPRINTF(("DEBUG: MCLBYTES = %d, map->_dm_size = %d\n", 1002 MCLBYTES, map->_dm_size)); 1003 1004 panic("%s: can't load rx mbuf chain, error = %d\n", 1005 sc->sc_dev.dv_xname, error); 1006 m_freem(m); 1007 m = NULL; 1008 } 1009 1010 return(m); 1011 } 1012 1013 bus_dmamap_t 1014 mb8795_rxdma_continue(arg) 1015 void *arg; 1016 { 1017 struct mb8795_softc *sc = arg; 1018 bus_dmamap_t map = NULL; 1019 1020 /* 1021 * Currently, starts dumping new packets if the buffers 1022 * fill up. This should probably reclaim unhandled 1023 * buffers instead so we drop older packets instead 1024 * of newer ones. 1025 */ 1026 if (((sc->sc_rx_loaded_idx+1)%MB8795_NRXBUFS) != sc->sc_rx_handled_idx) { 1027 sc->sc_rx_loaded_idx++; 1028 sc->sc_rx_loaded_idx %= MB8795_NRXBUFS; 1029 map = sc->sc_rx_dmamap[sc->sc_rx_loaded_idx]; 1030 1031 DPRINTF(("%s: mb8795_rxdma_continue() sc->sc_rx_loaded_idx = %d\nn", 1032 sc->sc_dev.dv_xname,sc->sc_rx_loaded_idx)); 1033 } 1034 #if (defined(DIAGNOSTIC)) 1035 else { 1036 printf("%s: out of receive DMA buffers\n",sc->sc_dev.dv_xname); 1037 } 1038 #endif 1039 1040 return(map); 1041 } 1042 1043 bus_dmamap_t 1044 mb8795_txdma_continue(arg) 1045 void *arg; 1046 { 1047 struct mb8795_softc *sc = arg; 1048 bus_dmamap_t map; 1049 1050 DPRINTF(("%s: mb8795_txdma_continue()\n",sc->sc_dev.dv_xname)); 1051 1052 if (sc->sc_tx_loaded) { 1053 map = NULL; 1054 } else { 1055 map = sc->sc_tx_dmamap; 1056 sc->sc_tx_loaded++; 1057 } 1058 1059 #ifdef DIAGNOSTIC 1060 if (sc->sc_tx_loaded != 1) { 1061 panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname, 1062 sc->sc_tx_loaded); 1063 } 1064 #endif 1065 1066 return(map); 1067 } 1068 1069 1070 /****************************************************************/ 1071 #if 0 1072 int 1073 mb8795_mediachange(ifp) 1074 struct ifnet *ifp; 1075 { 1076 struct mb8795_softc *sc = ifp->if_softc; 1077 1078 if (sc->sc_mediachange) 1079 return ((*sc->sc_mediachange)(sc)); 1080 return (0); 1081 } 1082 1083 void 1084 mb8795_mediastatus(ifp, ifmr) 1085 struct ifnet *ifp; 1086 struct ifmediareq *ifmr; 1087 { 1088 struct mb8795_softc *sc = ifp->if_softc; 1089 1090 if ((ifp->if_flags & IFF_UP) == 0) 1091 return; 1092 1093 ifmr->ifm_status = IFM_AVALID; 1094 if (sc->sc_havecarrier) 1095 ifmr->ifm_status |= IFM_ACTIVE; 1096 1097 if (sc->sc_mediastatus) 1098 (*sc->sc_mediastatus)(sc, ifmr); 1099 } 1100 #endif 1101 /****************************************************************/ 1102
Indexes created Wed Oct 15 03:09:54 GMT 2025