mb8795.c revision 1.16
1 /* $NetBSD: mb8795.c,v 1.16 1999/08/28 09:19:05 dbj Exp $ */ 2 /* 3 * Copyright (c) 1998 Darrin B. Jewell 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Darrin B. Jewell 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include "opt_inet.h" 33 #include "opt_ccitt.h" 34 #include "opt_llc.h" 35 #include "opt_ns.h" 36 #include "bpfilter.h" 37 #include "rnd.h" 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/mbuf.h> 42 #include <sys/syslog.h> 43 #include <sys/socket.h> 44 #include <sys/device.h> 45 #include <sys/malloc.h> 46 #include <sys/ioctl.h> 47 #include <sys/errno.h> 48 #if NRND > 0 49 #include <sys/rnd.h> 50 #endif 51 52 #include <net/if.h> 53 #include <net/if_dl.h> 54 #include <net/if_ether.h> 55 56 #if 0 57 #include <net/if_media.h> 58 #endif 59 60 #ifdef INET 61 #include <netinet/in.h> 62 #include <netinet/if_inarp.h> 63 #include <netinet/in_systm.h> 64 #include <netinet/in_var.h> 65 #include <netinet/ip.h> 66 #endif 67 68 #ifdef NS 69 #include <netns/ns.h> 70 #include <netns/ns_if.h> 71 #endif 72 73 #if defined(CCITT) && defined(LLC) 74 #include <sys/socketvar.h> 75 #include <netccitt/x25.h> 76 #include <netccitt/pk.h> 77 #include <netccitt/pk_var.h> 78 #include <netccitt/pk_extern.h> 79 #endif 80 81 #if NBPFILTER > 0 82 #include <net/bpf.h> 83 #include <net/bpfdesc.h> 84 #endif 85 86 #include <machine/cpu.h> 87 #include <machine/bus.h> 88 #include <machine/intr.h> 89 90 /* @@@ this is here for the REALIGN_DMABUF hack below */ 91 #include "nextdmareg.h" 92 #include "nextdmavar.h" 93 94 #include "mb8795reg.h" 95 #include "mb8795var.h" 96 97 #if 0 98 #define XE_DEBUG 99 #endif 100 101 #ifdef XE_DEBUG 102 #define DPRINTF(x) printf x; 103 #else 104 #define DPRINTF(x) 105 #endif 106 107 108 /* 109 * Support for 110 * Fujitsu Ethernet Data Link Controller (MB8795) 111 * and the Fujitsu Manchester Encoder/Decoder (MB502). 112 */ 113 114 int debugipkt = 0; 115 116 117 void mb8795_shutdown __P((void *)); 118 119 #if 0 120 int mb8795_mediachange __P((struct ifnet *)); 121 void mb8795_mediastatus __P((struct ifnet *, struct ifmediareq *)); 122 #endif 123 124 struct mbuf * mb8795_rxdmamap_load __P((struct mb8795_softc *, 125 bus_dmamap_t map)); 126 127 bus_dmamap_t mb8795_rxdma_continue __P((void *)); 128 void mb8795_rxdma_completed __P((bus_dmamap_t,void *)); 129 bus_dmamap_t mb8795_txdma_continue __P((void *)); 130 void mb8795_txdma_completed __P((bus_dmamap_t,void *)); 131 void mb8795_rxdma_shutdown __P((void *)); 132 void mb8795_txdma_shutdown __P((void *)); 133 bus_dmamap_t mb8795_txdma_restart __P((bus_dmamap_t,void *)); 134 135 void 136 mb8795_config(sc) 137 struct mb8795_softc *sc; 138 { 139 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 140 141 DPRINTF(("%s: mb8795_config()\n",sc->sc_dev.dv_xname)); 142 143 /* Initialize ifnet structure. */ 144 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 145 ifp->if_softc = sc; 146 ifp->if_start = mb8795_start; 147 ifp->if_ioctl = mb8795_ioctl; 148 ifp->if_watchdog = mb8795_watchdog; 149 ifp->if_flags = 150 IFF_BROADCAST | IFF_NOTRAILERS; 151 152 #if 0 153 /* Initialize ifmedia structures. */ 154 ifmedia_init(&sc->sc_media, 0, mb8795_mediachange, mb8795_mediastatus); 155 if (sc->sc_supmedia != NULL) { 156 int i; 157 for (i = 0; i < sc->sc_nsupmedia; i++) 158 ifmedia_add(&sc->sc_media, sc->sc_supmedia[i], 159 0, NULL); 160 ifmedia_set(&sc->sc_media, sc->sc_defaultmedia); 161 } else { 162 ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_MANUAL, 0, NULL); 163 ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_MANUAL); 164 } 165 #endif 166 167 /* Attach the interface. */ 168 if_attach(ifp); 169 ether_ifattach(ifp, sc->sc_enaddr); 170 171 /* decrease the mtu on this interface to deal with 172 * alignment problems 173 */ 174 ifp->if_mtu -= 16; 175 176 #if NBPFILTER > 0 177 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 178 #endif 179 180 sc->sc_sh = shutdownhook_establish(mb8795_shutdown, sc); 181 if (sc->sc_sh == NULL) 182 panic("mb8795_config: can't establish shutdownhook"); 183 184 #if NRND > 0 185 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 186 RND_TYPE_NET, 0); 187 #endif 188 189 /* Initialize the dma maps */ 190 { 191 int error; 192 if ((error = bus_dmamap_create(sc->sc_tx_dmat, MCLBYTES, 193 (MCLBYTES/MSIZE), MCLBYTES, 0, BUS_DMA_ALLOCNOW, 194 &sc->sc_tx_dmamap)) != 0) { 195 panic("%s: can't create tx DMA map, error = %d\n", 196 sc->sc_dev.dv_xname, error); 197 } 198 { 199 int i; 200 for(i=0;i<MB8795_NRXBUFS;i++) { 201 if ((error = bus_dmamap_create(sc->sc_rx_dmat, MCLBYTES, 202 (MCLBYTES/MSIZE), MCLBYTES, 0, BUS_DMA_ALLOCNOW, 203 &sc->sc_rx_dmamap[i])) != 0) { 204 panic("%s: can't create rx DMA map, error = %d\n", 205 sc->sc_dev.dv_xname, error); 206 } 207 sc->sc_rx_mb_head[i] = NULL; 208 } 209 sc->sc_rx_loaded_idx = 0; 210 sc->sc_rx_completed_idx = 0; 211 sc->sc_rx_handled_idx = 0; 212 } 213 } 214 215 /* @@@ more next hacks 216 * the 2000 covers at least a 1500 mtu + headers 217 * + DMA_BEGINALIGNMENT+ DMA_ENDALIGNMENT 218 */ 219 sc->sc_txbuf = malloc(2000, M_DEVBUF, M_NOWAIT); 220 if (!sc->sc_txbuf) panic("%s: can't malloc tx DMA buffer", 221 sc->sc_dev.dv_xname); 222 223 sc->sc_tx_mb_head = NULL; 224 sc->sc_tx_loaded = 0; 225 226 sc->sc_tx_nd->nd_shutdown_cb = mb8795_txdma_shutdown; 227 sc->sc_tx_nd->nd_continue_cb = mb8795_txdma_continue; 228 sc->sc_tx_nd->nd_completed_cb = mb8795_txdma_completed; 229 sc->sc_tx_nd->nd_cb_arg = sc; 230 231 sc->sc_rx_nd->nd_shutdown_cb = mb8795_rxdma_shutdown; 232 sc->sc_rx_nd->nd_continue_cb = mb8795_rxdma_continue; 233 sc->sc_rx_nd->nd_completed_cb = mb8795_rxdma_completed; 234 sc->sc_rx_nd->nd_cb_arg = sc; 235 236 DPRINTF(("%s: leaving mb8795_config()\n",sc->sc_dev.dv_xname)); 237 } 238 239 240 /****************************************************************/ 241 #if 0 242 #define XCHR(x) "0123456789abcdef"[(x) & 0xf] 243 static void 244 hex_dump(unsigned char *pkt, size_t len) 245 { 246 size_t i, j; 247 248 printf("0000: "); 249 for(i=0; i<len; i++) { 250 printf("%c%c ", XCHR(pkt[i]>>4), XCHR(pkt[i])); 251 if ((i+1) % 16 == 0) { 252 printf(" %c", '"'); 253 for(j=0; j<16; j++) 254 printf("%c", pkt[i-15+j]>=32 && pkt[i-15+j]<127?pkt[i-15+j]:'.'); 255 printf("%c\n%c%c%c%c: ", '"', XCHR((i+1)>>12), 256 XCHR((i+1)>>8), XCHR((i+1)>>4), XCHR(i+1)); 257 } 258 } 259 printf("\n"); 260 } 261 #endif 262 263 /* 264 * Controller receive interrupt. 265 */ 266 void 267 mb8795_rint(sc) 268 struct mb8795_softc *sc; 269 { 270 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 271 int error = 0; 272 u_char rxstat; 273 u_char rxmask; 274 275 rxstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT); 276 rxmask = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK); 277 278 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT, XE_RXSTAT_CLEAR); 279 280 #if 0 281 DPRINTF(("%s: rx interrupt, rxstat = %b\n", 282 sc->sc_dev.dv_xname, rxstat, XE_RXSTAT_BITS)); 283 #endif 284 285 if (rxstat & XE_RXSTAT_RESET) { 286 DPRINTF(("%s: rx reset packet\n", 287 sc->sc_dev.dv_xname)); 288 error++; 289 } 290 if (rxstat & XE_RXSTAT_SHORT) { 291 DPRINTF(("%s: rx short packet\n", 292 sc->sc_dev.dv_xname)); 293 error++; 294 } 295 if (rxstat & XE_RXSTAT_ALIGNERR) { 296 DPRINTF(("%s: rx alignment error\n", 297 sc->sc_dev.dv_xname)); 298 error++; 299 } 300 if (rxstat & XE_RXSTAT_CRCERR) { 301 DPRINTF(("%s: rx CRC error\n", 302 sc->sc_dev.dv_xname)); 303 error++; 304 } 305 if (rxstat & XE_RXSTAT_OVERFLOW) { 306 DPRINTF(("%s: rx overflow error\n", 307 sc->sc_dev.dv_xname)); 308 error++; 309 } 310 311 if (error) { 312 ifp->if_ierrors++; 313 /* @@@ handle more gracefully, free memory, etc. */ 314 } 315 316 if (rxstat & XE_RXSTAT_OK) { 317 int s; 318 s = spldma(); 319 320 while(sc->sc_rx_handled_idx != sc->sc_rx_completed_idx) { 321 struct mbuf *m; 322 bus_dmamap_t map; 323 324 sc->sc_rx_handled_idx++; 325 sc->sc_rx_handled_idx %= MB8795_NRXBUFS; 326 327 /* Should probably not do this much while interrupts 328 * are disabled, but for now we will. 329 */ 330 331 map = sc->sc_rx_dmamap[sc->sc_rx_handled_idx]; 332 m = sc->sc_rx_mb_head[sc->sc_rx_handled_idx]; 333 334 bus_dmamap_sync(sc->sc_rx_dmat, map, 335 0, map->dm_mapsize, BUS_DMASYNC_POSTREAD); 336 337 338 /* Find receive length and chop off CRC */ 339 /* @@@ assumes packet is all in first segment 340 */ 341 m->m_pkthdr.len = map->dm_segs[0].ds_xfer_len-4; 342 m->m_len = map->dm_segs[0].ds_xfer_len-4; 343 m->m_pkthdr.rcvif = ifp; 344 345 bus_dmamap_unload(sc->sc_rx_dmat, map); 346 347 /* Install a fresh mbuf for next packet */ 348 349 sc->sc_rx_mb_head[sc->sc_rx_handled_idx] = 350 mb8795_rxdmamap_load(sc,map); 351 352 /* enable interrupts while we process the packet */ 353 splx(s); 354 355 #if defined(XE_DEBUG) 356 /* Peek at the packet */ 357 DPRINTF(("%s: received packet, at VA 0x%08x-0x%08x,len %d\n", 358 sc->sc_dev.dv_xname,mtod(m,u_char *),mtod(m,u_char *)+m->m_len,m->m_len)); 359 #if 0 360 hex_dump(mtod(m,u_char *), m->m_pkthdr.len < 255 ? m->m_pkthdr.len : 128 ); 361 #endif 362 #endif 363 364 { 365 ifp->if_ipackets++; 366 debugipkt++; 367 368 /* Pass the packet up. */ 369 (*ifp->if_input)(ifp, m); 370 } 371 372 s = spldma(); 373 374 } 375 376 splx(s); 377 378 } 379 380 DPRINTF(("%s: rx interrupt, rxstat = %b\n", 381 sc->sc_dev.dv_xname, rxstat, XE_RXSTAT_BITS)); 382 383 #if 0 && defined(XE_DEBUG) 384 { 385 DPRINTF(("rxstat = 0x%b\n", 386 bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT), XE_RXSTAT_BITS)); 387 DPRINTF(("rxmask = 0x%b\n", 388 bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK), XE_RXMASK_BITS)); 389 DPRINTF(("rxmode = 0x%b\n", 390 bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMODE), XE_RXMODE_BITS)); 391 } 392 #endif 393 394 return; 395 } 396 397 /* 398 * Controller transmit interrupt. 399 */ 400 void 401 mb8795_tint(sc) 402 struct mb8795_softc *sc; 403 404 { 405 int reset = 0; 406 u_char txstat; 407 u_char txmask; 408 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 409 410 txstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT); 411 txmask = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK); 412 413 #if 0 414 DPRINTF(("%s: tx interrupt, txstat = %b\n", 415 sc->sc_dev.dv_xname, txstat, XE_TXSTAT_BITS)); 416 #endif 417 418 if (txstat & XE_TXSTAT_SHORTED) { 419 printf("%s: tx cable shorted\n", sc->sc_dev.dv_xname); 420 ifp->if_oerrors++; 421 } 422 if (txstat & XE_TXSTAT_UNDERFLOW) { 423 printf("%s: tx underflow\n", sc->sc_dev.dv_xname); 424 ifp->if_oerrors++; 425 } 426 if (txstat & XE_TXSTAT_COLLERR) { 427 DPRINTF(("%s: tx collision\n", sc->sc_dev.dv_xname)); 428 ifp->if_collisions++; 429 } 430 if (txstat & XE_TXSTAT_COLLERR16) { 431 printf("%s: tx 16th collision\n", sc->sc_dev.dv_xname); 432 ifp->if_oerrors++; 433 ifp->if_collisions += 16; 434 } 435 436 if (reset) { 437 mb8795_reset(sc); 438 return; 439 } 440 441 #if 0 442 if (txstat & XE_TXSTAT_READY) { 443 444 panic("%s: unexpected tx interrupt %b", 445 sc->sc_dev.dv_xname,txstat,XE_TXSTAT_BITS); 446 447 /* turn interrupt off */ 448 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 449 txmask & ~XE_TXMASK_READYIE); 450 } 451 #endif 452 453 return; 454 } 455 456 /****************************************************************/ 457 458 void 459 mb8795_reset(sc) 460 struct mb8795_softc *sc; 461 { 462 int s; 463 464 s = splimp(); 465 mb8795_init(sc); 466 splx(s); 467 } 468 469 void 470 mb8795_watchdog(ifp) 471 struct ifnet *ifp; 472 { 473 struct mb8795_softc *sc = ifp->if_softc; 474 475 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 476 ++ifp->if_oerrors; 477 478 DPRINTF(("%s: %d input errors, %d input packets\n", 479 sc->sc_dev.dv_xname, ifp->if_ierrors, ifp->if_ipackets)); 480 481 mb8795_reset(sc); 482 } 483 484 /* 485 * Initialization of interface; set up initialization block 486 * and transmit/receive descriptor rings. 487 * @@@ error handling is bogus in here. memory leaks 488 */ 489 void 490 mb8795_init(sc) 491 struct mb8795_softc *sc; 492 { 493 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 494 495 m_freem(sc->sc_tx_mb_head); 496 sc->sc_tx_mb_head = NULL; 497 sc->sc_tx_loaded = 0; 498 499 { 500 int i; 501 for(i=0;i<MB8795_NRXBUFS;i++) { 502 if (sc->sc_rx_mb_head[i]) { 503 bus_dmamap_unload(sc->sc_rx_dmat, sc->sc_rx_dmamap[i]); 504 m_freem(sc->sc_rx_mb_head[i]); 505 } 506 sc->sc_rx_mb_head[i] = 507 mb8795_rxdmamap_load(sc, sc->sc_rx_dmamap[i]); 508 } 509 sc->sc_rx_loaded_idx = 0; 510 sc->sc_rx_completed_idx = 0; 511 sc->sc_rx_handled_idx = 0; 512 } 513 514 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RESET, XE_RESET_MODE); 515 516 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMODE, XE_TXMODE_LB_DISABLE); 517 #if 0 /* This interrupt was sometimes failing to ack correctly 518 * causing a loop @@@ 519 */ 520 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 521 XE_TXMASK_UNDERFLOWIE | XE_TXMASK_COLLIE | XE_TXMASK_COLL16IE 522 | XE_TXMASK_PARERRIE); 523 #else 524 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 0); 525 #endif 526 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT, XE_TXSTAT_CLEAR); 527 528 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXMODE, XE_RXMODE_NORMAL); 529 530 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK, 531 XE_RXMASK_OKIE | XE_RXMASK_RESETIE | XE_RXMASK_SHORTIE | 532 XE_RXMASK_ALIGNERRIE | XE_RXMASK_CRCERRIE | XE_RXMASK_OVERFLOWIE); 533 534 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT, XE_RXSTAT_CLEAR); 535 536 { 537 int i; 538 for(i=0;i<sizeof(sc->sc_enaddr);i++) { 539 bus_space_write_1(sc->sc_bst,sc->sc_bsh,XE_ENADDR+i,sc->sc_enaddr[i]); 540 } 541 } 542 543 DPRINTF(("%s: initializing ethernet %02x:%02x:%02x:%02x:%02x:%02x, size=%d\n", 544 sc->sc_dev.dv_xname, 545 sc->sc_enaddr[0],sc->sc_enaddr[1],sc->sc_enaddr[2], 546 sc->sc_enaddr[3],sc->sc_enaddr[4],sc->sc_enaddr[5], 547 sizeof(sc->sc_enaddr))); 548 549 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RESET, 0); 550 551 ifp->if_flags |= IFF_RUNNING; 552 ifp->if_flags &= ~IFF_OACTIVE; 553 ifp->if_timer = 0; 554 555 nextdma_init(sc->sc_tx_nd); 556 nextdma_init(sc->sc_rx_nd); 557 558 nextdma_start(sc->sc_rx_nd, DMACSR_SETREAD); 559 560 if (ifp->if_snd.ifq_head != NULL) { 561 mb8795_start(ifp); 562 } 563 } 564 565 void 566 mb8795_stop(sc) 567 struct mb8795_softc *sc; 568 { 569 printf("%s: stop not implemented\n", sc->sc_dev.dv_xname); 570 } 571 572 573 void 574 mb8795_shutdown(arg) 575 void *arg; 576 { 577 struct mb8795_softc *sc = (struct mb8795_softc *)arg; 578 mb8795_stop(sc); 579 } 580 581 /****************************************************************/ 582 int 583 mb8795_ioctl(ifp, cmd, data) 584 register struct ifnet *ifp; 585 u_long cmd; 586 caddr_t data; 587 { 588 register struct mb8795_softc *sc = ifp->if_softc; 589 struct ifaddr *ifa = (struct ifaddr *)data; 590 struct ifreq *ifr = (struct ifreq *)data; 591 int s, error = 0; 592 593 s = splimp(); 594 595 switch (cmd) { 596 597 case SIOCSIFADDR: 598 ifp->if_flags |= IFF_UP; 599 600 switch (ifa->ifa_addr->sa_family) { 601 #ifdef INET 602 case AF_INET: 603 mb8795_init(sc); 604 arp_ifinit(ifp, ifa); 605 break; 606 #endif 607 #ifdef NS 608 case AF_NS: 609 { 610 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 611 612 if (ns_nullhost(*ina)) 613 ina->x_host = 614 *(union ns_host *)LLADDR(ifp->if_sadl); 615 else { 616 bcopy(ina->x_host.c_host, 617 LLADDR(ifp->if_sadl), 618 sizeof(sc->sc_enaddr)); 619 } 620 /* Set new address. */ 621 mb8795_init(sc); 622 break; 623 } 624 #endif 625 default: 626 mb8795_init(sc); 627 break; 628 } 629 break; 630 631 #if defined(CCITT) && defined(LLC) 632 case SIOCSIFCONF_X25: 633 ifp->if_flags |= IFF_UP; 634 ifa->ifa_rtrequest = cons_rtrequest; /* XXX */ 635 error = x25_llcglue(PRC_IFUP, ifa->ifa_addr); 636 if (error == 0) 637 mb8795_init(sc); 638 break; 639 #endif /* CCITT && LLC */ 640 641 case SIOCSIFFLAGS: 642 if ((ifp->if_flags & IFF_UP) == 0 && 643 (ifp->if_flags & IFF_RUNNING) != 0) { 644 /* 645 * If interface is marked down and it is running, then 646 * stop it. 647 */ 648 mb8795_stop(sc); 649 ifp->if_flags &= ~IFF_RUNNING; 650 } else if ((ifp->if_flags & IFF_UP) != 0 && 651 (ifp->if_flags & IFF_RUNNING) == 0) { 652 /* 653 * If interface is marked up and it is stopped, then 654 * start it. 655 */ 656 mb8795_init(sc); 657 } else { 658 /* 659 * Reset the interface to pick up changes in any other 660 * flags that affect hardware registers. 661 */ 662 /*mb8795_stop(sc);*/ 663 mb8795_init(sc); 664 } 665 #ifdef XE_DEBUG 666 if (ifp->if_flags & IFF_DEBUG) 667 sc->sc_debug = 1; 668 else 669 sc->sc_debug = 0; 670 #endif 671 break; 672 673 case SIOCADDMULTI: 674 case SIOCDELMULTI: 675 error = (cmd == SIOCADDMULTI) ? 676 ether_addmulti(ifr, &sc->sc_ethercom) : 677 ether_delmulti(ifr, &sc->sc_ethercom); 678 679 if (error == ENETRESET) { 680 /* 681 * Multicast list has changed; set the hardware filter 682 * accordingly. 683 */ 684 mb8795_reset(sc); 685 error = 0; 686 } 687 break; 688 689 #if 0 690 case SIOCGIFMEDIA: 691 case SIOCSIFMEDIA: 692 error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd); 693 break; 694 #endif 695 696 default: 697 error = EINVAL; 698 break; 699 } 700 701 splx(s); 702 703 #if 0 704 DPRINTF(("DEBUG: mb8795_ioctl(0x%lx) returning %d\n", 705 cmd,error)); 706 #endif 707 708 return (error); 709 } 710 711 /* 712 * Setup output on interface. 713 * Get another datagram to send off of the interface queue, and map it to the 714 * interface before starting the output. 715 * Called only at splimp or interrupt level. 716 */ 717 void 718 mb8795_start(ifp) 719 struct ifnet *ifp; 720 { 721 int error; 722 struct mb8795_softc *sc = ifp->if_softc; 723 724 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 725 return; 726 727 DPRINTF(("%s: mb8795_start()\n",sc->sc_dev.dv_xname)); 728 729 #if (defined(DIAGNOSTIC)) 730 { 731 u_char txstat; 732 txstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT); 733 if (!(txstat & XE_TXSTAT_READY)) { 734 /* @@@ I used to panic here, but then it paniced once. 735 * Let's see if I can just reset instead. [ dbj 980706.1900 ] 736 */ 737 printf("%s: transmitter not ready\n", sc->sc_dev.dv_xname); 738 mb8795_reset(sc); 739 return; 740 } 741 } 742 #endif 743 744 #if 0 745 return; /* @@@ Turn off xmit for debugging */ 746 #endif 747 748 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT, XE_TXSTAT_CLEAR); 749 750 IF_DEQUEUE(&ifp->if_snd, sc->sc_tx_mb_head); 751 if (sc->sc_tx_mb_head == 0) { 752 printf("%s: No packet to start\n", 753 sc->sc_dev.dv_xname); 754 return; 755 } 756 757 ifp->if_timer = 5; 758 759 /* The following is a next specific hack that should 760 * probably be moved out of MI code. 761 * This macro assumes it can move forward as needed 762 * in the buffer. Perhaps it should zero the extra buffer. 763 */ 764 #define REALIGN_DMABUF(s,l) \ 765 { (s) = ((u_char *)(((unsigned)(s)+DMA_BEGINALIGNMENT-1) \ 766 &~(DMA_BEGINALIGNMENT-1))); \ 767 (l) = ((u_char *)(((unsigned)((s)+(l))+DMA_ENDALIGNMENT-1) \ 768 &~(DMA_ENDALIGNMENT-1)))-(s);} 769 770 #if 0 771 error = bus_dmamap_load_mbuf(sc->sc_tx_dmat, 772 sc->sc_tx_dmamap, 773 sc->sc_tx_mb_head, 774 BUS_DMA_NOWAIT); 775 #else 776 { 777 u_char *buf = sc->sc_txbuf; 778 int buflen = 0; 779 struct mbuf *m = sc->sc_tx_mb_head; 780 buflen = m->m_pkthdr.len; 781 782 /* Fix runt packets, @@@ memory overrun */ 783 if (buflen < ETHERMIN+sizeof(struct ether_header)) { 784 buflen = ETHERMIN+sizeof(struct ether_header); 785 } 786 787 buflen += 15; 788 REALIGN_DMABUF(buf,buflen); 789 if (buflen > 1520) { 790 panic("%s: packet too long\n",sc->sc_dev.dv_xname); 791 } 792 793 { 794 u_char *p = buf; 795 for (m=sc->sc_tx_mb_head; m; m = m->m_next) { 796 if (m->m_len == 0) continue; 797 bcopy(mtod(m, u_char *), p, m->m_len); 798 p += m->m_len; 799 } 800 } 801 802 error = bus_dmamap_load(sc->sc_tx_dmat, sc->sc_tx_dmamap, 803 buf,buflen,NULL,BUS_DMA_NOWAIT); 804 } 805 #endif 806 if (error) { 807 printf("%s: can't load mbuf chain, error = %d\n", 808 sc->sc_dev.dv_xname, error); 809 m_freem(sc->sc_tx_mb_head); 810 sc->sc_tx_mb_head = NULL; 811 return; 812 } 813 814 #ifdef DIAGNOSTIC 815 if (sc->sc_tx_loaded != 0) { 816 panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname, 817 sc->sc_tx_loaded); 818 } 819 #endif 820 821 ifp->if_flags |= IFF_OACTIVE; 822 823 bus_dmamap_sync(sc->sc_tx_dmat, sc->sc_tx_dmamap, 0, 824 sc->sc_tx_dmamap->dm_mapsize, BUS_DMASYNC_PREWRITE); 825 826 nextdma_start(sc->sc_tx_nd, DMACSR_SETWRITE); 827 828 #if NBPFILTER > 0 829 /* 830 * Pass packet to bpf if there is a listener. 831 */ 832 if (ifp->if_bpf) 833 bpf_mtap(ifp->if_bpf, sc->sc_tx_mb_head); 834 #endif 835 836 } 837 838 /****************************************************************/ 839 840 void 841 mb8795_txdma_completed(map, arg) 842 bus_dmamap_t map; 843 void *arg; 844 { 845 struct mb8795_softc *sc = arg; 846 847 DPRINTF(("%s: mb8795_txdma_completed()\n",sc->sc_dev.dv_xname)); 848 849 #ifdef DIAGNOSTIC 850 if (!sc->sc_tx_loaded) { 851 panic("%s: tx completed never loaded ",sc->sc_dev.dv_xname); 852 } 853 if (map != sc->sc_tx_dmamap) { 854 panic("%s: unexpected tx completed map",sc->sc_dev.dv_xname); 855 } 856 857 #endif 858 } 859 860 void 861 mb8795_txdma_shutdown(arg) 862 void *arg; 863 { 864 struct mb8795_softc *sc = arg; 865 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 866 867 DPRINTF(("%s: mb8795_txdma_shutdown()\n",sc->sc_dev.dv_xname)); 868 869 #ifdef DIAGNOSTIC 870 if (!sc->sc_tx_loaded) { 871 panic("%s: tx shutdown never loaded ",sc->sc_dev.dv_xname); 872 } 873 #endif 874 875 { 876 877 if (sc->sc_tx_loaded) { 878 bus_dmamap_sync(sc->sc_tx_dmat, sc->sc_tx_dmamap, 879 0, sc->sc_tx_dmamap->dm_mapsize, 880 BUS_DMASYNC_POSTWRITE); 881 bus_dmamap_unload(sc->sc_tx_dmat, sc->sc_tx_dmamap); 882 m_freem(sc->sc_tx_mb_head); 883 sc->sc_tx_mb_head = NULL; 884 885 sc->sc_tx_loaded--; 886 } 887 888 #ifdef DIAGNOSTIC 889 if (sc->sc_tx_loaded != 0) { 890 panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname, 891 sc->sc_tx_loaded); 892 } 893 #endif 894 895 ifp->if_flags &= ~IFF_OACTIVE; 896 897 ifp->if_timer = 0; 898 899 if (ifp->if_snd.ifq_head != NULL) { 900 mb8795_start(ifp); 901 } 902 903 } 904 905 #if 0 906 /* Enable ready interrupt */ 907 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 908 bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK) 909 | XE_TXMASK_READYIE); 910 #endif 911 } 912 913 914 void 915 mb8795_rxdma_completed(map, arg) 916 bus_dmamap_t map; 917 void *arg; 918 { 919 struct mb8795_softc *sc = arg; 920 921 sc->sc_rx_completed_idx++; 922 sc->sc_rx_completed_idx %= MB8795_NRXBUFS; 923 924 DPRINTF(("%s: mb8795_rxdma_completed(), sc->sc_rx_completed_idx = %d\n", 925 sc->sc_dev.dv_xname, sc->sc_rx_completed_idx)); 926 927 #if (defined(DIAGNOSTIC)) 928 if (map != sc->sc_rx_dmamap[sc->sc_rx_completed_idx]) { 929 panic("%s: Unexpected rx dmamap completed\n", 930 sc->sc_dev.dv_xname); 931 } 932 #endif 933 } 934 935 void 936 mb8795_rxdma_shutdown(arg) 937 void *arg; 938 { 939 struct mb8795_softc *sc = arg; 940 941 panic("%s: mb8795_rxdma_shutdown() unexpected", sc->sc_dev.dv_xname); 942 } 943 944 945 /* 946 * load a dmamap with a freshly allocated mbuf 947 */ 948 struct mbuf * 949 mb8795_rxdmamap_load(sc,map) 950 struct mb8795_softc *sc; 951 bus_dmamap_t map; 952 { 953 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 954 struct mbuf *m; 955 int error; 956 957 MGETHDR(m, M_DONTWAIT, MT_DATA); 958 if (m) { 959 MCLGET(m, M_DONTWAIT); 960 if ((m->m_flags & M_EXT) == 0) { 961 m_freem(m); 962 m = NULL; 963 } else { 964 m->m_len = MCLBYTES; 965 } 966 } 967 if (!m) { 968 /* @@@ Handle this gracefully by reusing a scratch buffer 969 * or something. 970 */ 971 panic("Unable to get memory for incoming ethernet\n"); 972 } 973 974 /* Align buffer, @@@ next specific. 975 * perhaps should be using M_ALIGN here instead? 976 * First we give us a little room to align with. 977 */ 978 { 979 u_char *buf = m->m_data; 980 int buflen = m->m_len; 981 buflen -= DMA_ENDALIGNMENT+DMA_BEGINALIGNMENT; 982 REALIGN_DMABUF(buf, buflen); 983 m->m_data = buf; 984 m->m_len = buflen; 985 } 986 987 m->m_pkthdr.rcvif = ifp; 988 m->m_pkthdr.len = m->m_len; 989 990 error = bus_dmamap_load_mbuf(sc->sc_rx_dmat, 991 map, m, BUS_DMA_NOWAIT); 992 993 bus_dmamap_sync(sc->sc_rx_dmat, map, 0, 994 map->dm_mapsize, BUS_DMASYNC_PREREAD); 995 996 if (error) { 997 DPRINTF(("DEBUG: m->m_data = 0x%08x, m->m_len = %d\n", 998 m->m_data, m->m_len)); 999 DPRINTF(("DEBUG: MCLBYTES = %d, map->_dm_size = %d\n", 1000 MCLBYTES, map->_dm_size)); 1001 1002 panic("%s: can't load rx mbuf chain, error = %d\n", 1003 sc->sc_dev.dv_xname, error); 1004 m_freem(m); 1005 m = NULL; 1006 } 1007 1008 return(m); 1009 } 1010 1011 bus_dmamap_t 1012 mb8795_rxdma_continue(arg) 1013 void *arg; 1014 { 1015 struct mb8795_softc *sc = arg; 1016 bus_dmamap_t map = NULL; 1017 1018 /* 1019 * Currently, starts dumping new packets if the buffers 1020 * fill up. This should probably reclaim unhandled 1021 * buffers instead so we drop older packets instead 1022 * of newer ones. 1023 */ 1024 if (((sc->sc_rx_loaded_idx+1)%MB8795_NRXBUFS) != sc->sc_rx_handled_idx) { 1025 sc->sc_rx_loaded_idx++; 1026 sc->sc_rx_loaded_idx %= MB8795_NRXBUFS; 1027 map = sc->sc_rx_dmamap[sc->sc_rx_loaded_idx]; 1028 1029 DPRINTF(("%s: mb8795_rxdma_continue() sc->sc_rx_loaded_idx = %d\nn", 1030 sc->sc_dev.dv_xname,sc->sc_rx_loaded_idx)); 1031 } 1032 #if (defined(DIAGNOSTIC)) 1033 else { 1034 printf("%s: out of receive DMA buffers\n",sc->sc_dev.dv_xname); 1035 } 1036 #endif 1037 1038 return(map); 1039 } 1040 1041 bus_dmamap_t 1042 mb8795_txdma_continue(arg) 1043 void *arg; 1044 { 1045 struct mb8795_softc *sc = arg; 1046 bus_dmamap_t map; 1047 1048 DPRINTF(("%s: mb8795_txdma_continue()\n",sc->sc_dev.dv_xname)); 1049 1050 if (sc->sc_tx_loaded) { 1051 map = NULL; 1052 } else { 1053 map = sc->sc_tx_dmamap; 1054 sc->sc_tx_loaded++; 1055 } 1056 1057 #ifdef DIAGNOSTIC 1058 if (sc->sc_tx_loaded != 1) { 1059 panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname, 1060 sc->sc_tx_loaded); 1061 } 1062 #endif 1063 1064 return(map); 1065 } 1066 1067 1068 /****************************************************************/ 1069 #if 0 1070 int 1071 mb8795_mediachange(ifp) 1072 struct ifnet *ifp; 1073 { 1074 struct mb8795_softc *sc = ifp->if_softc; 1075 1076 if (sc->sc_mediachange) 1077 return ((*sc->sc_mediachange)(sc)); 1078 return (0); 1079 } 1080 1081 void 1082 mb8795_mediastatus(ifp, ifmr) 1083 struct ifnet *ifp; 1084 struct ifmediareq *ifmr; 1085 { 1086 struct mb8795_softc *sc = ifp->if_softc; 1087 1088 if ((ifp->if_flags & IFF_UP) == 0) 1089 return; 1090 1091 ifmr->ifm_status = IFM_AVALID; 1092 if (sc->sc_havecarrier) 1093 ifmr->ifm_status |= IFM_ACTIVE; 1094 1095 if (sc->sc_mediastatus) 1096 (*sc->sc_mediastatus)(sc, ifmr); 1097 } 1098 #endif 1099 /****************************************************************/ 1100
Indexes created Tue Sep 23 07:09:52 GMT 2025