mb8795.c revision 1.17.12.2
1 /* $NetBSD: mb8795.c,v 1.17.12.2 2001/06/16 20:30:29 he Exp $ */ 2 /* 3 * Copyright (c) 1998 Darrin B. Jewell 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Darrin B. Jewell 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include "opt_inet.h" 33 #include "opt_ccitt.h" 34 #include "opt_llc.h" 35 #include "opt_ns.h" 36 #include "bpfilter.h" 37 #include "rnd.h" 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/mbuf.h> 42 #include <sys/syslog.h> 43 #include <sys/socket.h> 44 #include <sys/device.h> 45 #include <sys/malloc.h> 46 #include <sys/ioctl.h> 47 #include <sys/errno.h> 48 #if NRND > 0 49 #include <sys/rnd.h> 50 #endif 51 52 #include <net/if.h> 53 #include <net/if_dl.h> 54 #include <net/if_ether.h> 55 56 #if 0 57 #include <net/if_media.h> 58 #endif 59 60 #ifdef INET 61 #include <netinet/in.h> 62 #include <netinet/if_inarp.h> 63 #include <netinet/in_systm.h> 64 #include <netinet/in_var.h> 65 #include <netinet/ip.h> 66 #endif 67 68 #ifdef NS 69 #include <netns/ns.h> 70 #include <netns/ns_if.h> 71 #endif 72 73 #if defined(CCITT) && defined(LLC) 74 #include <sys/socketvar.h> 75 #include <netccitt/x25.h> 76 #include <netccitt/pk.h> 77 #include <netccitt/pk_var.h> 78 #include <netccitt/pk_extern.h> 79 #endif 80 81 #if NBPFILTER > 0 82 #include <net/bpf.h> 83 #include <net/bpfdesc.h> 84 #endif 85 86 #include <machine/cpu.h> 87 #include <machine/bus.h> 88 #include <machine/intr.h> 89 90 /* @@@ this is here for the REALIGN_DMABUF hack below */ 91 #include "nextdmareg.h" 92 #include "nextdmavar.h" 93 94 #include "mb8795reg.h" 95 #include "mb8795var.h" 96 97 #if 1 98 #define XE_DEBUG 99 #endif 100 101 #ifdef XE_DEBUG 102 int xe_debug = 0; 103 #define DPRINTF(x) if (xe_debug) printf x; 104 #else 105 #define DPRINTF(x) 106 #endif 107 108 109 /* 110 * Support for 111 * Fujitsu Ethernet Data Link Controller (MB8795) 112 * and the Fujitsu Manchester Encoder/Decoder (MB502). 113 */ 114 115 int debugipkt = 0; 116 117 118 void mb8795_shutdown __P((void *)); 119 120 #if 0 121 int mb8795_mediachange __P((struct ifnet *)); 122 void mb8795_mediastatus __P((struct ifnet *, struct ifmediareq *)); 123 #endif 124 125 struct mbuf * mb8795_rxdmamap_load __P((struct mb8795_softc *, 126 bus_dmamap_t map)); 127 128 bus_dmamap_t mb8795_rxdma_continue __P((void *)); 129 void mb8795_rxdma_completed __P((bus_dmamap_t,void *)); 130 bus_dmamap_t mb8795_txdma_continue __P((void *)); 131 void mb8795_txdma_completed __P((bus_dmamap_t,void *)); 132 void mb8795_rxdma_shutdown __P((void *)); 133 void mb8795_txdma_shutdown __P((void *)); 134 bus_dmamap_t mb8795_txdma_restart __P((bus_dmamap_t,void *)); 135 136 void 137 mb8795_config(sc) 138 struct mb8795_softc *sc; 139 { 140 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 141 142 DPRINTF(("%s: mb8795_config()\n",sc->sc_dev.dv_xname)); 143 144 /* Initialize ifnet structure. */ 145 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 146 ifp->if_softc = sc; 147 ifp->if_start = mb8795_start; 148 ifp->if_ioctl = mb8795_ioctl; 149 ifp->if_watchdog = mb8795_watchdog; 150 ifp->if_flags = 151 IFF_BROADCAST | IFF_NOTRAILERS; 152 153 #if 0 154 /* Initialize ifmedia structures. */ 155 ifmedia_init(&sc->sc_media, 0, mb8795_mediachange, mb8795_mediastatus); 156 if (sc->sc_supmedia != NULL) { 157 int i; 158 for (i = 0; i < sc->sc_nsupmedia; i++) 159 ifmedia_add(&sc->sc_media, sc->sc_supmedia[i], 160 0, NULL); 161 ifmedia_set(&sc->sc_media, sc->sc_defaultmedia); 162 } else { 163 ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_MANUAL, 0, NULL); 164 ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_MANUAL); 165 } 166 #endif 167 168 /* Attach the interface. */ 169 if_attach(ifp); 170 ether_ifattach(ifp, sc->sc_enaddr); 171 172 #if NBPFILTER > 0 173 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 174 #endif 175 176 sc->sc_sh = shutdownhook_establish(mb8795_shutdown, sc); 177 if (sc->sc_sh == NULL) 178 panic("mb8795_config: can't establish shutdownhook"); 179 180 #if NRND > 0 181 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 182 RND_TYPE_NET, 0); 183 #endif 184 185 /* Initialize the dma maps */ 186 { 187 int error; 188 if ((error = bus_dmamap_create(sc->sc_tx_dmat, MCLBYTES, 189 (MCLBYTES/MSIZE), MCLBYTES, 0, BUS_DMA_ALLOCNOW, 190 &sc->sc_tx_dmamap)) != 0) { 191 panic("%s: can't create tx DMA map, error = %d\n", 192 sc->sc_dev.dv_xname, error); 193 } 194 { 195 int i; 196 for(i=0;i<MB8795_NRXBUFS;i++) { 197 if ((error = bus_dmamap_create(sc->sc_rx_dmat, MCLBYTES, 198 (MCLBYTES/MSIZE), MCLBYTES, 0, BUS_DMA_ALLOCNOW, 199 &sc->sc_rx_dmamap[i])) != 0) { 200 panic("%s: can't create rx DMA map, error = %d\n", 201 sc->sc_dev.dv_xname, error); 202 } 203 sc->sc_rx_mb_head[i] = NULL; 204 } 205 sc->sc_rx_loaded_idx = 0; 206 sc->sc_rx_completed_idx = 0; 207 sc->sc_rx_handled_idx = 0; 208 } 209 } 210 211 /* @@@ more next hacks 212 * the 2000 covers at least a 1500 mtu + headers 213 * + DMA_BEGINALIGNMENT+ DMA_ENDALIGNMENT 214 */ 215 sc->sc_txbuf = malloc(2000, M_DEVBUF, M_NOWAIT); 216 if (!sc->sc_txbuf) panic("%s: can't malloc tx DMA buffer", 217 sc->sc_dev.dv_xname); 218 219 sc->sc_tx_mb_head = NULL; 220 sc->sc_tx_loaded = 0; 221 222 sc->sc_tx_nd->nd_shutdown_cb = mb8795_txdma_shutdown; 223 sc->sc_tx_nd->nd_continue_cb = mb8795_txdma_continue; 224 sc->sc_tx_nd->nd_completed_cb = mb8795_txdma_completed; 225 sc->sc_tx_nd->nd_cb_arg = sc; 226 227 sc->sc_rx_nd->nd_shutdown_cb = mb8795_rxdma_shutdown; 228 sc->sc_rx_nd->nd_continue_cb = mb8795_rxdma_continue; 229 sc->sc_rx_nd->nd_completed_cb = mb8795_rxdma_completed; 230 sc->sc_rx_nd->nd_cb_arg = sc; 231 232 DPRINTF(("%s: leaving mb8795_config()\n",sc->sc_dev.dv_xname)); 233 } 234 235 236 /****************************************************************/ 237 #if 0 238 #define XCHR(x) "0123456789abcdef"[(x) & 0xf] 239 static void 240 hex_dump(unsigned char *pkt, size_t len) 241 { 242 size_t i, j; 243 244 printf("0000: "); 245 for(i=0; i<len; i++) { 246 printf("%c%c ", XCHR(pkt[i]>>4), XCHR(pkt[i])); 247 if ((i+1) % 16 == 0) { 248 printf(" %c", '"'); 249 for(j=0; j<16; j++) 250 printf("%c", pkt[i-15+j]>=32 && pkt[i-15+j]<127?pkt[i-15+j]:'.'); 251 printf("%c\n%c%c%c%c: ", '"', XCHR((i+1)>>12), 252 XCHR((i+1)>>8), XCHR((i+1)>>4), XCHR(i+1)); 253 } 254 } 255 printf("\n"); 256 } 257 #endif 258 259 /* 260 * Controller receive interrupt. 261 */ 262 void 263 mb8795_rint(sc) 264 struct mb8795_softc *sc; 265 { 266 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 267 int error = 0; 268 u_char rxstat; 269 u_char rxmask; 270 271 rxstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT); 272 rxmask = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK); 273 274 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT, XE_RXSTAT_CLEAR); 275 276 #if 0 277 printf("%s: rx interrupt, rxstat = %b\n", 278 sc->sc_dev.dv_xname, rxstat, XE_RXSTAT_BITS); 279 #endif 280 281 if (rxstat & XE_RXSTAT_RESET) { 282 DPRINTF(("%s: rx reset packet\n", 283 sc->sc_dev.dv_xname)); 284 error++; 285 } 286 if (rxstat & XE_RXSTAT_SHORT) { 287 DPRINTF(("%s: rx short packet\n", 288 sc->sc_dev.dv_xname)); 289 error++; 290 } 291 if (rxstat & XE_RXSTAT_ALIGNERR) { 292 DPRINTF(("%s: rx alignment error\n", 293 sc->sc_dev.dv_xname)); 294 error++; 295 } 296 if (rxstat & XE_RXSTAT_CRCERR) { 297 DPRINTF(("%s: rx CRC error\n", 298 sc->sc_dev.dv_xname)); 299 error++; 300 } 301 if (rxstat & XE_RXSTAT_OVERFLOW) { 302 DPRINTF(("%s: rx overflow error\n", 303 sc->sc_dev.dv_xname)); 304 error++; 305 } 306 307 if (error) { 308 ifp->if_ierrors++; 309 /* @@@ handle more gracefully, free memory, etc. */ 310 } 311 312 if (rxstat & XE_RXSTAT_OK) { 313 int s; 314 s = spldma(); 315 316 while(sc->sc_rx_handled_idx != sc->sc_rx_completed_idx) { 317 struct mbuf *m; 318 bus_dmamap_t map; 319 320 sc->sc_rx_handled_idx++; 321 sc->sc_rx_handled_idx %= MB8795_NRXBUFS; 322 323 /* Should probably not do this much while interrupts 324 * are disabled, but for now we will. 325 */ 326 327 map = sc->sc_rx_dmamap[sc->sc_rx_handled_idx]; 328 m = sc->sc_rx_mb_head[sc->sc_rx_handled_idx]; 329 330 bus_dmamap_sync(sc->sc_rx_dmat, map, 331 0, map->dm_mapsize, BUS_DMASYNC_POSTREAD); 332 333 334 /* Find receive length and chop off CRC */ 335 /* @@@ assumes packet is all in first segment 336 */ 337 m->m_pkthdr.len = map->dm_segs[0].ds_xfer_len-4; 338 m->m_len = map->dm_segs[0].ds_xfer_len-4; 339 if (m->m_pkthdr.len > ETHER_MAX_LEN-ETHER_CRC_LEN) { 340 m->m_pkthdr.len = m->m_len = ETHER_MAX_LEN-ETHER_CRC_LEN; 341 } 342 m->m_pkthdr.rcvif = ifp; 343 344 bus_dmamap_unload(sc->sc_rx_dmat, map); 345 346 /* Install a fresh mbuf for next packet */ 347 348 sc->sc_rx_mb_head[sc->sc_rx_handled_idx] = 349 mb8795_rxdmamap_load(sc,map); 350 351 /* enable interrupts while we process the packet */ 352 splx(s); 353 354 #if defined(XE_DEBUG) 355 /* Peek at the packet */ 356 DPRINTF(("%s: received packet, at VA 0x%08x-0x%08x,len %d\n", 357 sc->sc_dev.dv_xname,mtod(m,u_char *),mtod(m,u_char *)+m->m_len,m->m_len)); 358 #if 0 359 hex_dump(mtod(m,u_char *), m->m_pkthdr.len < 255 ? m->m_pkthdr.len : 128 ); 360 #endif 361 #endif 362 363 { 364 ifp->if_ipackets++; 365 debugipkt++; 366 367 /* Pass the packet up. */ 368 (*ifp->if_input)(ifp, m); 369 } 370 371 s = spldma(); 372 373 } 374 375 splx(s); 376 377 } 378 379 DPRINTF(("%s: rx interrupt, rxstat = %b\n", 380 sc->sc_dev.dv_xname, rxstat, XE_RXSTAT_BITS)); 381 382 DPRINTF(("rxstat = 0x%b\n", 383 bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT), XE_RXSTAT_BITS)); 384 DPRINTF(("rxmask = 0x%b\n", 385 bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK), XE_RXMASK_BITS)); 386 DPRINTF(("rxmode = 0x%b\n", 387 bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMODE), XE_RXMODE_BITS)); 388 389 return; 390 } 391 392 /* 393 * Controller transmit interrupt. 394 */ 395 void 396 mb8795_tint(sc) 397 struct mb8795_softc *sc; 398 399 { 400 u_char txstat; 401 u_char txmask; 402 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 403 404 txstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT); 405 txmask = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK); 406 407 #if 0 408 DPRINTF(("%s: tx interrupt, txstat = %b\n", 409 sc->sc_dev.dv_xname, txstat, XE_TXSTAT_BITS)); 410 #endif 411 412 if (txstat & XE_TXSTAT_SHORTED) { 413 printf("%s: tx cable shorted\n", sc->sc_dev.dv_xname); 414 ifp->if_oerrors++; 415 } 416 if (txstat & XE_TXSTAT_UNDERFLOW) { 417 printf("%s: tx underflow\n", sc->sc_dev.dv_xname); 418 ifp->if_oerrors++; 419 } 420 if (txstat & XE_TXSTAT_COLLERR) { 421 DPRINTF(("%s: tx collision\n", sc->sc_dev.dv_xname)); 422 ifp->if_collisions++; 423 } 424 if (txstat & XE_TXSTAT_COLLERR16) { 425 printf("%s: tx 16th collision\n", sc->sc_dev.dv_xname); 426 ifp->if_oerrors++; 427 ifp->if_collisions += 16; 428 } 429 430 #if 0 431 if (txstat & XE_TXSTAT_READY) { 432 433 panic("%s: unexpected tx interrupt %b", 434 sc->sc_dev.dv_xname,txstat,XE_TXSTAT_BITS); 435 436 /* turn interrupt off */ 437 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 438 txmask & ~XE_TXMASK_READYIE); 439 } 440 #endif 441 442 return; 443 } 444 445 /****************************************************************/ 446 447 void 448 mb8795_reset(sc) 449 struct mb8795_softc *sc; 450 { 451 int s; 452 453 s = splimp(); 454 mb8795_init(sc); 455 splx(s); 456 } 457 458 void 459 mb8795_watchdog(ifp) 460 struct ifnet *ifp; 461 { 462 struct mb8795_softc *sc = ifp->if_softc; 463 464 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 465 ++ifp->if_oerrors; 466 467 DPRINTF(("%s: %d input errors, %d input packets\n", 468 sc->sc_dev.dv_xname, ifp->if_ierrors, ifp->if_ipackets)); 469 470 mb8795_reset(sc); 471 } 472 473 /* 474 * Initialization of interface; set up initialization block 475 * and transmit/receive descriptor rings. 476 * @@@ error handling is bogus in here. memory leaks 477 */ 478 void 479 mb8795_init(sc) 480 struct mb8795_softc *sc; 481 { 482 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 483 484 m_freem(sc->sc_tx_mb_head); 485 sc->sc_tx_mb_head = NULL; 486 sc->sc_tx_loaded = 0; 487 488 { 489 int i; 490 for(i=0;i<MB8795_NRXBUFS;i++) { 491 if (sc->sc_rx_mb_head[i]) { 492 bus_dmamap_unload(sc->sc_rx_dmat, sc->sc_rx_dmamap[i]); 493 m_freem(sc->sc_rx_mb_head[i]); 494 } 495 sc->sc_rx_mb_head[i] = 496 mb8795_rxdmamap_load(sc, sc->sc_rx_dmamap[i]); 497 } 498 sc->sc_rx_loaded_idx = 0; 499 sc->sc_rx_completed_idx = 0; 500 sc->sc_rx_handled_idx = 0; 501 } 502 503 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RESET, XE_RESET_MODE); 504 505 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMODE, XE_TXMODE_LB_DISABLE); 506 #if 0 /* This interrupt was sometimes failing to ack correctly 507 * causing a loop @@@ 508 */ 509 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 510 XE_TXMASK_UNDERFLOWIE | XE_TXMASK_COLLIE | XE_TXMASK_COLL16IE 511 | XE_TXMASK_PARERRIE); 512 #else 513 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 0); 514 #endif 515 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT, XE_TXSTAT_CLEAR); 516 517 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXMODE, XE_RXMODE_NORMAL); 518 519 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK, 520 XE_RXMASK_OKIE | XE_RXMASK_RESETIE | XE_RXMASK_SHORTIE | 521 XE_RXMASK_ALIGNERRIE | XE_RXMASK_CRCERRIE | XE_RXMASK_OVERFLOWIE); 522 523 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT, XE_RXSTAT_CLEAR); 524 525 { 526 int i; 527 for(i=0;i<sizeof(sc->sc_enaddr);i++) { 528 bus_space_write_1(sc->sc_bst,sc->sc_bsh,XE_ENADDR+i,sc->sc_enaddr[i]); 529 } 530 } 531 532 DPRINTF(("%s: initializing ethernet %02x:%02x:%02x:%02x:%02x:%02x, size=%d\n", 533 sc->sc_dev.dv_xname, 534 sc->sc_enaddr[0],sc->sc_enaddr[1],sc->sc_enaddr[2], 535 sc->sc_enaddr[3],sc->sc_enaddr[4],sc->sc_enaddr[5], 536 sizeof(sc->sc_enaddr))); 537 538 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RESET, 0); 539 540 ifp->if_flags |= IFF_RUNNING; 541 ifp->if_flags &= ~IFF_OACTIVE; 542 ifp->if_timer = 0; 543 544 nextdma_init(sc->sc_tx_nd); 545 nextdma_init(sc->sc_rx_nd); 546 547 nextdma_start(sc->sc_rx_nd, DMACSR_SETREAD); 548 549 if (ifp->if_snd.ifq_head != NULL) { 550 mb8795_start(ifp); 551 } 552 } 553 554 void 555 mb8795_stop(sc) 556 struct mb8795_softc *sc; 557 { 558 printf("%s: stop not implemented\n", sc->sc_dev.dv_xname); 559 } 560 561 562 void 563 mb8795_shutdown(arg) 564 void *arg; 565 { 566 struct mb8795_softc *sc = (struct mb8795_softc *)arg; 567 mb8795_stop(sc); 568 } 569 570 /****************************************************************/ 571 int 572 mb8795_ioctl(ifp, cmd, data) 573 register struct ifnet *ifp; 574 u_long cmd; 575 caddr_t data; 576 { 577 register struct mb8795_softc *sc = ifp->if_softc; 578 struct ifaddr *ifa = (struct ifaddr *)data; 579 struct ifreq *ifr = (struct ifreq *)data; 580 int s, error = 0; 581 582 s = splimp(); 583 584 switch (cmd) { 585 586 case SIOCSIFADDR: 587 ifp->if_flags |= IFF_UP; 588 589 switch (ifa->ifa_addr->sa_family) { 590 #ifdef INET 591 case AF_INET: 592 mb8795_init(sc); 593 arp_ifinit(ifp, ifa); 594 break; 595 #endif 596 #ifdef NS 597 case AF_NS: 598 { 599 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 600 601 if (ns_nullhost(*ina)) 602 ina->x_host = 603 *(union ns_host *)LLADDR(ifp->if_sadl); 604 else { 605 bcopy(ina->x_host.c_host, 606 LLADDR(ifp->if_sadl), 607 sizeof(sc->sc_enaddr)); 608 } 609 /* Set new address. */ 610 mb8795_init(sc); 611 break; 612 } 613 #endif 614 default: 615 mb8795_init(sc); 616 break; 617 } 618 break; 619 620 #if defined(CCITT) && defined(LLC) 621 case SIOCSIFCONF_X25: 622 ifp->if_flags |= IFF_UP; 623 ifa->ifa_rtrequest = cons_rtrequest; /* XXX */ 624 error = x25_llcglue(PRC_IFUP, ifa->ifa_addr); 625 if (error == 0) 626 mb8795_init(sc); 627 break; 628 #endif /* CCITT && LLC */ 629 630 case SIOCSIFFLAGS: 631 if ((ifp->if_flags & IFF_UP) == 0 && 632 (ifp->if_flags & IFF_RUNNING) != 0) { 633 /* 634 * If interface is marked down and it is running, then 635 * stop it. 636 */ 637 mb8795_stop(sc); 638 ifp->if_flags &= ~IFF_RUNNING; 639 } else if ((ifp->if_flags & IFF_UP) != 0 && 640 (ifp->if_flags & IFF_RUNNING) == 0) { 641 /* 642 * If interface is marked up and it is stopped, then 643 * start it. 644 */ 645 mb8795_init(sc); 646 } else { 647 /* 648 * Reset the interface to pick up changes in any other 649 * flags that affect hardware registers. 650 */ 651 /*mb8795_stop(sc);*/ 652 mb8795_init(sc); 653 } 654 #ifdef XE_DEBUG 655 if (ifp->if_flags & IFF_DEBUG) 656 sc->sc_debug = 1; 657 else 658 sc->sc_debug = 0; 659 #endif 660 break; 661 662 case SIOCADDMULTI: 663 case SIOCDELMULTI: 664 error = (cmd == SIOCADDMULTI) ? 665 ether_addmulti(ifr, &sc->sc_ethercom) : 666 ether_delmulti(ifr, &sc->sc_ethercom); 667 668 if (error == ENETRESET) { 669 /* 670 * Multicast list has changed; set the hardware filter 671 * accordingly. 672 */ 673 mb8795_reset(sc); 674 error = 0; 675 } 676 break; 677 678 #if 0 679 case SIOCGIFMEDIA: 680 case SIOCSIFMEDIA: 681 error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd); 682 break; 683 #endif 684 685 default: 686 error = EINVAL; 687 break; 688 } 689 690 splx(s); 691 692 #if 0 693 DPRINTF(("DEBUG: mb8795_ioctl(0x%lx) returning %d\n", 694 cmd,error)); 695 #endif 696 697 return (error); 698 } 699 700 /* 701 * Setup output on interface. 702 * Get another datagram to send off of the interface queue, and map it to the 703 * interface before starting the output. 704 * Called only at splimp or interrupt level. 705 */ 706 void 707 mb8795_start(ifp) 708 struct ifnet *ifp; 709 { 710 int error; 711 struct mb8795_softc *sc = ifp->if_softc; 712 713 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 714 return; 715 716 DPRINTF(("%s: mb8795_start()\n",sc->sc_dev.dv_xname)); 717 718 #if (defined(DIAGNOSTIC)) 719 { 720 u_char txstat; 721 txstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT); 722 if (!(txstat & XE_TXSTAT_READY)) { 723 /* @@@ I used to panic here, but then it paniced once. 724 * Let's see if I can just reset instead. [ dbj 980706.1900 ] 725 */ 726 printf("%s: transmitter not ready\n", sc->sc_dev.dv_xname); 727 mb8795_reset(sc); 728 return; 729 } 730 } 731 #endif 732 733 #if 0 734 return; /* @@@ Turn off xmit for debugging */ 735 #endif 736 737 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT, XE_TXSTAT_CLEAR); 738 739 IF_DEQUEUE(&ifp->if_snd, sc->sc_tx_mb_head); 740 if (sc->sc_tx_mb_head == 0) { 741 printf("%s: No packet to start\n", 742 sc->sc_dev.dv_xname); 743 return; 744 } 745 746 ifp->if_timer = 5; 747 748 /* The following is a next specific hack that should 749 * probably be moved out of MI code. 750 * This macro assumes it can move forward as needed 751 * in the buffer. Perhaps it should zero the extra buffer. 752 */ 753 #define REALIGN_DMABUF(s,l) \ 754 { (s) = ((u_char *)(((unsigned)(s)+DMA_BEGINALIGNMENT-1) \ 755 &~(DMA_BEGINALIGNMENT-1))); \ 756 (l) = ((u_char *)(((unsigned)((s)+(l))+DMA_ENDALIGNMENT-1) \ 757 &~(DMA_ENDALIGNMENT-1)))-(s);} 758 759 #if 0 760 error = bus_dmamap_load_mbuf(sc->sc_tx_dmat, 761 sc->sc_tx_dmamap, 762 sc->sc_tx_mb_head, 763 BUS_DMA_NOWAIT); 764 #else 765 { 766 u_char *buf = sc->sc_txbuf; 767 int buflen = 0; 768 struct mbuf *m = sc->sc_tx_mb_head; 769 buflen = m->m_pkthdr.len; 770 771 /* Fix runt packets, @@@ memory overrun */ 772 if (buflen < ETHERMIN+sizeof(struct ether_header)) { 773 buflen = ETHERMIN+sizeof(struct ether_header); 774 } 775 776 { 777 u_char *p = buf; 778 for (m=sc->sc_tx_mb_head; m; m = m->m_next) { 779 if (m->m_len == 0) continue; 780 bcopy(mtod(m, u_char *), p, m->m_len); 781 p += m->m_len; 782 } 783 } 784 785 error = bus_dmamap_load(sc->sc_tx_dmat, sc->sc_tx_dmamap, 786 buf,buflen,NULL,BUS_DMA_NOWAIT); 787 } 788 #endif 789 if (error) { 790 printf("%s: can't load mbuf chain, error = %d\n", 791 sc->sc_dev.dv_xname, error); 792 m_freem(sc->sc_tx_mb_head); 793 sc->sc_tx_mb_head = NULL; 794 return; 795 } 796 797 #ifdef DIAGNOSTIC 798 if (sc->sc_tx_loaded != 0) { 799 panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname, 800 sc->sc_tx_loaded); 801 } 802 #endif 803 804 ifp->if_flags |= IFF_OACTIVE; 805 806 bus_dmamap_sync(sc->sc_tx_dmat, sc->sc_tx_dmamap, 0, 807 sc->sc_tx_dmamap->dm_mapsize, BUS_DMASYNC_PREWRITE); 808 809 nextdma_start(sc->sc_tx_nd, DMACSR_SETWRITE); 810 811 #if NBPFILTER > 0 812 /* 813 * Pass packet to bpf if there is a listener. 814 */ 815 if (ifp->if_bpf) 816 bpf_mtap(ifp->if_bpf, sc->sc_tx_mb_head); 817 #endif 818 819 } 820 821 /****************************************************************/ 822 823 void 824 mb8795_txdma_completed(map, arg) 825 bus_dmamap_t map; 826 void *arg; 827 { 828 struct mb8795_softc *sc = arg; 829 830 DPRINTF(("%s: mb8795_txdma_completed()\n",sc->sc_dev.dv_xname)); 831 832 #ifdef DIAGNOSTIC 833 if (!sc->sc_tx_loaded) { 834 panic("%s: tx completed never loaded ",sc->sc_dev.dv_xname); 835 } 836 if (map != sc->sc_tx_dmamap) { 837 panic("%s: unexpected tx completed map",sc->sc_dev.dv_xname); 838 } 839 840 #endif 841 } 842 843 void 844 mb8795_txdma_shutdown(arg) 845 void *arg; 846 { 847 struct mb8795_softc *sc = arg; 848 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 849 850 DPRINTF(("%s: mb8795_txdma_shutdown()\n",sc->sc_dev.dv_xname)); 851 852 #ifdef DIAGNOSTIC 853 if (!sc->sc_tx_loaded) { 854 panic("%s: tx shutdown never loaded ",sc->sc_dev.dv_xname); 855 } 856 #endif 857 858 { 859 860 if (sc->sc_tx_loaded) { 861 bus_dmamap_sync(sc->sc_tx_dmat, sc->sc_tx_dmamap, 862 0, sc->sc_tx_dmamap->dm_mapsize, 863 BUS_DMASYNC_POSTWRITE); 864 bus_dmamap_unload(sc->sc_tx_dmat, sc->sc_tx_dmamap); 865 m_freem(sc->sc_tx_mb_head); 866 sc->sc_tx_mb_head = NULL; 867 868 sc->sc_tx_loaded--; 869 } 870 871 #ifdef DIAGNOSTIC 872 if (sc->sc_tx_loaded != 0) { 873 panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname, 874 sc->sc_tx_loaded); 875 } 876 #endif 877 878 ifp->if_flags &= ~IFF_OACTIVE; 879 880 ifp->if_timer = 0; 881 882 if (ifp->if_snd.ifq_head != NULL) { 883 mb8795_start(ifp); 884 } 885 886 } 887 888 #if 0 889 /* Enable ready interrupt */ 890 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 891 bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK) 892 | XE_TXMASK_READYIE); 893 #endif 894 } 895 896 897 void 898 mb8795_rxdma_completed(map, arg) 899 bus_dmamap_t map; 900 void *arg; 901 { 902 struct mb8795_softc *sc = arg; 903 904 sc->sc_rx_completed_idx++; 905 sc->sc_rx_completed_idx %= MB8795_NRXBUFS; 906 907 DPRINTF(("%s: mb8795_rxdma_completed(), sc->sc_rx_completed_idx = %d\n", 908 sc->sc_dev.dv_xname, sc->sc_rx_completed_idx)); 909 910 #if (defined(DIAGNOSTIC)) 911 if (map != sc->sc_rx_dmamap[sc->sc_rx_completed_idx]) { 912 panic("%s: Unexpected rx dmamap completed\n", 913 sc->sc_dev.dv_xname); 914 } 915 #endif 916 } 917 918 void 919 mb8795_rxdma_shutdown(arg) 920 void *arg; 921 { 922 struct mb8795_softc *sc = arg; 923 924 panic("%s: mb8795_rxdma_shutdown() unexpected", sc->sc_dev.dv_xname); 925 } 926 927 928 /* 929 * load a dmamap with a freshly allocated mbuf 930 */ 931 struct mbuf * 932 mb8795_rxdmamap_load(sc,map) 933 struct mb8795_softc *sc; 934 bus_dmamap_t map; 935 { 936 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 937 struct mbuf *m; 938 int error; 939 940 MGETHDR(m, M_DONTWAIT, MT_DATA); 941 if (m) { 942 MCLGET(m, M_DONTWAIT); 943 if ((m->m_flags & M_EXT) == 0) { 944 m_freem(m); 945 m = NULL; 946 } else { 947 m->m_len = MCLBYTES; 948 } 949 } 950 if (!m) { 951 /* @@@ Handle this gracefully by reusing a scratch buffer 952 * or something. 953 */ 954 panic("Unable to get memory for incoming ethernet\n"); 955 } 956 957 /* Align buffer, @@@ next specific. 958 * perhaps should be using M_ALIGN here instead? 959 * First we give us a little room to align with. 960 */ 961 { 962 u_char *buf = m->m_data; 963 int buflen = m->m_len; 964 buflen -= DMA_ENDALIGNMENT+DMA_BEGINALIGNMENT; 965 REALIGN_DMABUF(buf, buflen); 966 m->m_data = buf; 967 m->m_len = buflen; 968 } 969 970 m->m_pkthdr.rcvif = ifp; 971 m->m_pkthdr.len = m->m_len; 972 973 error = bus_dmamap_load_mbuf(sc->sc_rx_dmat, 974 map, m, BUS_DMA_NOWAIT); 975 976 bus_dmamap_sync(sc->sc_rx_dmat, map, 0, 977 map->dm_mapsize, BUS_DMASYNC_PREREAD); 978 979 if (error) { 980 DPRINTF(("DEBUG: m->m_data = 0x%08x, m->m_len = %d\n", 981 m->m_data, m->m_len)); 982 DPRINTF(("DEBUG: MCLBYTES = %d, map->_dm_size = %d\n", 983 MCLBYTES, map->_dm_size)); 984 985 panic("%s: can't load rx mbuf chain, error = %d\n", 986 sc->sc_dev.dv_xname, error); 987 m_freem(m); 988 m = NULL; 989 } 990 991 return(m); 992 } 993 994 bus_dmamap_t 995 mb8795_rxdma_continue(arg) 996 void *arg; 997 { 998 struct mb8795_softc *sc = arg; 999 bus_dmamap_t map = NULL; 1000 1001 /* 1002 * Currently, starts dumping new packets if the buffers 1003 * fill up. This should probably reclaim unhandled 1004 * buffers instead so we drop older packets instead 1005 * of newer ones. 1006 */ 1007 if (((sc->sc_rx_loaded_idx+1)%MB8795_NRXBUFS) != sc->sc_rx_handled_idx) { 1008 sc->sc_rx_loaded_idx++; 1009 sc->sc_rx_loaded_idx %= MB8795_NRXBUFS; 1010 map = sc->sc_rx_dmamap[sc->sc_rx_loaded_idx]; 1011 1012 DPRINTF(("%s: mb8795_rxdma_continue() sc->sc_rx_loaded_idx = %d\nn", 1013 sc->sc_dev.dv_xname,sc->sc_rx_loaded_idx)); 1014 } 1015 #if (defined(DIAGNOSTIC)) 1016 else { 1017 panic("%s: out of receive DMA buffers\n",sc->sc_dev.dv_xname); 1018 } 1019 #endif 1020 1021 return(map); 1022 } 1023 1024 bus_dmamap_t 1025 mb8795_txdma_continue(arg) 1026 void *arg; 1027 { 1028 struct mb8795_softc *sc = arg; 1029 bus_dmamap_t map; 1030 1031 DPRINTF(("%s: mb8795_txdma_continue()\n",sc->sc_dev.dv_xname)); 1032 1033 if (sc->sc_tx_loaded) { 1034 map = NULL; 1035 } else { 1036 map = sc->sc_tx_dmamap; 1037 sc->sc_tx_loaded++; 1038 } 1039 1040 #ifdef DIAGNOSTIC 1041 if (sc->sc_tx_loaded != 1) { 1042 panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname, 1043 sc->sc_tx_loaded); 1044 } 1045 #endif 1046 1047 return(map); 1048 } 1049 1050 1051 /****************************************************************/ 1052 #if 0 1053 int 1054 mb8795_mediachange(ifp) 1055 struct ifnet *ifp; 1056 { 1057 struct mb8795_softc *sc = ifp->if_softc; 1058 1059 if (sc->sc_mediachange) 1060 return ((*sc->sc_mediachange)(sc)); 1061 return (0); 1062 } 1063 1064 void 1065 mb8795_mediastatus(ifp, ifmr) 1066 struct ifnet *ifp; 1067 struct ifmediareq *ifmr; 1068 { 1069 struct mb8795_softc *sc = ifp->if_softc; 1070 1071 if ((ifp->if_flags & IFF_UP) == 0) 1072 return; 1073 1074 ifmr->ifm_status = IFM_AVALID; 1075 if (sc->sc_havecarrier) 1076 ifmr->ifm_status |= IFM_ACTIVE; 1077 1078 if (sc->sc_mediastatus) 1079 (*sc->sc_mediastatus)(sc, ifmr); 1080 } 1081 #endif 1082 /****************************************************************/ 1083
Indexes created Wed Oct 15 03:09:54 GMT 2025