mb8795.c revision 1.21
1 /* $NetBSD: mb8795.c,v 1.21 2001/04/02 05:29:43 dbj Exp $ */ 2 /* 3 * Copyright (c) 1998 Darrin B. Jewell 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Darrin B. Jewell 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include "opt_inet.h" 33 #include "opt_ccitt.h" 34 #include "opt_llc.h" 35 #include "opt_ns.h" 36 #include "bpfilter.h" 37 #include "rnd.h" 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/mbuf.h> 42 #include <sys/syslog.h> 43 #include <sys/socket.h> 44 #include <sys/device.h> 45 #include <sys/malloc.h> 46 #include <sys/ioctl.h> 47 #include <sys/errno.h> 48 #if NRND > 0 49 #include <sys/rnd.h> 50 #endif 51 52 #include <net/if.h> 53 #include <net/if_dl.h> 54 #include <net/if_ether.h> 55 56 #if 0 57 #include <net/if_media.h> 58 #endif 59 60 #ifdef INET 61 #include <netinet/in.h> 62 #include <netinet/if_inarp.h> 63 #include <netinet/in_systm.h> 64 #include <netinet/in_var.h> 65 #include <netinet/ip.h> 66 #endif 67 68 #ifdef NS 69 #include <netns/ns.h> 70 #include <netns/ns_if.h> 71 #endif 72 73 #if defined(CCITT) && defined(LLC) 74 #include <sys/socketvar.h> 75 #include <netccitt/x25.h> 76 #include <netccitt/pk.h> 77 #include <netccitt/pk_var.h> 78 #include <netccitt/pk_extern.h> 79 #endif 80 81 #if NBPFILTER > 0 82 #include <net/bpf.h> 83 #include <net/bpfdesc.h> 84 #endif 85 86 #include <machine/cpu.h> 87 #include <machine/bus.h> 88 #include <machine/intr.h> 89 90 /* @@@ this is here for the REALIGN_DMABUF hack below */ 91 #include "nextdmareg.h" 92 #include "nextdmavar.h" 93 94 #include "mb8795reg.h" 95 #include "mb8795var.h" 96 97 #if 1 98 #define XE_DEBUG 99 #endif 100 101 #ifdef XE_DEBUG 102 int xe_debug = 0; 103 #define DPRINTF(x) if (xe_debug) printf x; 104 #else 105 #define DPRINTF(x) 106 #endif 107 108 109 /* 110 * Support for 111 * Fujitsu Ethernet Data Link Controller (MB8795) 112 * and the Fujitsu Manchester Encoder/Decoder (MB502). 113 */ 114 115 void mb8795_shutdown __P((void *)); 116 117 struct mbuf * mb8795_rxdmamap_load __P((struct mb8795_softc *, 118 bus_dmamap_t map)); 119 120 bus_dmamap_t mb8795_rxdma_continue __P((void *)); 121 void mb8795_rxdma_completed __P((bus_dmamap_t,void *)); 122 bus_dmamap_t mb8795_txdma_continue __P((void *)); 123 void mb8795_txdma_completed __P((bus_dmamap_t,void *)); 124 void mb8795_rxdma_shutdown __P((void *)); 125 void mb8795_txdma_shutdown __P((void *)); 126 bus_dmamap_t mb8795_txdma_restart __P((bus_dmamap_t,void *)); 127 128 void 129 mb8795_config(sc) 130 struct mb8795_softc *sc; 131 { 132 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 133 134 DPRINTF(("%s: mb8795_config()\n",sc->sc_dev.dv_xname)); 135 136 /* Initialize ifnet structure. */ 137 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 138 ifp->if_softc = sc; 139 ifp->if_start = mb8795_start; 140 ifp->if_ioctl = mb8795_ioctl; 141 ifp->if_watchdog = mb8795_watchdog; 142 ifp->if_flags = 143 IFF_BROADCAST | IFF_NOTRAILERS; 144 145 /* Attach the interface. */ 146 if_attach(ifp); 147 ether_ifattach(ifp, sc->sc_enaddr); 148 149 /* decrease the mtu on this interface to deal with 150 * alignment problems 151 */ 152 ifp->if_mtu -= 16; 153 154 sc->sc_sh = shutdownhook_establish(mb8795_shutdown, sc); 155 if (sc->sc_sh == NULL) 156 panic("mb8795_config: can't establish shutdownhook"); 157 158 #if NRND > 0 159 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 160 RND_TYPE_NET, 0); 161 #endif 162 163 /* Initialize the dma maps */ 164 { 165 int error; 166 if ((error = bus_dmamap_create(sc->sc_tx_dmat, MCLBYTES, 167 (MCLBYTES/MSIZE), MCLBYTES, 0, BUS_DMA_ALLOCNOW, 168 &sc->sc_tx_dmamap)) != 0) { 169 panic("%s: can't create tx DMA map, error = %d\n", 170 sc->sc_dev.dv_xname, error); 171 } 172 { 173 int i; 174 for(i=0;i<MB8795_NRXBUFS;i++) { 175 if ((error = bus_dmamap_create(sc->sc_rx_dmat, MCLBYTES, 176 (MCLBYTES/MSIZE), MCLBYTES, 0, BUS_DMA_ALLOCNOW, 177 &sc->sc_rx_dmamap[i])) != 0) { 178 panic("%s: can't create rx DMA map, error = %d\n", 179 sc->sc_dev.dv_xname, error); 180 } 181 sc->sc_rx_mb_head[i] = NULL; 182 } 183 sc->sc_rx_loaded_idx = 0; 184 sc->sc_rx_completed_idx = 0; 185 sc->sc_rx_handled_idx = 0; 186 } 187 } 188 189 /* @@@ more next hacks 190 * the 2000 covers at least a 1500 mtu + headers 191 * + DMA_BEGINALIGNMENT+ DMA_ENDALIGNMENT 192 */ 193 sc->sc_txbuf = malloc(2000, M_DEVBUF, M_NOWAIT); 194 if (!sc->sc_txbuf) panic("%s: can't malloc tx DMA buffer", 195 sc->sc_dev.dv_xname); 196 197 sc->sc_tx_mb_head = NULL; 198 sc->sc_tx_loaded = 0; 199 200 sc->sc_tx_nd->nd_shutdown_cb = mb8795_txdma_shutdown; 201 sc->sc_tx_nd->nd_continue_cb = mb8795_txdma_continue; 202 sc->sc_tx_nd->nd_completed_cb = mb8795_txdma_completed; 203 sc->sc_tx_nd->nd_cb_arg = sc; 204 205 sc->sc_rx_nd->nd_shutdown_cb = mb8795_rxdma_shutdown; 206 sc->sc_rx_nd->nd_continue_cb = mb8795_rxdma_continue; 207 sc->sc_rx_nd->nd_completed_cb = mb8795_rxdma_completed; 208 sc->sc_rx_nd->nd_cb_arg = sc; 209 210 DPRINTF(("%s: leaving mb8795_config()\n",sc->sc_dev.dv_xname)); 211 } 212 213 214 /****************************************************************/ 215 #ifdef XE_DEBUG 216 #define XCHR(x) "0123456789abcdef"[(x) & 0xf] 217 static void 218 xe_hex_dump(unsigned char *pkt, size_t len) 219 { 220 size_t i, j; 221 222 printf("00000000 "); 223 for(i=0; i<len; i++) { 224 printf("%c%c ", XCHR(pkt[i]>>4), XCHR(pkt[i])); 225 if ((i+1) % 16 == 8) { 226 printf(" "); 227 } 228 if ((i+1) % 16 == 0) { 229 printf(" %c", '|'); 230 for(j=0; j<16; j++) { 231 printf("%c", pkt[i-15+j]>=32 && pkt[i-15+j]<127?pkt[i-15+j]:'.'); 232 } 233 printf("%c\n%c%c%c%c%c%c%c%c ", '|', 234 XCHR((i+1)>>28),XCHR((i+1)>>24),XCHR((i+1)>>20),XCHR((i+1)>>16), 235 XCHR((i+1)>>12), XCHR((i+1)>>8), XCHR((i+1)>>4), XCHR(i+1)); 236 } 237 } 238 printf("\n"); 239 } 240 #undef XCHR 241 #endif 242 243 /* 244 * Controller receive interrupt. 245 */ 246 void 247 mb8795_rint(sc) 248 struct mb8795_softc *sc; 249 { 250 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 251 int error = 0; 252 u_char rxstat; 253 u_char rxmask; 254 255 rxstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT); 256 rxmask = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK); 257 258 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT, XE_RXSTAT_CLEAR); 259 260 if (rxstat & XE_RXSTAT_RESET) { 261 DPRINTF(("%s: rx reset packet\n", 262 sc->sc_dev.dv_xname)); 263 error++; 264 } 265 if (rxstat & XE_RXSTAT_SHORT) { 266 DPRINTF(("%s: rx short packet\n", 267 sc->sc_dev.dv_xname)); 268 error++; 269 } 270 if (rxstat & XE_RXSTAT_ALIGNERR) { 271 DPRINTF(("%s: rx alignment error\n", 272 sc->sc_dev.dv_xname)); 273 #if 0 274 error++; 275 #endif 276 } 277 if (rxstat & XE_RXSTAT_CRCERR) { 278 DPRINTF(("%s: rx CRC error\n", 279 sc->sc_dev.dv_xname)); 280 #if 0 281 error++; 282 #endif 283 } 284 if (rxstat & XE_RXSTAT_OVERFLOW) { 285 DPRINTF(("%s: rx overflow error\n", 286 sc->sc_dev.dv_xname)); 287 #if 0 288 error++; 289 #endif 290 } 291 292 if (error) { 293 ifp->if_ierrors++; 294 /* @@@ handle more gracefully, free memory, etc. */ 295 } 296 297 if (rxstat & XE_RXSTAT_OK) { 298 int s; 299 s = spldma(); 300 301 while(sc->sc_rx_handled_idx != sc->sc_rx_completed_idx) { 302 struct mbuf *m; 303 bus_dmamap_t map; 304 305 sc->sc_rx_handled_idx++; 306 sc->sc_rx_handled_idx %= MB8795_NRXBUFS; 307 308 /* Should probably not do this much while interrupts 309 * are disabled, but for now we will. 310 */ 311 312 map = sc->sc_rx_dmamap[sc->sc_rx_handled_idx]; 313 m = sc->sc_rx_mb_head[sc->sc_rx_handled_idx]; 314 315 bus_dmamap_sync(sc->sc_rx_dmat, map, 316 0, map->dm_mapsize, BUS_DMASYNC_POSTREAD); 317 318 bus_dmamap_unload(sc->sc_rx_dmat, map); 319 320 /* Install a fresh mbuf for next packet */ 321 322 sc->sc_rx_mb_head[sc->sc_rx_handled_idx] = 323 mb8795_rxdmamap_load(sc,map); 324 325 /* Punt runt packets, these may be caused by dma restarts */ 326 /* @@@ assumes packet is all in first segment */ 327 if (map->dm_segs[0].ds_xfer_len < ETHER_MIN_LEN) { 328 m_freem(m); 329 continue; 330 } 331 332 /* Find receive length and chop off CRC */ 333 /* @@@ assumes packet is all in first segment 334 */ 335 m->m_pkthdr.len = map->dm_segs[0].ds_xfer_len-4; 336 m->m_len = map->dm_segs[0].ds_xfer_len-4; 337 338 m->m_pkthdr.rcvif = ifp; 339 340 /* enable interrupts while we process the packet */ 341 splx(s); 342 343 #if defined(XE_DEBUG) 344 /* Peek at the packet */ 345 DPRINTF(("%s: received packet, at VA 0x%08x-0x%08x,len %d\n", 346 sc->sc_dev.dv_xname,mtod(m,u_char *),mtod(m,u_char *)+m->m_len,m->m_len)); 347 if (xe_debug > 3) { 348 xe_hex_dump(mtod(m,u_char *), m->m_pkthdr.len); 349 } else if (xe_debug > 2) { 350 xe_hex_dump(mtod(m,u_char *), m->m_pkthdr.len < 255 ? m->m_pkthdr.len : 128 ); 351 } 352 #endif 353 354 { 355 ifp->if_ipackets++; 356 357 /* Pass the packet up. */ 358 (*ifp->if_input)(ifp, m); 359 } 360 361 s = spldma(); 362 363 } 364 365 splx(s); 366 367 } 368 369 #ifdef XE_DEBUG 370 if (xe_debug) { 371 char sbuf[256]; 372 373 bitmask_snprintf(rxstat, XE_RXSTAT_BITS, sbuf, sizeof(sbuf)); 374 printf("%s: rx interrupt, rxstat = %s\n", 375 sc->sc_dev.dv_xname, sbuf); 376 377 bitmask_snprintf(bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT), 378 XE_RXSTAT_BITS, sbuf, sizeof(sbuf)); 379 printf("rxstat = 0x%s\n", sbuf); 380 381 bitmask_snprintf(bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK), 382 XE_RXMASK_BITS, sbuf, sizeof(sbuf)); 383 printf("rxmask = 0x%s\n", sbuf); 384 385 bitmask_snprintf(bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMODE), 386 XE_RXMODE_BITS, sbuf, sizeof(sbuf)); 387 printf("rxmode = 0x%s\n", sbuf); 388 } 389 #endif 390 391 return; 392 } 393 394 /* 395 * Controller transmit interrupt. 396 */ 397 void 398 mb8795_tint(sc) 399 struct mb8795_softc *sc; 400 401 { 402 u_char txstat; 403 u_char txmask; 404 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 405 406 txstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT); 407 txmask = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK); 408 409 if (txstat & XE_TXSTAT_SHORTED) { 410 printf("%s: tx cable shorted\n", sc->sc_dev.dv_xname); 411 ifp->if_oerrors++; 412 } 413 if (txstat & XE_TXSTAT_UNDERFLOW) { 414 printf("%s: tx underflow\n", sc->sc_dev.dv_xname); 415 ifp->if_oerrors++; 416 } 417 if (txstat & XE_TXSTAT_COLLERR) { 418 DPRINTF(("%s: tx collision\n", sc->sc_dev.dv_xname)); 419 ifp->if_collisions++; 420 } 421 if (txstat & XE_TXSTAT_COLLERR16) { 422 printf("%s: tx 16th collision\n", sc->sc_dev.dv_xname); 423 ifp->if_oerrors++; 424 ifp->if_collisions += 16; 425 } 426 427 #if 0 428 if (txstat & XE_TXSTAT_READY) { 429 char sbuf[256]; 430 431 bitmask_snprintf(txstat, XE_TXSTAT_BITS, sbuf, sizeof(sbuf)); 432 panic("%s: unexpected tx interrupt %s", 433 sc->sc_dev.dv_xname, sbuf); 434 435 /* turn interrupt off */ 436 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 437 txmask & ~XE_TXMASK_READYIE); 438 } 439 #endif 440 441 return; 442 } 443 444 /****************************************************************/ 445 446 void 447 mb8795_reset(sc) 448 struct mb8795_softc *sc; 449 { 450 int s; 451 452 s = splnet(); 453 mb8795_init(sc); 454 splx(s); 455 } 456 457 void 458 mb8795_watchdog(ifp) 459 struct ifnet *ifp; 460 { 461 struct mb8795_softc *sc = ifp->if_softc; 462 463 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 464 ++ifp->if_oerrors; 465 466 DPRINTF(("%s: %d input errors, %d input packets\n", 467 sc->sc_dev.dv_xname, ifp->if_ierrors, ifp->if_ipackets)); 468 469 mb8795_reset(sc); 470 } 471 472 /* 473 * Initialization of interface; set up initialization block 474 * and transmit/receive descriptor rings. 475 * @@@ error handling is bogus in here. memory leaks 476 */ 477 void 478 mb8795_init(sc) 479 struct mb8795_softc *sc; 480 { 481 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 482 483 m_freem(sc->sc_tx_mb_head); 484 sc->sc_tx_mb_head = NULL; 485 sc->sc_tx_loaded = 0; 486 487 { 488 int i; 489 for(i=0;i<MB8795_NRXBUFS;i++) { 490 if (sc->sc_rx_mb_head[i]) { 491 bus_dmamap_unload(sc->sc_rx_dmat, sc->sc_rx_dmamap[i]); 492 m_freem(sc->sc_rx_mb_head[i]); 493 } 494 sc->sc_rx_mb_head[i] = 495 mb8795_rxdmamap_load(sc, sc->sc_rx_dmamap[i]); 496 } 497 sc->sc_rx_loaded_idx = 0; 498 sc->sc_rx_completed_idx = 0; 499 sc->sc_rx_handled_idx = 0; 500 } 501 502 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RESET, XE_RESET_MODE); 503 504 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMODE, XE_TXMODE_LB_DISABLE); 505 #if 0 /* This interrupt was sometimes failing to ack correctly 506 * causing a loop @@@ 507 */ 508 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 509 XE_TXMASK_UNDERFLOWIE | XE_TXMASK_COLLIE | XE_TXMASK_COLL16IE 510 | XE_TXMASK_PARERRIE); 511 #else 512 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 0); 513 #endif 514 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT, XE_TXSTAT_CLEAR); 515 516 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXMODE, XE_RXMODE_NORMAL); 517 518 #if 0 519 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK, 520 XE_RXMASK_OKIE | XE_RXMASK_RESETIE | XE_RXMASK_SHORTIE | 521 XE_RXMASK_ALIGNERRIE | XE_RXMASK_CRCERRIE | XE_RXMASK_OVERFLOWIE); 522 #else 523 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK, 524 XE_RXMASK_OKIE | XE_RXMASK_RESETIE | XE_RXMASK_SHORTIE); 525 #endif 526 527 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT, XE_RXSTAT_CLEAR); 528 529 { 530 int i; 531 for(i=0;i<sizeof(sc->sc_enaddr);i++) { 532 bus_space_write_1(sc->sc_bst,sc->sc_bsh,XE_ENADDR+i,sc->sc_enaddr[i]); 533 } 534 } 535 536 DPRINTF(("%s: initializing ethernet %02x:%02x:%02x:%02x:%02x:%02x, size=%d\n", 537 sc->sc_dev.dv_xname, 538 sc->sc_enaddr[0],sc->sc_enaddr[1],sc->sc_enaddr[2], 539 sc->sc_enaddr[3],sc->sc_enaddr[4],sc->sc_enaddr[5], 540 sizeof(sc->sc_enaddr))); 541 542 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RESET, 0); 543 544 ifp->if_flags |= IFF_RUNNING; 545 ifp->if_flags &= ~IFF_OACTIVE; 546 ifp->if_timer = 0; 547 548 nextdma_init(sc->sc_tx_nd); 549 nextdma_init(sc->sc_rx_nd); 550 551 nextdma_start(sc->sc_rx_nd, DMACSR_SETREAD); 552 553 if (ifp->if_snd.ifq_head != NULL) { 554 mb8795_start(ifp); 555 } 556 } 557 558 void 559 mb8795_stop(sc) 560 struct mb8795_softc *sc; 561 { 562 printf("%s: stop not implemented\n", sc->sc_dev.dv_xname); 563 } 564 565 566 void 567 mb8795_shutdown(arg) 568 void *arg; 569 { 570 struct mb8795_softc *sc = (struct mb8795_softc *)arg; 571 mb8795_stop(sc); 572 } 573 574 /****************************************************************/ 575 int 576 mb8795_ioctl(ifp, cmd, data) 577 register struct ifnet *ifp; 578 u_long cmd; 579 caddr_t data; 580 { 581 register struct mb8795_softc *sc = ifp->if_softc; 582 struct ifaddr *ifa = (struct ifaddr *)data; 583 struct ifreq *ifr = (struct ifreq *)data; 584 int s, error = 0; 585 586 s = splnet(); 587 588 switch (cmd) { 589 590 case SIOCSIFADDR: 591 ifp->if_flags |= IFF_UP; 592 593 switch (ifa->ifa_addr->sa_family) { 594 #ifdef INET 595 case AF_INET: 596 mb8795_init(sc); 597 arp_ifinit(ifp, ifa); 598 break; 599 #endif 600 #ifdef NS 601 case AF_NS: 602 { 603 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 604 605 if (ns_nullhost(*ina)) 606 ina->x_host = 607 *(union ns_host *)LLADDR(ifp->if_sadl); 608 else { 609 bcopy(ina->x_host.c_host, 610 LLADDR(ifp->if_sadl), 611 sizeof(sc->sc_enaddr)); 612 } 613 /* Set new address. */ 614 mb8795_init(sc); 615 break; 616 } 617 #endif 618 default: 619 mb8795_init(sc); 620 break; 621 } 622 break; 623 624 #if defined(CCITT) && defined(LLC) 625 case SIOCSIFCONF_X25: 626 ifp->if_flags |= IFF_UP; 627 ifa->ifa_rtrequest = cons_rtrequest; /* XXX */ 628 error = x25_llcglue(PRC_IFUP, ifa->ifa_addr); 629 if (error == 0) 630 mb8795_init(sc); 631 break; 632 #endif /* CCITT && LLC */ 633 634 case SIOCSIFFLAGS: 635 if ((ifp->if_flags & IFF_UP) == 0 && 636 (ifp->if_flags & IFF_RUNNING) != 0) { 637 /* 638 * If interface is marked down and it is running, then 639 * stop it. 640 */ 641 mb8795_stop(sc); 642 ifp->if_flags &= ~IFF_RUNNING; 643 } else if ((ifp->if_flags & IFF_UP) != 0 && 644 (ifp->if_flags & IFF_RUNNING) == 0) { 645 /* 646 * If interface is marked up and it is stopped, then 647 * start it. 648 */ 649 mb8795_init(sc); 650 } else { 651 /* 652 * Reset the interface to pick up changes in any other 653 * flags that affect hardware registers. 654 */ 655 /*mb8795_stop(sc);*/ 656 mb8795_init(sc); 657 } 658 #ifdef XE_DEBUG 659 if (ifp->if_flags & IFF_DEBUG) 660 sc->sc_debug = 1; 661 else 662 sc->sc_debug = 0; 663 #endif 664 break; 665 666 case SIOCADDMULTI: 667 case SIOCDELMULTI: 668 error = (cmd == SIOCADDMULTI) ? 669 ether_addmulti(ifr, &sc->sc_ethercom) : 670 ether_delmulti(ifr, &sc->sc_ethercom); 671 672 if (error == ENETRESET) { 673 /* 674 * Multicast list has changed; set the hardware filter 675 * accordingly. 676 */ 677 mb8795_reset(sc); 678 error = 0; 679 } 680 break; 681 682 #if 0 683 case SIOCGIFMEDIA: 684 case SIOCSIFMEDIA: 685 error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd); 686 break; 687 #endif 688 689 default: 690 error = EINVAL; 691 break; 692 } 693 694 splx(s); 695 696 #if 0 697 DPRINTF(("DEBUG: mb8795_ioctl(0x%lx) returning %d\n", 698 cmd,error)); 699 #endif 700 701 return (error); 702 } 703 704 /* 705 * Setup output on interface. 706 * Get another datagram to send off of the interface queue, and map it to the 707 * interface before starting the output. 708 * Called only at splnet or interrupt level. 709 */ 710 void 711 mb8795_start(ifp) 712 struct ifnet *ifp; 713 { 714 int error; 715 struct mb8795_softc *sc = ifp->if_softc; 716 717 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 718 return; 719 720 DPRINTF(("%s: mb8795_start()\n",sc->sc_dev.dv_xname)); 721 722 #if (defined(DIAGNOSTIC)) 723 { 724 u_char txstat; 725 txstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT); 726 if (!(txstat & XE_TXSTAT_READY)) { 727 /* @@@ I used to panic here, but then it paniced once. 728 * Let's see if I can just reset instead. [ dbj 980706.1900 ] 729 */ 730 printf("%s: transmitter not ready\n", sc->sc_dev.dv_xname); 731 mb8795_reset(sc); 732 return; 733 } 734 } 735 #endif 736 737 #if 0 738 return; /* @@@ Turn off xmit for debugging */ 739 #endif 740 741 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT, XE_TXSTAT_CLEAR); 742 743 IF_DEQUEUE(&ifp->if_snd, sc->sc_tx_mb_head); 744 if (sc->sc_tx_mb_head == 0) { 745 printf("%s: No packet to start\n", 746 sc->sc_dev.dv_xname); 747 return; 748 } 749 750 ifp->if_timer = 5; 751 752 /* The following is a next specific hack that should 753 * probably be moved out of MI code. 754 * This macro assumes it can move forward as needed 755 * in the buffer. Perhaps it should zero the extra buffer. 756 */ 757 #define REALIGN_DMABUF(s,l) \ 758 { (s) = ((u_char *)(((unsigned)(s)+DMA_BEGINALIGNMENT-1) \ 759 &~(DMA_BEGINALIGNMENT-1))); \ 760 (l) = ((u_char *)(((unsigned)((s)+(l))+DMA_ENDALIGNMENT-1) \ 761 &~(DMA_ENDALIGNMENT-1)))-(s);} 762 763 #if 0 764 error = bus_dmamap_load_mbuf(sc->sc_tx_dmat, 765 sc->sc_tx_dmamap, 766 sc->sc_tx_mb_head, 767 BUS_DMA_NOWAIT); 768 #else 769 { 770 u_char *buf = sc->sc_txbuf; 771 int buflen = 0; 772 struct mbuf *m = sc->sc_tx_mb_head; 773 buflen = m->m_pkthdr.len; 774 775 /* Fix runt packets, @@@ memory overrun */ 776 if (buflen < ETHERMIN+sizeof(struct ether_header)) { 777 buflen = ETHERMIN+sizeof(struct ether_header); 778 } 779 780 buflen += 15; 781 REALIGN_DMABUF(buf,buflen); 782 if (buflen > 1520) { 783 panic("%s: packet too long\n",sc->sc_dev.dv_xname); 784 } 785 786 { 787 u_char *p = buf; 788 for (m=sc->sc_tx_mb_head; m; m = m->m_next) { 789 if (m->m_len == 0) continue; 790 bcopy(mtod(m, u_char *), p, m->m_len); 791 p += m->m_len; 792 } 793 } 794 795 error = bus_dmamap_load(sc->sc_tx_dmat, sc->sc_tx_dmamap, 796 buf,buflen,NULL,BUS_DMA_NOWAIT); 797 } 798 #endif 799 if (error) { 800 printf("%s: can't load mbuf chain, error = %d\n", 801 sc->sc_dev.dv_xname, error); 802 m_freem(sc->sc_tx_mb_head); 803 sc->sc_tx_mb_head = NULL; 804 return; 805 } 806 807 #ifdef DIAGNOSTIC 808 if (sc->sc_tx_loaded != 0) { 809 panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname, 810 sc->sc_tx_loaded); 811 } 812 #endif 813 814 ifp->if_flags |= IFF_OACTIVE; 815 816 bus_dmamap_sync(sc->sc_tx_dmat, sc->sc_tx_dmamap, 0, 817 sc->sc_tx_dmamap->dm_mapsize, BUS_DMASYNC_PREWRITE); 818 819 nextdma_start(sc->sc_tx_nd, DMACSR_SETWRITE); 820 821 #if NBPFILTER > 0 822 /* 823 * Pass packet to bpf if there is a listener. 824 */ 825 if (ifp->if_bpf) 826 bpf_mtap(ifp->if_bpf, sc->sc_tx_mb_head); 827 #endif 828 829 } 830 831 /****************************************************************/ 832 833 void 834 mb8795_txdma_completed(map, arg) 835 bus_dmamap_t map; 836 void *arg; 837 { 838 struct mb8795_softc *sc = arg; 839 840 DPRINTF(("%s: mb8795_txdma_completed()\n",sc->sc_dev.dv_xname)); 841 842 #ifdef DIAGNOSTIC 843 if (!sc->sc_tx_loaded) { 844 panic("%s: tx completed never loaded ",sc->sc_dev.dv_xname); 845 } 846 if (map != sc->sc_tx_dmamap) { 847 panic("%s: unexpected tx completed map",sc->sc_dev.dv_xname); 848 } 849 850 #endif 851 } 852 853 void 854 mb8795_txdma_shutdown(arg) 855 void *arg; 856 { 857 struct mb8795_softc *sc = arg; 858 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 859 860 DPRINTF(("%s: mb8795_txdma_shutdown()\n",sc->sc_dev.dv_xname)); 861 862 #ifdef DIAGNOSTIC 863 if (!sc->sc_tx_loaded) { 864 panic("%s: tx shutdown never loaded ",sc->sc_dev.dv_xname); 865 } 866 #endif 867 868 { 869 870 if (sc->sc_tx_loaded) { 871 bus_dmamap_sync(sc->sc_tx_dmat, sc->sc_tx_dmamap, 872 0, sc->sc_tx_dmamap->dm_mapsize, 873 BUS_DMASYNC_POSTWRITE); 874 bus_dmamap_unload(sc->sc_tx_dmat, sc->sc_tx_dmamap); 875 m_freem(sc->sc_tx_mb_head); 876 sc->sc_tx_mb_head = NULL; 877 878 sc->sc_tx_loaded--; 879 } 880 881 #ifdef DIAGNOSTIC 882 if (sc->sc_tx_loaded != 0) { 883 panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname, 884 sc->sc_tx_loaded); 885 } 886 #endif 887 888 ifp->if_flags &= ~IFF_OACTIVE; 889 890 ifp->if_timer = 0; 891 892 if (ifp->if_snd.ifq_head != NULL) { 893 mb8795_start(ifp); 894 } 895 896 } 897 898 #if 0 899 /* Enable ready interrupt */ 900 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 901 bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK) 902 | XE_TXMASK_READYIE); 903 #endif 904 } 905 906 907 void 908 mb8795_rxdma_completed(map, arg) 909 bus_dmamap_t map; 910 void *arg; 911 { 912 struct mb8795_softc *sc = arg; 913 914 sc->sc_rx_completed_idx++; 915 sc->sc_rx_completed_idx %= MB8795_NRXBUFS; 916 917 DPRINTF(("%s: mb8795_rxdma_completed(), sc->sc_rx_completed_idx = %d\n", 918 sc->sc_dev.dv_xname, sc->sc_rx_completed_idx)); 919 920 #if (defined(DIAGNOSTIC)) 921 if (map != sc->sc_rx_dmamap[sc->sc_rx_completed_idx]) { 922 panic("%s: Unexpected rx dmamap completed\n", 923 sc->sc_dev.dv_xname); 924 } 925 #endif 926 } 927 928 void 929 mb8795_rxdma_shutdown(arg) 930 void *arg; 931 { 932 struct mb8795_softc *sc = arg; 933 934 DPRINTF(("%s: mb8795_rxdma_shutdown(), restarting.\n",sc->sc_dev.dv_xname)); 935 936 #if 0 937 /* Back up the dma pointers to only those that are completed */ 938 sc->sc_rx_loaded_idx = sc->sc_rx_completed_idx; 939 #endif 940 941 nextdma_start(sc->sc_rx_nd, DMACSR_SETREAD); 942 } 943 944 945 /* 946 * load a dmamap with a freshly allocated mbuf 947 */ 948 struct mbuf * 949 mb8795_rxdmamap_load(sc,map) 950 struct mb8795_softc *sc; 951 bus_dmamap_t map; 952 { 953 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 954 struct mbuf *m; 955 int error; 956 957 MGETHDR(m, M_DONTWAIT, MT_DATA); 958 if (m) { 959 MCLGET(m, M_DONTWAIT); 960 if ((m->m_flags & M_EXT) == 0) { 961 m_freem(m); 962 m = NULL; 963 } else { 964 m->m_len = MCLBYTES; 965 } 966 } 967 if (!m) { 968 /* @@@ Handle this gracefully by reusing a scratch buffer 969 * or something. 970 */ 971 panic("Unable to get memory for incoming ethernet\n"); 972 } 973 974 /* Align buffer, @@@ next specific. 975 * perhaps should be using M_ALIGN here instead? 976 * First we give us a little room to align with. 977 */ 978 { 979 u_char *buf = m->m_data; 980 int buflen = m->m_len; 981 buflen -= DMA_ENDALIGNMENT+DMA_BEGINALIGNMENT; 982 REALIGN_DMABUF(buf, buflen); 983 m->m_data = buf; 984 m->m_len = buflen; 985 } 986 987 m->m_pkthdr.rcvif = ifp; 988 m->m_pkthdr.len = m->m_len; 989 990 error = bus_dmamap_load_mbuf(sc->sc_rx_dmat, 991 map, m, BUS_DMA_NOWAIT); 992 993 bus_dmamap_sync(sc->sc_rx_dmat, map, 0, 994 map->dm_mapsize, BUS_DMASYNC_PREREAD); 995 996 if (error) { 997 DPRINTF(("DEBUG: m->m_data = 0x%08x, m->m_len = %d\n", 998 m->m_data, m->m_len)); 999 DPRINTF(("DEBUG: MCLBYTES = %d, map->_dm_size = %d\n", 1000 MCLBYTES, map->_dm_size)); 1001 1002 panic("%s: can't load rx mbuf chain, error = %d\n", 1003 sc->sc_dev.dv_xname, error); 1004 m_freem(m); 1005 m = NULL; 1006 } 1007 1008 return(m); 1009 } 1010 1011 bus_dmamap_t 1012 mb8795_rxdma_continue(arg) 1013 void *arg; 1014 { 1015 struct mb8795_softc *sc = arg; 1016 bus_dmamap_t map = NULL; 1017 1018 /* 1019 * Currently, starts dumping new packets if the buffers 1020 * fill up. This should probably reclaim unhandled 1021 * buffers instead so we drop older packets instead 1022 * of newer ones. 1023 */ 1024 if (((sc->sc_rx_loaded_idx+1)%MB8795_NRXBUFS) != sc->sc_rx_handled_idx) { 1025 sc->sc_rx_loaded_idx++; 1026 sc->sc_rx_loaded_idx %= MB8795_NRXBUFS; 1027 map = sc->sc_rx_dmamap[sc->sc_rx_loaded_idx]; 1028 1029 DPRINTF(("%s: mb8795_rxdma_continue() sc->sc_rx_loaded_idx = %d\nn", 1030 sc->sc_dev.dv_xname,sc->sc_rx_loaded_idx)); 1031 } 1032 #if (defined(DIAGNOSTIC)) 1033 else { 1034 panic("%s: out of receive DMA buffers\n",sc->sc_dev.dv_xname); 1035 } 1036 #endif 1037 1038 return(map); 1039 } 1040 1041 bus_dmamap_t 1042 mb8795_txdma_continue(arg) 1043 void *arg; 1044 { 1045 struct mb8795_softc *sc = arg; 1046 bus_dmamap_t map; 1047 1048 DPRINTF(("%s: mb8795_txdma_continue()\n",sc->sc_dev.dv_xname)); 1049 1050 if (sc->sc_tx_loaded) { 1051 map = NULL; 1052 } else { 1053 map = sc->sc_tx_dmamap; 1054 sc->sc_tx_loaded++; 1055 } 1056 1057 #ifdef DIAGNOSTIC 1058 if (sc->sc_tx_loaded != 1) { 1059 panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname, 1060 sc->sc_tx_loaded); 1061 } 1062 #endif 1063 1064 return(map); 1065 } 1066 1067 /****************************************************************/ 1068
Indexes created Tue Sep 23 22:09:46 GMT 2025