mb8795.c revision 1.3
1 /* $NetBSD: mb8795.c,v 1.3 1998/07/05 02:12:25 jonathan Exp $ */ 2 /* 3 * Copyright (c) 1998 Darrin B. Jewell 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Darrin B. Jewell 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include "opt_inet.h" 33 #include "opt_ccitt.h" 34 #include "bpfilter.h" 35 #include "rnd.h" 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/mbuf.h> 40 #include <sys/syslog.h> 41 #include <sys/socket.h> 42 #include <sys/device.h> 43 #include <sys/malloc.h> 44 #include <sys/ioctl.h> 45 #include <sys/errno.h> 46 #if NRND > 0 47 #include <sys/rnd.h> 48 #endif 49 50 #include <net/if.h> 51 #include <net/if_dl.h> 52 #include <net/if_ether.h> 53 54 #if 0 55 #include <net/if_media.h> 56 #endif 57 58 #ifdef INET 59 #include <netinet/in.h> 60 #include <netinet/if_inarp.h> 61 #include <netinet/in_systm.h> 62 #include <netinet/in_var.h> 63 #include <netinet/ip.h> 64 #endif 65 66 #ifdef NS 67 #include <netns/ns.h> 68 #include <netns/ns_if.h> 69 #endif 70 71 #if defined(CCITT) && defined(LLC) 72 #include <sys/socketvar.h> 73 #include <netccitt/x25.h> 74 #include <netccitt/pk.h> 75 #include <netccitt/pk_var.h> 76 #include <netccitt/pk_extern.h> 77 #endif 78 79 #if NBPFILTER > 0 80 #include <net/bpf.h> 81 #include <net/bpfdesc.h> 82 #endif 83 84 #include <machine/cpu.h> 85 #include <machine/bus.h> 86 #include <machine/intr.h> 87 88 /* @@@ this is here for the REALIGN_DMABUF hack below */ 89 #include "nextdmareg.h" 90 #include "nextdmavar.h" 91 92 #include "mb8795reg.h" 93 #include "mb8795var.h" 94 95 #if 0 96 #define XE_DEBUG 97 #endif 98 99 #ifdef XE_DEBUG 100 #define DPRINTF(x) printf x; 101 #else 102 #define DPRINTF(x) 103 #endif 104 105 106 /* 107 * Support for 108 * Fujitsu Ethernet Data Link Controller (MB8795) 109 * and the Fujitsu Manchester Encoder/Decoder (MB502). 110 */ 111 112 int debugipkt = 0; 113 114 115 void mb8795_shutdown __P((void *)); 116 117 #if 0 118 int mb8795_mediachange __P((struct ifnet *)); 119 void mb8795_mediastatus __P((struct ifnet *, struct ifmediareq *)); 120 #endif 121 122 struct mbuf * mb8795_rxdmamap_load __P((struct mb8795_softc *, 123 bus_dmamap_t map)); 124 125 bus_dmamap_t mb8795_rxdma_continue __P((void *)); 126 void mb8795_rxdma_completed __P((bus_dmamap_t,void *)); 127 bus_dmamap_t mb8795_txdma_continue __P((void *)); 128 void mb8795_txdma_completed __P((bus_dmamap_t,void *)); 129 void mb8795_rxdma_shutdown __P((void *)); 130 void mb8795_txdma_shutdown __P((void *)); 131 bus_dmamap_t mb8795_txdma_restart __P((bus_dmamap_t,void *)); 132 133 void 134 mb8795_config(sc) 135 struct mb8795_softc *sc; 136 { 137 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 138 139 DPRINTF(("%s: mb8795_config()\n",sc->sc_dev.dv_xname)); 140 141 /* Initialize ifnet structure. */ 142 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 143 ifp->if_softc = sc; 144 ifp->if_start = mb8795_start; 145 ifp->if_ioctl = mb8795_ioctl; 146 ifp->if_watchdog = mb8795_watchdog; 147 ifp->if_flags = 148 IFF_BROADCAST | IFF_NOTRAILERS; 149 150 #if 0 151 /* Initialize ifmedia structures. */ 152 ifmedia_init(&sc->sc_media, 0, mb8795_mediachange, mb8795_mediastatus); 153 if (sc->sc_supmedia != NULL) { 154 int i; 155 for (i = 0; i < sc->sc_nsupmedia; i++) 156 ifmedia_add(&sc->sc_media, sc->sc_supmedia[i], 157 0, NULL); 158 ifmedia_set(&sc->sc_media, sc->sc_defaultmedia); 159 } else { 160 ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_MANUAL, 0, NULL); 161 ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_MANUAL); 162 } 163 #endif 164 165 /* Attach the interface. */ 166 if_attach(ifp); 167 ether_ifattach(ifp, sc->sc_enaddr); 168 169 /* decrease the mtu on this interface to deal with 170 * alignment problems 171 */ 172 ifp->if_mtu -= 16; 173 174 #if NBPFILTER > 0 175 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 176 #endif 177 178 sc->sc_sh = shutdownhook_establish(mb8795_shutdown, sc); 179 if (sc->sc_sh == NULL) 180 panic("mb8795_config: can't establish shutdownhook"); 181 182 #if NRND > 0 183 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 184 RND_TYPE_NET); 185 #endif 186 187 /* Initialize the dma maps */ 188 { 189 int error; 190 if ((error = bus_dmamap_create(sc->sc_tx_dmat, MCLBYTES, 191 (MCLBYTES/MSIZE), MCLBYTES, 0, BUS_DMA_ALLOCNOW, 192 &sc->sc_tx_dmamap)) != 0) { 193 panic("%s: can't create tx DMA map, error = %d\n", 194 sc->sc_dev.dv_xname, error); 195 } 196 { 197 int i; 198 for(i=0;i<MB8795_NRXBUFS;i++) { 199 if ((error = bus_dmamap_create(sc->sc_rx_dmat, MCLBYTES, 200 (MCLBYTES/MSIZE), MCLBYTES, 0, BUS_DMA_ALLOCNOW, 201 &sc->sc_rx_dmamap[i])) != 0) { 202 panic("%s: can't create rx DMA map, error = %d\n", 203 sc->sc_dev.dv_xname, error); 204 } 205 sc->sc_rx_mb_head[i] = NULL; 206 } 207 sc->sc_rx_loaded_idx = 0; 208 sc->sc_rx_completed_idx = 0; 209 sc->sc_rx_handled_idx = 0; 210 } 211 } 212 213 /* @@@ more next hacks 214 * the 2000 covers at least a 1500 mtu + headers 215 * + DMA_BEGINALIGNMENT+ ENDMA_ENDALIGNMENT 216 */ 217 sc->sc_txbuf = malloc(2000, M_DEVBUF, M_NOWAIT); 218 if (!sc->sc_txbuf) panic("%s: can't malloc tx DMA buffer", 219 sc->sc_dev.dv_xname); 220 221 sc->sc_tx_mb_head = NULL; 222 sc->sc_tx_loaded = 0; 223 224 sc->sc_tx_nd->nd_chaining_flag = 0; 225 sc->sc_tx_nd->nd_shutdown_cb = mb8795_txdma_shutdown; 226 sc->sc_tx_nd->nd_continue_cb = mb8795_txdma_continue; 227 sc->sc_tx_nd->nd_completed_cb = mb8795_txdma_completed; 228 sc->sc_tx_nd->nd_cb_arg = sc; 229 230 sc->sc_rx_nd->nd_chaining_flag = 1; 231 sc->sc_rx_nd->nd_shutdown_cb = mb8795_rxdma_shutdown; 232 sc->sc_rx_nd->nd_continue_cb = mb8795_rxdma_continue; 233 sc->sc_rx_nd->nd_completed_cb = mb8795_rxdma_completed; 234 sc->sc_rx_nd->nd_cb_arg = sc; 235 236 DPRINTF(("%s: leaving mb8795_config()\n",sc->sc_dev.dv_xname)); 237 } 238 239 240 /****************************************************************/ 241 242 #define XCHR(x) "0123456789abcdef"[(x) & 0xf] 243 static void 244 hex_dump(unsigned char *pkt, size_t len) 245 { 246 size_t i, j; 247 248 printf("0000: "); 249 for(i=0; i<len; i++) { 250 printf("%c%c ", XCHR(pkt[i]>>4), XCHR(pkt[i])); 251 if ((i+1) % 16 == 0) { 252 printf(" %c", '"'); 253 for(j=0; j<16; j++) 254 printf("%c", pkt[i-15+j]>=32 && pkt[i-15+j]<127?pkt[i-15+j]:'.'); 255 printf("%c\n%c%c%c%c: ", '"', XCHR((i+1)>>12), 256 XCHR((i+1)>>8), XCHR((i+1)>>4), XCHR(i+1)); 257 } 258 } 259 printf("\n"); 260 } 261 262 263 /* 264 * Controller receive interrupt. 265 */ 266 void 267 mb8795_rint(sc) 268 struct mb8795_softc *sc; 269 { 270 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 271 int error = 0; 272 u_char rxstat; 273 u_char rxmask; 274 275 rxstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT); 276 rxmask = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK); 277 278 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT, XE_RXSTAT_CLEAR); 279 280 #if 0 281 DPRINTF(("%s: rx interrupt, rxstat = %b\n", 282 sc->sc_dev.dv_xname, rxstat, XE_RXSTAT_BITS)); 283 #endif 284 285 if (rxstat & XE_RXSTAT_RESET) { 286 DPRINTF(("%s: rx reset packet\n", 287 sc->sc_dev.dv_xname)); 288 error++; 289 } 290 if (rxstat & XE_RXSTAT_SHORT) { 291 DPRINTF(("%s: rx short packet\n", 292 sc->sc_dev.dv_xname)); 293 error++; 294 } 295 if (rxstat & XE_RXSTAT_ALIGNERR) { 296 DPRINTF(("%s: rx alignment error\n", 297 sc->sc_dev.dv_xname)); 298 error++; 299 } 300 if (rxstat & XE_RXSTAT_CRCERR) { 301 DPRINTF(("%s: rx CRC error\n", 302 sc->sc_dev.dv_xname)); 303 error++; 304 } 305 if (rxstat & XE_RXSTAT_OVERFLOW) { 306 DPRINTF(("%s: rx overflow error\n", 307 sc->sc_dev.dv_xname)); 308 error++; 309 } 310 311 if (error) { 312 ifp->if_ierrors++; 313 /* @@@ handle more gracefully, free memory, etc. */ 314 } 315 316 if (rxstat & XE_RXSTAT_OK) { 317 int s; 318 s = spldma(); 319 320 while(sc->sc_rx_handled_idx != sc->sc_rx_completed_idx) { 321 struct mbuf *m; 322 bus_dmamap_t map; 323 324 sc->sc_rx_handled_idx++; 325 sc->sc_rx_handled_idx %= MB8795_NRXBUFS; 326 327 /* Should probably not do this much while interrupts 328 * are disabled, but for now we will. 329 */ 330 331 map = sc->sc_rx_dmamap[sc->sc_rx_handled_idx]; 332 m = sc->sc_rx_mb_head[sc->sc_rx_handled_idx]; 333 334 bus_dmamap_sync(sc->sc_rx_dmat, map, 335 0, map->dm_mapsize, BUS_DMASYNC_POSTREAD); 336 337 338 /* Find receive length and chop off CRC */ 339 /* @@@ assumes packet is all in first segment 340 * also assumes segment length is length of packet. 341 * see comment in nextdma.c nextdma_intr(); 342 */ 343 m->m_pkthdr.len = map->dm_segs[0].ds_len-4; 344 m->m_len = map->dm_segs[0].ds_len-4; 345 m->m_pkthdr.rcvif = ifp; 346 347 bus_dmamap_unload(sc->sc_rx_dmat, map); 348 349 /* Install a fresh mbuf for next packet */ 350 351 sc->sc_rx_mb_head[sc->sc_rx_handled_idx] = 352 mb8795_rxdmamap_load(sc,map); 353 354 /* enable interrupts while we process the packet */ 355 splx(s); 356 357 #if defined(XE_DEBUG) 358 /* Peek at the packet */ 359 DPRINTF(("%s: received packet, at VA 0x%08x-0x%08x,len %d\n", 360 sc->sc_dev.dv_xname,mtod(m,u_char *),mtod(m,u_char *)+m->m_len,m->m_len)); 361 #if 0 362 hex_dump(mtod(m,u_char *), m->m_pkthdr.len < 255 ? m->m_pkthdr.len : 128 ); 363 #endif 364 #endif 365 366 { 367 struct ether_header *eh; 368 369 ifp->if_ipackets++; 370 debugipkt++; 371 372 /* We assume that the header fit entirely in one mbuf. */ 373 eh = mtod(m, struct ether_header *); 374 375 /* Pass the packet up, with the ether header sort-of removed. */ 376 m_adj(m, sizeof(struct ether_header)); 377 ether_input(ifp, eh, m); 378 } 379 380 s = spldma(); 381 382 } 383 384 splx(s); 385 386 } 387 388 DPRINTF(("%s: rx interrupt, rxstat = %b\n", 389 sc->sc_dev.dv_xname, rxstat, XE_RXSTAT_BITS)); 390 391 #if 0 && defined(XE_DEBUG) 392 { 393 DPRINTF(("rxstat = 0x%b\n", 394 bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT), XE_RXSTAT_BITS)); 395 DPRINTF(("rxmask = 0x%b\n", 396 bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK), XE_RXMASK_BITS)); 397 DPRINTF(("rxmode = 0x%b\n", 398 bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMODE), XE_RXMODE_BITS)); 399 } 400 #endif 401 402 return; 403 } 404 405 /* 406 * Controller transmit interrupt. 407 */ 408 void 409 mb8795_tint(sc) 410 struct mb8795_softc *sc; 411 412 { 413 int reset = 0; 414 u_char txstat; 415 u_char txmask; 416 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 417 418 txstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT); 419 txmask = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK); 420 421 #if 0 422 DPRINTF(("%s: tx interrupt, txstat = %b\n", 423 sc->sc_dev.dv_xname, txstat, XE_TXSTAT_BITS)); 424 #endif 425 426 if (txstat & XE_TXSTAT_SHORTED) { 427 printf("%s: tx cable shorted\n", sc->sc_dev.dv_xname); 428 ifp->if_oerrors++; 429 } 430 if (txstat & XE_TXSTAT_UNDERFLOW) { 431 printf("%s: tx underflow\n", sc->sc_dev.dv_xname); 432 ifp->if_oerrors++; 433 } 434 if (txstat & XE_TXSTAT_COLLERR) { 435 DPRINTF(("%s: tx collision\n", sc->sc_dev.dv_xname)); 436 ifp->if_collisions++; 437 } 438 if (txstat & XE_TXSTAT_COLLERR16) { 439 printf("%s: tx 16th collision\n", sc->sc_dev.dv_xname); 440 ifp->if_oerrors++; 441 ifp->if_collisions += 16; 442 } 443 444 if (reset) { 445 mb8795_reset(sc); 446 return; 447 } 448 449 #if 0 450 if (txstat & XE_TXSTAT_READY) { 451 452 panic("%s: unexpected tx interrupt %b", 453 sc->sc_dev.dv_xname,txstat,XE_TXSTAT_BITS); 454 455 /* turn interrupt off */ 456 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 457 txmask & ~XE_TXMASK_READYIE); 458 } 459 #endif 460 461 return; 462 } 463 464 /****************************************************************/ 465 466 void 467 mb8795_reset(sc) 468 struct mb8795_softc *sc; 469 { 470 int s; 471 472 s = splimp(); 473 mb8795_init(sc); 474 splx(s); 475 } 476 477 void 478 mb8795_watchdog(ifp) 479 struct ifnet *ifp; 480 { 481 struct mb8795_softc *sc = ifp->if_softc; 482 483 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 484 ++ifp->if_oerrors; 485 486 DPRINTF(("%s: %d input errors, %d input packets\n", 487 sc->sc_dev.dv_xname, ifp->if_ierrors, ifp->if_ipackets)); 488 489 mb8795_reset(sc); 490 } 491 492 /* 493 * Initialization of interface; set up initialization block 494 * and transmit/receive descriptor rings. 495 * @@@ error handling is bogus in here. memory leaks 496 */ 497 void 498 mb8795_init(sc) 499 struct mb8795_softc *sc; 500 { 501 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 502 503 m_freem(sc->sc_tx_mb_head); 504 sc->sc_tx_mb_head = NULL; 505 sc->sc_tx_loaded = 0; 506 507 { 508 int i; 509 for(i=0;i<MB8795_NRXBUFS;i++) { 510 if (sc->sc_rx_mb_head[i]) { 511 bus_dmamap_unload(sc->sc_rx_dmat, sc->sc_rx_dmamap[i]); 512 m_freem(sc->sc_rx_mb_head[i]); 513 } 514 sc->sc_rx_mb_head[i] = 515 mb8795_rxdmamap_load(sc, sc->sc_rx_dmamap[i]); 516 } 517 sc->sc_rx_loaded_idx = 0; 518 sc->sc_rx_completed_idx = 0; 519 sc->sc_rx_handled_idx = 0; 520 } 521 522 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RESET, XE_RESET_MODE); 523 524 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMODE, XE_TXMODE_LB_DISABLE); 525 #if 0 /* This interrupt was sometimes failing to ack correctly 526 * causing a loop @@@ 527 */ 528 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 529 XE_TXMASK_UNDERFLOWIE | XE_TXMASK_COLLIE | XE_TXMASK_COLL16IE 530 | XE_TXMASK_PARERRIE); 531 #else 532 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 0); 533 #endif 534 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT, XE_TXSTAT_CLEAR); 535 536 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXMODE, XE_RXMODE_NORMAL); 537 538 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK, 539 XE_RXMASK_OKIE | XE_RXMASK_RESETIE | XE_RXMASK_SHORTIE | 540 XE_RXMASK_ALIGNERRIE | XE_RXMASK_CRCERRIE | XE_RXMASK_OVERFLOWIE); 541 542 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT, XE_RXSTAT_CLEAR); 543 544 { 545 int i; 546 for(i=0;i<sizeof(sc->sc_enaddr);i++) { 547 bus_space_write_1(sc->sc_bst,sc->sc_bsh,XE_ENADDR+i,sc->sc_enaddr[i]); 548 } 549 } 550 551 DPRINTF(("%s: initializing ethernet %02x:%02x:%02x:%02x:%02x:%02x, size=%d\n", 552 sc->sc_dev.dv_xname, 553 sc->sc_enaddr[0],sc->sc_enaddr[1],sc->sc_enaddr[2], 554 sc->sc_enaddr[3],sc->sc_enaddr[4],sc->sc_enaddr[5], 555 sizeof(sc->sc_enaddr))); 556 557 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RESET, 0); 558 559 ifp->if_flags |= IFF_RUNNING; 560 ifp->if_flags &= ~IFF_OACTIVE; 561 ifp->if_timer = 0; 562 563 nextdma_init(sc->sc_tx_nd); 564 nextdma_init(sc->sc_rx_nd); 565 566 nextdma_start(sc->sc_rx_nd, DMACSR_READ); 567 568 if (ifp->if_snd.ifq_head != NULL) { 569 mb8795_start(ifp); 570 } 571 } 572 573 void 574 mb8795_stop(sc) 575 struct mb8795_softc *sc; 576 { 577 printf("%s: stop not implemented\n", sc->sc_dev.dv_xname); 578 } 579 580 581 void 582 mb8795_shutdown(arg) 583 void *arg; 584 { 585 struct mb8795_softc *sc = (struct mb8795_softc *)arg; 586 mb8795_stop(sc); 587 } 588 589 /****************************************************************/ 590 int 591 mb8795_ioctl(ifp, cmd, data) 592 register struct ifnet *ifp; 593 u_long cmd; 594 caddr_t data; 595 { 596 register struct mb8795_softc *sc = ifp->if_softc; 597 struct ifaddr *ifa = (struct ifaddr *)data; 598 struct ifreq *ifr = (struct ifreq *)data; 599 int s, error = 0; 600 601 s = splimp(); 602 603 switch (cmd) { 604 605 case SIOCSIFADDR: 606 ifp->if_flags |= IFF_UP; 607 608 switch (ifa->ifa_addr->sa_family) { 609 #ifdef INET 610 case AF_INET: 611 mb8795_init(sc); 612 arp_ifinit(ifp, ifa); 613 break; 614 #endif 615 #ifdef NS 616 case AF_NS: 617 { 618 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 619 620 if (ns_nullhost(*ina)) 621 ina->x_host = 622 *(union ns_host *)LLADDR(ifp->if_sadl); 623 else { 624 bcopy(ina->x_host.c_host, 625 LLADDR(ifp->if_sadl), 626 sizeof(sc->sc_enaddr)); 627 } 628 /* Set new address. */ 629 mb8795_init(sc); 630 break; 631 } 632 #endif 633 default: 634 mb8795_init(sc); 635 break; 636 } 637 break; 638 639 #if defined(CCITT) && defined(LLC) 640 case SIOCSIFCONF_X25: 641 ifp->if_flags |= IFF_UP; 642 ifa->ifa_rtrequest = cons_rtrequest; /* XXX */ 643 error = x25_llcglue(PRC_IFUP, ifa->ifa_addr); 644 if (error == 0) 645 mb8795_init(sc); 646 break; 647 #endif /* CCITT && LLC */ 648 649 case SIOCSIFFLAGS: 650 if ((ifp->if_flags & IFF_UP) == 0 && 651 (ifp->if_flags & IFF_RUNNING) != 0) { 652 /* 653 * If interface is marked down and it is running, then 654 * stop it. 655 */ 656 mb8795_stop(sc); 657 ifp->if_flags &= ~IFF_RUNNING; 658 } else if ((ifp->if_flags & IFF_UP) != 0 && 659 (ifp->if_flags & IFF_RUNNING) == 0) { 660 /* 661 * If interface is marked up and it is stopped, then 662 * start it. 663 */ 664 mb8795_init(sc); 665 } else { 666 /* 667 * Reset the interface to pick up changes in any other 668 * flags that affect hardware registers. 669 */ 670 /*mb8795_stop(sc);*/ 671 mb8795_init(sc); 672 } 673 #ifdef XE_DEBUG 674 if (ifp->if_flags & IFF_DEBUG) 675 sc->sc_debug = 1; 676 else 677 sc->sc_debug = 0; 678 #endif 679 break; 680 681 case SIOCADDMULTI: 682 case SIOCDELMULTI: 683 error = (cmd == SIOCADDMULTI) ? 684 ether_addmulti(ifr, &sc->sc_ethercom) : 685 ether_delmulti(ifr, &sc->sc_ethercom); 686 687 if (error == ENETRESET) { 688 /* 689 * Multicast list has changed; set the hardware filter 690 * accordingly. 691 */ 692 mb8795_reset(sc); 693 error = 0; 694 } 695 break; 696 697 #if 0 698 case SIOCGIFMEDIA: 699 case SIOCSIFMEDIA: 700 error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd); 701 break; 702 #endif 703 704 default: 705 error = EINVAL; 706 break; 707 } 708 709 splx(s); 710 711 #if 0 712 DPRINTF(("DEBUG: mb8795_ioctl(0x%lx) returning %d\n", 713 cmd,error)); 714 #endif 715 716 return (error); 717 } 718 719 /* 720 * Setup output on interface. 721 * Get another datagram to send off of the interface queue, and map it to the 722 * interface before starting the output. 723 * Called only at splimp or interrupt level. 724 */ 725 void 726 mb8795_start(ifp) 727 struct ifnet *ifp; 728 { 729 int error; 730 struct mb8795_softc *sc = ifp->if_softc; 731 732 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 733 return; 734 735 DPRINTF(("%s: mb8795_start()\n",sc->sc_dev.dv_xname)); 736 737 #if (defined(DIAGNOSTIC)) 738 { 739 u_char txstat; 740 txstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT); 741 if (!(txstat & XE_TXSTAT_READY)) { 742 panic("%s: transmitter not ready\n", sc->sc_dev.dv_xname); 743 } 744 } 745 #endif 746 747 #if 0 748 return; /* @@@ Turn off xmit for debugging */ 749 #endif 750 751 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT, XE_TXSTAT_CLEAR); 752 753 IF_DEQUEUE(&ifp->if_snd, sc->sc_tx_mb_head); 754 if (sc->sc_tx_mb_head == 0) { 755 printf("%s: No packet to start\n", 756 sc->sc_dev.dv_xname); 757 return; 758 } 759 760 ifp->if_timer = 5; 761 762 /* The following is a next specific hack that should 763 * probably be moved out of MI code. 764 * This macro assumes it can move forward as needed 765 * in the buffer. Perhaps it should zero the extra buffer. 766 */ 767 #define REALIGN_DMABUF(s,l) \ 768 { (s) = ((u_char *)(((unsigned)(s)+DMA_BEGINALIGNMENT-1) \ 769 &~(DMA_BEGINALIGNMENT-1))); \ 770 (l) = ((u_char *)(((unsigned)((s)+(l))+ENDMA_ENDALIGNMENT-1) \ 771 &~(ENDMA_ENDALIGNMENT-1)))-(s);} 772 773 #if 0 774 error = bus_dmamap_load_mbuf(sc->sc_tx_dmat, 775 sc->sc_tx_dmamap, 776 sc->sc_tx_mb_head, 777 BUS_DMA_NOWAIT); 778 #else 779 { 780 u_char *buf = sc->sc_txbuf; 781 int buflen = 0; 782 struct mbuf *m = sc->sc_tx_mb_head; 783 buflen = m->m_pkthdr.len; 784 785 /* Fix runt packets, @@@ memory overrun */ 786 if (buflen < ETHERMIN+sizeof(struct ether_header)) { 787 buflen = ETHERMIN+sizeof(struct ether_header); 788 } 789 790 buflen += 15; 791 REALIGN_DMABUF(buf,buflen); 792 if (buflen > 1520) { 793 panic("%s: packet too long\n",sc->sc_dev.dv_xname); 794 } 795 796 { 797 u_char *p = buf; 798 for (m=sc->sc_tx_mb_head; m; m = m->m_next) { 799 if (m->m_len == 0) continue; 800 bcopy(mtod(m, u_char *), p, m->m_len); 801 p += m->m_len; 802 } 803 } 804 805 error = bus_dmamap_load(sc->sc_tx_dmat, sc->sc_tx_dmamap, 806 buf,buflen,NULL,BUS_DMA_NOWAIT); 807 } 808 #endif 809 if (error) { 810 printf("%s: can't load mbuf chain, error = %d\n", 811 sc->sc_dev.dv_xname, error); 812 m_freem(sc->sc_tx_mb_head); 813 sc->sc_tx_mb_head = NULL; 814 return; 815 } 816 sc->sc_tx_loaded++; 817 818 #ifdef DIAGNOSTIC 819 if (sc->sc_tx_loaded != 1) { 820 panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname, 821 sc->sc_tx_loaded); 822 } 823 #endif 824 825 ifp->if_flags |= IFF_OACTIVE; 826 827 bus_dmamap_sync(sc->sc_tx_dmat, sc->sc_tx_dmamap, 0, 828 sc->sc_tx_dmamap->dm_mapsize, BUS_DMASYNC_PREWRITE); 829 830 nextdma_start(sc->sc_tx_nd, DMACSR_WRITE); 831 832 #if NBPFILTER > 0 833 /* 834 * Pass packet to bpf if there is a listener. 835 */ 836 if (ifp->if_bpf) 837 bpf_mtap(ifp->if_bpf, sc->sc_tx_mb_head); 838 #endif 839 840 } 841 842 /****************************************************************/ 843 844 void 845 mb8795_txdma_completed(map, arg) 846 bus_dmamap_t map; 847 void *arg; 848 { 849 struct mb8795_softc *sc = arg; 850 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 851 852 DPRINTF(("%s: mb8795_txdma_completed()\n",sc->sc_dev.dv_xname)); 853 854 #ifdef DIAGNOSTIC 855 if (!sc->sc_tx_loaded) { 856 panic("%s: tx completed never loaded ",sc->sc_dev.dv_xname); 857 } 858 if (map != sc->sc_tx_dmamap) { 859 panic("%s: unexpected tx completed map",sc->sc_dev.dv_xname); 860 } 861 862 #endif 863 } 864 865 void 866 mb8795_txdma_shutdown(arg) 867 void *arg; 868 { 869 struct mb8795_softc *sc = arg; 870 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 871 872 DPRINTF(("%s: mb8795_txdma_shutdown()\n",sc->sc_dev.dv_xname)); 873 874 #ifdef DIAGNOSTIC 875 if (!sc->sc_tx_loaded) { 876 panic("%s: tx shutdown never loaded ",sc->sc_dev.dv_xname); 877 } 878 #endif 879 880 { 881 882 if (sc->sc_tx_loaded) { 883 bus_dmamap_sync(sc->sc_tx_dmat, sc->sc_tx_dmamap, 884 0, sc->sc_tx_dmamap->dm_mapsize, 885 BUS_DMASYNC_POSTWRITE); 886 bus_dmamap_unload(sc->sc_tx_dmat, sc->sc_tx_dmamap); 887 m_freem(sc->sc_tx_mb_head); 888 sc->sc_tx_mb_head = NULL; 889 890 sc->sc_tx_loaded--; 891 } 892 893 #ifdef DIAGNOSTIC 894 if (sc->sc_tx_loaded != 0) { 895 panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname, 896 sc->sc_tx_loaded); 897 } 898 #endif 899 900 ifp->if_flags &= ~IFF_OACTIVE; 901 902 ifp->if_timer = 0; 903 904 if (ifp->if_snd.ifq_head != NULL) { 905 mb8795_start(ifp); 906 } 907 908 } 909 910 #if 0 911 /* Enable ready interrupt */ 912 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 913 bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK) 914 | XE_TXMASK_READYIE); 915 #endif 916 } 917 918 919 void 920 mb8795_rxdma_completed(map, arg) 921 bus_dmamap_t map; 922 void *arg; 923 { 924 struct mb8795_softc *sc = arg; 925 926 sc->sc_rx_completed_idx++; 927 sc->sc_rx_completed_idx %= MB8795_NRXBUFS; 928 929 DPRINTF(("%s: mb8795_rxdma_completed(), sc->sc_rx_completed_idx = %d\n", 930 sc->sc_dev.dv_xname, sc->sc_rx_completed_idx)); 931 932 #if (defined(DIAGNOSTIC)) 933 if (map != sc->sc_rx_dmamap[sc->sc_rx_completed_idx]) { 934 panic("%s: Unexpected rx dmamap completed\n", 935 sc->sc_dev.dv_xname); 936 } 937 #endif 938 } 939 940 void 941 mb8795_rxdma_shutdown(arg) 942 void *arg; 943 { 944 struct mb8795_softc *sc = arg; 945 946 printf("%s: mb8795_rxdma_shutdown(), resetting the interface\n", 947 sc->sc_dev.dv_xname); 948 949 /* we might want to just reset the DMA here instead, 950 * but this will do. 951 */ 952 mb8795_init(sc); 953 } 954 955 956 /* 957 * load a dmamap with a freshly allocated mbuf 958 */ 959 struct mbuf * 960 mb8795_rxdmamap_load(sc,map) 961 struct mb8795_softc *sc; 962 bus_dmamap_t map; 963 { 964 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 965 struct mbuf *m; 966 int error; 967 968 MGETHDR(m, M_DONTWAIT, MT_DATA); 969 if (m) { 970 MCLGET(m, M_DONTWAIT); 971 if ((m->m_flags & M_EXT) == 0) { 972 m_freem(m); 973 m = NULL; 974 } else { 975 m->m_len = MCLBYTES; 976 } 977 } 978 if (!m) { 979 /* @@@ Handle this gracefully by reusing a scratch buffer 980 * or something. 981 */ 982 panic("Unable to get memory for incoming ethernet\n"); 983 } 984 985 /* Align buffer, @@@ next specific. 986 * perhaps should be using M_ALIGN here instead? 987 * First we give us a little room to align with. 988 */ 989 { 990 u_char *buf = m->m_data; 991 int buflen = m->m_len; 992 buflen -= ENDMA_ENDALIGNMENT+DMA_BEGINALIGNMENT; 993 REALIGN_DMABUF(buf, buflen); 994 m->m_data = buf; 995 m->m_len = buflen; 996 } 997 998 m->m_pkthdr.rcvif = ifp; 999 m->m_pkthdr.len = m->m_len; 1000 1001 error = bus_dmamap_load_mbuf(sc->sc_rx_dmat, 1002 map, m, BUS_DMA_NOWAIT); 1003 1004 bus_dmamap_sync(sc->sc_rx_dmat, map, 0, 1005 map->dm_mapsize, BUS_DMASYNC_PREREAD); 1006 1007 if (error) { 1008 DPRINTF(("DEBUG: m->m_data = 0x%08x, m->m_len = %d\n", 1009 m->m_data, m->m_len)); 1010 DPRINTF(("DEBUG: MCLBYTES = %d, map->_dm_size = %d\n", 1011 MCLBYTES, map->_dm_size)); 1012 1013 panic("%s: can't load rx mbuf chain, error = %d\n", 1014 sc->sc_dev.dv_xname, error); 1015 m_freem(m); 1016 m = NULL; 1017 } 1018 1019 return(m); 1020 } 1021 1022 bus_dmamap_t 1023 mb8795_rxdma_continue(arg) 1024 void *arg; 1025 { 1026 struct mb8795_softc *sc = arg; 1027 bus_dmamap_t map = NULL; 1028 1029 /* 1030 * Currently, starts dumping new packets if the buffers 1031 * fill up. This should probably reclaim unhandled 1032 * buffers instead so we drop older packets instead 1033 * of newer ones. 1034 */ 1035 if (((sc->sc_rx_loaded_idx+1)%MB8795_NRXBUFS) != sc->sc_rx_handled_idx) { 1036 sc->sc_rx_loaded_idx++; 1037 sc->sc_rx_loaded_idx %= MB8795_NRXBUFS; 1038 map = sc->sc_rx_dmamap[sc->sc_rx_loaded_idx]; 1039 1040 DPRINTF(("%s: mb8795_rxdma_continue() sc->sc_rx_loaded_idx = %d\nn", 1041 sc->sc_dev.dv_xname,sc->sc_rx_loaded_idx)); 1042 } 1043 #if (defined(DIAGNOSTIC)) 1044 else { 1045 panic("%s: out of receive DMA buffers\n",sc->sc_dev.dv_xname); 1046 } 1047 #endif 1048 1049 return(map); 1050 } 1051 1052 bus_dmamap_t 1053 mb8795_txdma_continue(arg) 1054 void *arg; 1055 { 1056 struct mb8795_softc *sc = arg; 1057 bus_dmamap_t map = sc->sc_tx_dmamap; 1058 1059 DPRINTF(("%s: mb8795_txdma_continue()\n",sc->sc_dev.dv_xname)); 1060 1061 #ifdef DIAGNOSTIC 1062 if (sc->sc_tx_loaded != 1) { 1063 panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname, 1064 sc->sc_tx_loaded); 1065 } 1066 #endif 1067 1068 return(map); 1069 } 1070 1071 1072 /****************************************************************/ 1073 #if 0 1074 int 1075 mb8795_mediachange(ifp) 1076 struct ifnet *ifp; 1077 { 1078 struct mb8795_softc *sc = ifp->if_softc; 1079 1080 if (sc->sc_mediachange) 1081 return ((*sc->sc_mediachange)(sc)); 1082 return (EINVAL); 1083 } 1084 1085 void 1086 mb8795_mediastatus(ifp, ifmr) 1087 struct ifnet *ifp; 1088 struct ifmediareq *ifmr; 1089 { 1090 struct mb8795_softc *sc = ifp->if_softc; 1091 1092 if ((ifp->if_flags & IFF_UP) == 0) 1093 return; 1094 1095 ifmr->ifm_status = IFM_AVALID; 1096 if (sc->sc_havecarrier) 1097 ifmr->ifm_status |= IFM_ACTIVE; 1098 1099 if (sc->sc_mediastatus) 1100 (*sc->sc_mediastatus)(sc, ifmr); 1101 } 1102 #endif 1103 /****************************************************************/ 1104
Indexes created Wed Sep 24 02:09:48 GMT 2025