mb8795.c revision 1.7
1 /* $NetBSD: mb8795.c,v 1.7 1998/07/19 21:41:16 dbj Exp $ */ 2 /* 3 * Copyright (c) 1998 Darrin B. Jewell 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Darrin B. Jewell 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include "opt_inet.h" 33 #include "opt_ccitt.h" 34 #include "opt_llc.h" 35 #include "opt_ns.h" 36 #include "bpfilter.h" 37 #include "rnd.h" 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/mbuf.h> 42 #include <sys/syslog.h> 43 #include <sys/socket.h> 44 #include <sys/device.h> 45 #include <sys/malloc.h> 46 #include <sys/ioctl.h> 47 #include <sys/errno.h> 48 #if NRND > 0 49 #include <sys/rnd.h> 50 #endif 51 52 #include <net/if.h> 53 #include <net/if_dl.h> 54 #include <net/if_ether.h> 55 56 #if 0 57 #include <net/if_media.h> 58 #endif 59 60 #ifdef INET 61 #include <netinet/in.h> 62 #include <netinet/if_inarp.h> 63 #include <netinet/in_systm.h> 64 #include <netinet/in_var.h> 65 #include <netinet/ip.h> 66 #endif 67 68 #ifdef NS 69 #include <netns/ns.h> 70 #include <netns/ns_if.h> 71 #endif 72 73 #if defined(CCITT) && defined(LLC) 74 #include <sys/socketvar.h> 75 #include <netccitt/x25.h> 76 #include <netccitt/pk.h> 77 #include <netccitt/pk_var.h> 78 #include <netccitt/pk_extern.h> 79 #endif 80 81 #if NBPFILTER > 0 82 #include <net/bpf.h> 83 #include <net/bpfdesc.h> 84 #endif 85 86 #include <machine/cpu.h> 87 #include <machine/bus.h> 88 #include <machine/intr.h> 89 90 /* @@@ this is here for the REALIGN_DMABUF hack below */ 91 #include "nextdmareg.h" 92 #include "nextdmavar.h" 93 94 #include "mb8795reg.h" 95 #include "mb8795var.h" 96 97 #if 0 98 #define XE_DEBUG 99 #endif 100 101 #ifdef XE_DEBUG 102 #define DPRINTF(x) printf x; 103 #else 104 #define DPRINTF(x) 105 #endif 106 107 108 /* 109 * Support for 110 * Fujitsu Ethernet Data Link Controller (MB8795) 111 * and the Fujitsu Manchester Encoder/Decoder (MB502). 112 */ 113 114 int debugipkt = 0; 115 116 117 void mb8795_shutdown __P((void *)); 118 119 #if 0 120 int mb8795_mediachange __P((struct ifnet *)); 121 void mb8795_mediastatus __P((struct ifnet *, struct ifmediareq *)); 122 #endif 123 124 struct mbuf * mb8795_rxdmamap_load __P((struct mb8795_softc *, 125 bus_dmamap_t map)); 126 127 bus_dmamap_t mb8795_rxdma_continue __P((void *)); 128 void mb8795_rxdma_completed __P((bus_dmamap_t,void *)); 129 bus_dmamap_t mb8795_txdma_continue __P((void *)); 130 void mb8795_txdma_completed __P((bus_dmamap_t,void *)); 131 void mb8795_rxdma_shutdown __P((void *)); 132 void mb8795_txdma_shutdown __P((void *)); 133 bus_dmamap_t mb8795_txdma_restart __P((bus_dmamap_t,void *)); 134 135 void 136 mb8795_config(sc) 137 struct mb8795_softc *sc; 138 { 139 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 140 141 DPRINTF(("%s: mb8795_config()\n",sc->sc_dev.dv_xname)); 142 143 /* Initialize ifnet structure. */ 144 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 145 ifp->if_softc = sc; 146 ifp->if_start = mb8795_start; 147 ifp->if_ioctl = mb8795_ioctl; 148 ifp->if_watchdog = mb8795_watchdog; 149 ifp->if_flags = 150 IFF_BROADCAST | IFF_NOTRAILERS; 151 152 #if 0 153 /* Initialize ifmedia structures. */ 154 ifmedia_init(&sc->sc_media, 0, mb8795_mediachange, mb8795_mediastatus); 155 if (sc->sc_supmedia != NULL) { 156 int i; 157 for (i = 0; i < sc->sc_nsupmedia; i++) 158 ifmedia_add(&sc->sc_media, sc->sc_supmedia[i], 159 0, NULL); 160 ifmedia_set(&sc->sc_media, sc->sc_defaultmedia); 161 } else { 162 ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_MANUAL, 0, NULL); 163 ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_MANUAL); 164 } 165 #endif 166 167 /* Attach the interface. */ 168 if_attach(ifp); 169 ether_ifattach(ifp, sc->sc_enaddr); 170 171 /* decrease the mtu on this interface to deal with 172 * alignment problems 173 */ 174 ifp->if_mtu -= 16; 175 176 #if NBPFILTER > 0 177 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 178 #endif 179 180 sc->sc_sh = shutdownhook_establish(mb8795_shutdown, sc); 181 if (sc->sc_sh == NULL) 182 panic("mb8795_config: can't establish shutdownhook"); 183 184 #if NRND > 0 185 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 186 RND_TYPE_NET); 187 #endif 188 189 /* Initialize the dma maps */ 190 { 191 int error; 192 if ((error = bus_dmamap_create(sc->sc_tx_dmat, MCLBYTES, 193 (MCLBYTES/MSIZE), MCLBYTES, 0, BUS_DMA_ALLOCNOW, 194 &sc->sc_tx_dmamap)) != 0) { 195 panic("%s: can't create tx DMA map, error = %d\n", 196 sc->sc_dev.dv_xname, error); 197 } 198 { 199 int i; 200 for(i=0;i<MB8795_NRXBUFS;i++) { 201 if ((error = bus_dmamap_create(sc->sc_rx_dmat, MCLBYTES, 202 (MCLBYTES/MSIZE), MCLBYTES, 0, BUS_DMA_ALLOCNOW, 203 &sc->sc_rx_dmamap[i])) != 0) { 204 panic("%s: can't create rx DMA map, error = %d\n", 205 sc->sc_dev.dv_xname, error); 206 } 207 sc->sc_rx_mb_head[i] = NULL; 208 } 209 sc->sc_rx_loaded_idx = 0; 210 sc->sc_rx_completed_idx = 0; 211 sc->sc_rx_handled_idx = 0; 212 } 213 } 214 215 /* @@@ more next hacks 216 * the 2000 covers at least a 1500 mtu + headers 217 * + DMA_BEGINALIGNMENT+ ENDMA_ENDALIGNMENT 218 */ 219 sc->sc_txbuf = malloc(2000, M_DEVBUF, M_NOWAIT); 220 if (!sc->sc_txbuf) panic("%s: can't malloc tx DMA buffer", 221 sc->sc_dev.dv_xname); 222 223 sc->sc_tx_mb_head = NULL; 224 sc->sc_tx_loaded = 0; 225 226 sc->sc_tx_nd->nd_chaining_flag = 0; 227 sc->sc_tx_nd->nd_shutdown_cb = mb8795_txdma_shutdown; 228 sc->sc_tx_nd->nd_continue_cb = mb8795_txdma_continue; 229 sc->sc_tx_nd->nd_completed_cb = mb8795_txdma_completed; 230 sc->sc_tx_nd->nd_cb_arg = sc; 231 232 sc->sc_rx_nd->nd_chaining_flag = 1; 233 sc->sc_rx_nd->nd_shutdown_cb = mb8795_rxdma_shutdown; 234 sc->sc_rx_nd->nd_continue_cb = mb8795_rxdma_continue; 235 sc->sc_rx_nd->nd_completed_cb = mb8795_rxdma_completed; 236 sc->sc_rx_nd->nd_cb_arg = sc; 237 238 DPRINTF(("%s: leaving mb8795_config()\n",sc->sc_dev.dv_xname)); 239 } 240 241 242 /****************************************************************/ 243 #if 0 244 #define XCHR(x) "0123456789abcdef"[(x) & 0xf] 245 static void 246 hex_dump(unsigned char *pkt, size_t len) 247 { 248 size_t i, j; 249 250 printf("0000: "); 251 for(i=0; i<len; i++) { 252 printf("%c%c ", XCHR(pkt[i]>>4), XCHR(pkt[i])); 253 if ((i+1) % 16 == 0) { 254 printf(" %c", '"'); 255 for(j=0; j<16; j++) 256 printf("%c", pkt[i-15+j]>=32 && pkt[i-15+j]<127?pkt[i-15+j]:'.'); 257 printf("%c\n%c%c%c%c: ", '"', XCHR((i+1)>>12), 258 XCHR((i+1)>>8), XCHR((i+1)>>4), XCHR(i+1)); 259 } 260 } 261 printf("\n"); 262 } 263 #endif 264 265 /* 266 * Controller receive interrupt. 267 */ 268 void 269 mb8795_rint(sc) 270 struct mb8795_softc *sc; 271 { 272 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 273 int error = 0; 274 u_char rxstat; 275 u_char rxmask; 276 277 rxstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT); 278 rxmask = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK); 279 280 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT, XE_RXSTAT_CLEAR); 281 282 #if 0 283 DPRINTF(("%s: rx interrupt, rxstat = %b\n", 284 sc->sc_dev.dv_xname, rxstat, XE_RXSTAT_BITS)); 285 #endif 286 287 if (rxstat & XE_RXSTAT_RESET) { 288 DPRINTF(("%s: rx reset packet\n", 289 sc->sc_dev.dv_xname)); 290 error++; 291 } 292 if (rxstat & XE_RXSTAT_SHORT) { 293 DPRINTF(("%s: rx short packet\n", 294 sc->sc_dev.dv_xname)); 295 error++; 296 } 297 if (rxstat & XE_RXSTAT_ALIGNERR) { 298 DPRINTF(("%s: rx alignment error\n", 299 sc->sc_dev.dv_xname)); 300 error++; 301 } 302 if (rxstat & XE_RXSTAT_CRCERR) { 303 DPRINTF(("%s: rx CRC error\n", 304 sc->sc_dev.dv_xname)); 305 error++; 306 } 307 if (rxstat & XE_RXSTAT_OVERFLOW) { 308 DPRINTF(("%s: rx overflow error\n", 309 sc->sc_dev.dv_xname)); 310 error++; 311 } 312 313 if (error) { 314 ifp->if_ierrors++; 315 /* @@@ handle more gracefully, free memory, etc. */ 316 } 317 318 if (rxstat & XE_RXSTAT_OK) { 319 int s; 320 s = spldma(); 321 322 while(sc->sc_rx_handled_idx != sc->sc_rx_completed_idx) { 323 struct mbuf *m; 324 bus_dmamap_t map; 325 326 sc->sc_rx_handled_idx++; 327 sc->sc_rx_handled_idx %= MB8795_NRXBUFS; 328 329 /* Should probably not do this much while interrupts 330 * are disabled, but for now we will. 331 */ 332 333 map = sc->sc_rx_dmamap[sc->sc_rx_handled_idx]; 334 m = sc->sc_rx_mb_head[sc->sc_rx_handled_idx]; 335 336 bus_dmamap_sync(sc->sc_rx_dmat, map, 337 0, map->dm_mapsize, BUS_DMASYNC_POSTREAD); 338 339 340 /* Find receive length and chop off CRC */ 341 /* @@@ assumes packet is all in first segment 342 * also assumes segment length is length of packet. 343 * see comment in nextdma.c nextdma_intr(); 344 */ 345 m->m_pkthdr.len = map->dm_segs[0].ds_len-4; 346 m->m_len = map->dm_segs[0].ds_len-4; 347 m->m_pkthdr.rcvif = ifp; 348 349 bus_dmamap_unload(sc->sc_rx_dmat, map); 350 351 /* Install a fresh mbuf for next packet */ 352 353 sc->sc_rx_mb_head[sc->sc_rx_handled_idx] = 354 mb8795_rxdmamap_load(sc,map); 355 356 /* enable interrupts while we process the packet */ 357 splx(s); 358 359 #if defined(XE_DEBUG) 360 /* Peek at the packet */ 361 DPRINTF(("%s: received packet, at VA 0x%08x-0x%08x,len %d\n", 362 sc->sc_dev.dv_xname,mtod(m,u_char *),mtod(m,u_char *)+m->m_len,m->m_len)); 363 #if 0 364 hex_dump(mtod(m,u_char *), m->m_pkthdr.len < 255 ? m->m_pkthdr.len : 128 ); 365 #endif 366 #endif 367 368 { 369 struct ether_header *eh; 370 371 ifp->if_ipackets++; 372 debugipkt++; 373 374 /* We assume that the header fit entirely in one mbuf. */ 375 eh = mtod(m, struct ether_header *); 376 377 /* Pass the packet up, with the ether header sort-of removed. */ 378 m_adj(m, sizeof(struct ether_header)); 379 ether_input(ifp, eh, m); 380 } 381 382 s = spldma(); 383 384 } 385 386 splx(s); 387 388 } 389 390 DPRINTF(("%s: rx interrupt, rxstat = %b\n", 391 sc->sc_dev.dv_xname, rxstat, XE_RXSTAT_BITS)); 392 393 #if 0 && defined(XE_DEBUG) 394 { 395 DPRINTF(("rxstat = 0x%b\n", 396 bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT), XE_RXSTAT_BITS)); 397 DPRINTF(("rxmask = 0x%b\n", 398 bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK), XE_RXMASK_BITS)); 399 DPRINTF(("rxmode = 0x%b\n", 400 bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMODE), XE_RXMODE_BITS)); 401 } 402 #endif 403 404 return; 405 } 406 407 /* 408 * Controller transmit interrupt. 409 */ 410 void 411 mb8795_tint(sc) 412 struct mb8795_softc *sc; 413 414 { 415 int reset = 0; 416 u_char txstat; 417 u_char txmask; 418 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 419 420 txstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT); 421 txmask = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK); 422 423 #if 0 424 DPRINTF(("%s: tx interrupt, txstat = %b\n", 425 sc->sc_dev.dv_xname, txstat, XE_TXSTAT_BITS)); 426 #endif 427 428 if (txstat & XE_TXSTAT_SHORTED) { 429 printf("%s: tx cable shorted\n", sc->sc_dev.dv_xname); 430 ifp->if_oerrors++; 431 } 432 if (txstat & XE_TXSTAT_UNDERFLOW) { 433 printf("%s: tx underflow\n", sc->sc_dev.dv_xname); 434 ifp->if_oerrors++; 435 } 436 if (txstat & XE_TXSTAT_COLLERR) { 437 DPRINTF(("%s: tx collision\n", sc->sc_dev.dv_xname)); 438 ifp->if_collisions++; 439 } 440 if (txstat & XE_TXSTAT_COLLERR16) { 441 printf("%s: tx 16th collision\n", sc->sc_dev.dv_xname); 442 ifp->if_oerrors++; 443 ifp->if_collisions += 16; 444 } 445 446 if (reset) { 447 mb8795_reset(sc); 448 return; 449 } 450 451 #if 0 452 if (txstat & XE_TXSTAT_READY) { 453 454 panic("%s: unexpected tx interrupt %b", 455 sc->sc_dev.dv_xname,txstat,XE_TXSTAT_BITS); 456 457 /* turn interrupt off */ 458 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 459 txmask & ~XE_TXMASK_READYIE); 460 } 461 #endif 462 463 return; 464 } 465 466 /****************************************************************/ 467 468 void 469 mb8795_reset(sc) 470 struct mb8795_softc *sc; 471 { 472 int s; 473 474 s = splimp(); 475 mb8795_init(sc); 476 splx(s); 477 } 478 479 void 480 mb8795_watchdog(ifp) 481 struct ifnet *ifp; 482 { 483 struct mb8795_softc *sc = ifp->if_softc; 484 485 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 486 ++ifp->if_oerrors; 487 488 DPRINTF(("%s: %d input errors, %d input packets\n", 489 sc->sc_dev.dv_xname, ifp->if_ierrors, ifp->if_ipackets)); 490 491 mb8795_reset(sc); 492 } 493 494 /* 495 * Initialization of interface; set up initialization block 496 * and transmit/receive descriptor rings. 497 * @@@ error handling is bogus in here. memory leaks 498 */ 499 void 500 mb8795_init(sc) 501 struct mb8795_softc *sc; 502 { 503 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 504 505 m_freem(sc->sc_tx_mb_head); 506 sc->sc_tx_mb_head = NULL; 507 sc->sc_tx_loaded = 0; 508 509 { 510 int i; 511 for(i=0;i<MB8795_NRXBUFS;i++) { 512 if (sc->sc_rx_mb_head[i]) { 513 bus_dmamap_unload(sc->sc_rx_dmat, sc->sc_rx_dmamap[i]); 514 m_freem(sc->sc_rx_mb_head[i]); 515 } 516 sc->sc_rx_mb_head[i] = 517 mb8795_rxdmamap_load(sc, sc->sc_rx_dmamap[i]); 518 } 519 sc->sc_rx_loaded_idx = 0; 520 sc->sc_rx_completed_idx = 0; 521 sc->sc_rx_handled_idx = 0; 522 } 523 524 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RESET, XE_RESET_MODE); 525 526 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMODE, XE_TXMODE_LB_DISABLE); 527 #if 0 /* This interrupt was sometimes failing to ack correctly 528 * causing a loop @@@ 529 */ 530 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 531 XE_TXMASK_UNDERFLOWIE | XE_TXMASK_COLLIE | XE_TXMASK_COLL16IE 532 | XE_TXMASK_PARERRIE); 533 #else 534 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 0); 535 #endif 536 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT, XE_TXSTAT_CLEAR); 537 538 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXMODE, XE_RXMODE_NORMAL); 539 540 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK, 541 XE_RXMASK_OKIE | XE_RXMASK_RESETIE | XE_RXMASK_SHORTIE | 542 XE_RXMASK_ALIGNERRIE | XE_RXMASK_CRCERRIE | XE_RXMASK_OVERFLOWIE); 543 544 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT, XE_RXSTAT_CLEAR); 545 546 { 547 int i; 548 for(i=0;i<sizeof(sc->sc_enaddr);i++) { 549 bus_space_write_1(sc->sc_bst,sc->sc_bsh,XE_ENADDR+i,sc->sc_enaddr[i]); 550 } 551 } 552 553 DPRINTF(("%s: initializing ethernet %02x:%02x:%02x:%02x:%02x:%02x, size=%d\n", 554 sc->sc_dev.dv_xname, 555 sc->sc_enaddr[0],sc->sc_enaddr[1],sc->sc_enaddr[2], 556 sc->sc_enaddr[3],sc->sc_enaddr[4],sc->sc_enaddr[5], 557 sizeof(sc->sc_enaddr))); 558 559 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RESET, 0); 560 561 ifp->if_flags |= IFF_RUNNING; 562 ifp->if_flags &= ~IFF_OACTIVE; 563 ifp->if_timer = 0; 564 565 nextdma_init(sc->sc_tx_nd); 566 nextdma_init(sc->sc_rx_nd); 567 568 nextdma_start(sc->sc_rx_nd, DMACSR_READ); 569 570 if (ifp->if_snd.ifq_head != NULL) { 571 mb8795_start(ifp); 572 } 573 } 574 575 void 576 mb8795_stop(sc) 577 struct mb8795_softc *sc; 578 { 579 printf("%s: stop not implemented\n", sc->sc_dev.dv_xname); 580 } 581 582 583 void 584 mb8795_shutdown(arg) 585 void *arg; 586 { 587 struct mb8795_softc *sc = (struct mb8795_softc *)arg; 588 mb8795_stop(sc); 589 } 590 591 /****************************************************************/ 592 int 593 mb8795_ioctl(ifp, cmd, data) 594 register struct ifnet *ifp; 595 u_long cmd; 596 caddr_t data; 597 { 598 register struct mb8795_softc *sc = ifp->if_softc; 599 struct ifaddr *ifa = (struct ifaddr *)data; 600 struct ifreq *ifr = (struct ifreq *)data; 601 int s, error = 0; 602 603 s = splimp(); 604 605 switch (cmd) { 606 607 case SIOCSIFADDR: 608 ifp->if_flags |= IFF_UP; 609 610 switch (ifa->ifa_addr->sa_family) { 611 #ifdef INET 612 case AF_INET: 613 mb8795_init(sc); 614 arp_ifinit(ifp, ifa); 615 break; 616 #endif 617 #ifdef NS 618 case AF_NS: 619 { 620 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 621 622 if (ns_nullhost(*ina)) 623 ina->x_host = 624 *(union ns_host *)LLADDR(ifp->if_sadl); 625 else { 626 bcopy(ina->x_host.c_host, 627 LLADDR(ifp->if_sadl), 628 sizeof(sc->sc_enaddr)); 629 } 630 /* Set new address. */ 631 mb8795_init(sc); 632 break; 633 } 634 #endif 635 default: 636 mb8795_init(sc); 637 break; 638 } 639 break; 640 641 #if defined(CCITT) && defined(LLC) 642 case SIOCSIFCONF_X25: 643 ifp->if_flags |= IFF_UP; 644 ifa->ifa_rtrequest = cons_rtrequest; /* XXX */ 645 error = x25_llcglue(PRC_IFUP, ifa->ifa_addr); 646 if (error == 0) 647 mb8795_init(sc); 648 break; 649 #endif /* CCITT && LLC */ 650 651 case SIOCSIFFLAGS: 652 if ((ifp->if_flags & IFF_UP) == 0 && 653 (ifp->if_flags & IFF_RUNNING) != 0) { 654 /* 655 * If interface is marked down and it is running, then 656 * stop it. 657 */ 658 mb8795_stop(sc); 659 ifp->if_flags &= ~IFF_RUNNING; 660 } else if ((ifp->if_flags & IFF_UP) != 0 && 661 (ifp->if_flags & IFF_RUNNING) == 0) { 662 /* 663 * If interface is marked up and it is stopped, then 664 * start it. 665 */ 666 mb8795_init(sc); 667 } else { 668 /* 669 * Reset the interface to pick up changes in any other 670 * flags that affect hardware registers. 671 */ 672 /*mb8795_stop(sc);*/ 673 mb8795_init(sc); 674 } 675 #ifdef XE_DEBUG 676 if (ifp->if_flags & IFF_DEBUG) 677 sc->sc_debug = 1; 678 else 679 sc->sc_debug = 0; 680 #endif 681 break; 682 683 case SIOCADDMULTI: 684 case SIOCDELMULTI: 685 error = (cmd == SIOCADDMULTI) ? 686 ether_addmulti(ifr, &sc->sc_ethercom) : 687 ether_delmulti(ifr, &sc->sc_ethercom); 688 689 if (error == ENETRESET) { 690 /* 691 * Multicast list has changed; set the hardware filter 692 * accordingly. 693 */ 694 mb8795_reset(sc); 695 error = 0; 696 } 697 break; 698 699 #if 0 700 case SIOCGIFMEDIA: 701 case SIOCSIFMEDIA: 702 error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd); 703 break; 704 #endif 705 706 default: 707 error = EINVAL; 708 break; 709 } 710 711 splx(s); 712 713 #if 0 714 DPRINTF(("DEBUG: mb8795_ioctl(0x%lx) returning %d\n", 715 cmd,error)); 716 #endif 717 718 return (error); 719 } 720 721 /* 722 * Setup output on interface. 723 * Get another datagram to send off of the interface queue, and map it to the 724 * interface before starting the output. 725 * Called only at splimp or interrupt level. 726 */ 727 void 728 mb8795_start(ifp) 729 struct ifnet *ifp; 730 { 731 int error; 732 struct mb8795_softc *sc = ifp->if_softc; 733 734 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 735 return; 736 737 DPRINTF(("%s: mb8795_start()\n",sc->sc_dev.dv_xname)); 738 739 #if (defined(DIAGNOSTIC)) 740 { 741 u_char txstat; 742 txstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT); 743 if (!(txstat & XE_TXSTAT_READY)) { 744 /* @@@ I used to panic here, but then it paniced once. 745 * Let's see if I can just reset instead. [ dbj 980706.1900 ] 746 */ 747 printf("%s: transmitter not ready\n", sc->sc_dev.dv_xname); 748 mb8795_reset(sc); 749 return; 750 } 751 } 752 #endif 753 754 #if 0 755 return; /* @@@ Turn off xmit for debugging */ 756 #endif 757 758 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT, XE_TXSTAT_CLEAR); 759 760 IF_DEQUEUE(&ifp->if_snd, sc->sc_tx_mb_head); 761 if (sc->sc_tx_mb_head == 0) { 762 printf("%s: No packet to start\n", 763 sc->sc_dev.dv_xname); 764 return; 765 } 766 767 ifp->if_timer = 5; 768 769 /* The following is a next specific hack that should 770 * probably be moved out of MI code. 771 * This macro assumes it can move forward as needed 772 * in the buffer. Perhaps it should zero the extra buffer. 773 */ 774 #define REALIGN_DMABUF(s,l) \ 775 { (s) = ((u_char *)(((unsigned)(s)+DMA_BEGINALIGNMENT-1) \ 776 &~(DMA_BEGINALIGNMENT-1))); \ 777 (l) = ((u_char *)(((unsigned)((s)+(l))+ENDMA_ENDALIGNMENT-1) \ 778 &~(ENDMA_ENDALIGNMENT-1)))-(s);} 779 780 #if 0 781 error = bus_dmamap_load_mbuf(sc->sc_tx_dmat, 782 sc->sc_tx_dmamap, 783 sc->sc_tx_mb_head, 784 BUS_DMA_NOWAIT); 785 #else 786 { 787 u_char *buf = sc->sc_txbuf; 788 int buflen = 0; 789 struct mbuf *m = sc->sc_tx_mb_head; 790 buflen = m->m_pkthdr.len; 791 792 /* Fix runt packets, @@@ memory overrun */ 793 if (buflen < ETHERMIN+sizeof(struct ether_header)) { 794 buflen = ETHERMIN+sizeof(struct ether_header); 795 } 796 797 buflen += 15; 798 REALIGN_DMABUF(buf,buflen); 799 if (buflen > 1520) { 800 panic("%s: packet too long\n",sc->sc_dev.dv_xname); 801 } 802 803 { 804 u_char *p = buf; 805 for (m=sc->sc_tx_mb_head; m; m = m->m_next) { 806 if (m->m_len == 0) continue; 807 bcopy(mtod(m, u_char *), p, m->m_len); 808 p += m->m_len; 809 } 810 } 811 812 error = bus_dmamap_load(sc->sc_tx_dmat, sc->sc_tx_dmamap, 813 buf,buflen,NULL,BUS_DMA_NOWAIT); 814 } 815 #endif 816 if (error) { 817 printf("%s: can't load mbuf chain, error = %d\n", 818 sc->sc_dev.dv_xname, error); 819 m_freem(sc->sc_tx_mb_head); 820 sc->sc_tx_mb_head = NULL; 821 return; 822 } 823 sc->sc_tx_loaded++; 824 825 #ifdef DIAGNOSTIC 826 if (sc->sc_tx_loaded != 1) { 827 panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname, 828 sc->sc_tx_loaded); 829 } 830 #endif 831 832 ifp->if_flags |= IFF_OACTIVE; 833 834 bus_dmamap_sync(sc->sc_tx_dmat, sc->sc_tx_dmamap, 0, 835 sc->sc_tx_dmamap->dm_mapsize, BUS_DMASYNC_PREWRITE); 836 837 nextdma_start(sc->sc_tx_nd, DMACSR_WRITE); 838 839 #if NBPFILTER > 0 840 /* 841 * Pass packet to bpf if there is a listener. 842 */ 843 if (ifp->if_bpf) 844 bpf_mtap(ifp->if_bpf, sc->sc_tx_mb_head); 845 #endif 846 847 } 848 849 /****************************************************************/ 850 851 void 852 mb8795_txdma_completed(map, arg) 853 bus_dmamap_t map; 854 void *arg; 855 { 856 struct mb8795_softc *sc = arg; 857 858 DPRINTF(("%s: mb8795_txdma_completed()\n",sc->sc_dev.dv_xname)); 859 860 #ifdef DIAGNOSTIC 861 if (!sc->sc_tx_loaded) { 862 panic("%s: tx completed never loaded ",sc->sc_dev.dv_xname); 863 } 864 if (map != sc->sc_tx_dmamap) { 865 panic("%s: unexpected tx completed map",sc->sc_dev.dv_xname); 866 } 867 868 #endif 869 } 870 871 void 872 mb8795_txdma_shutdown(arg) 873 void *arg; 874 { 875 struct mb8795_softc *sc = arg; 876 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 877 878 DPRINTF(("%s: mb8795_txdma_shutdown()\n",sc->sc_dev.dv_xname)); 879 880 #ifdef DIAGNOSTIC 881 if (!sc->sc_tx_loaded) { 882 panic("%s: tx shutdown never loaded ",sc->sc_dev.dv_xname); 883 } 884 #endif 885 886 { 887 888 if (sc->sc_tx_loaded) { 889 bus_dmamap_sync(sc->sc_tx_dmat, sc->sc_tx_dmamap, 890 0, sc->sc_tx_dmamap->dm_mapsize, 891 BUS_DMASYNC_POSTWRITE); 892 bus_dmamap_unload(sc->sc_tx_dmat, sc->sc_tx_dmamap); 893 m_freem(sc->sc_tx_mb_head); 894 sc->sc_tx_mb_head = NULL; 895 896 sc->sc_tx_loaded--; 897 } 898 899 #ifdef DIAGNOSTIC 900 if (sc->sc_tx_loaded != 0) { 901 panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname, 902 sc->sc_tx_loaded); 903 } 904 #endif 905 906 ifp->if_flags &= ~IFF_OACTIVE; 907 908 ifp->if_timer = 0; 909 910 if (ifp->if_snd.ifq_head != NULL) { 911 mb8795_start(ifp); 912 } 913 914 } 915 916 #if 0 917 /* Enable ready interrupt */ 918 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 919 bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK) 920 | XE_TXMASK_READYIE); 921 #endif 922 } 923 924 925 void 926 mb8795_rxdma_completed(map, arg) 927 bus_dmamap_t map; 928 void *arg; 929 { 930 struct mb8795_softc *sc = arg; 931 932 sc->sc_rx_completed_idx++; 933 sc->sc_rx_completed_idx %= MB8795_NRXBUFS; 934 935 DPRINTF(("%s: mb8795_rxdma_completed(), sc->sc_rx_completed_idx = %d\n", 936 sc->sc_dev.dv_xname, sc->sc_rx_completed_idx)); 937 938 #if (defined(DIAGNOSTIC)) 939 if (map != sc->sc_rx_dmamap[sc->sc_rx_completed_idx]) { 940 panic("%s: Unexpected rx dmamap completed\n", 941 sc->sc_dev.dv_xname); 942 } 943 #endif 944 } 945 946 void 947 mb8795_rxdma_shutdown(arg) 948 void *arg; 949 { 950 struct mb8795_softc *sc = arg; 951 952 printf("%s: mb8795_rxdma_shutdown(), resetting the interface\n", 953 sc->sc_dev.dv_xname); 954 955 /* we might want to just reset the DMA here instead, 956 * but this will do. 957 */ 958 mb8795_init(sc); 959 } 960 961 962 /* 963 * load a dmamap with a freshly allocated mbuf 964 */ 965 struct mbuf * 966 mb8795_rxdmamap_load(sc,map) 967 struct mb8795_softc *sc; 968 bus_dmamap_t map; 969 { 970 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 971 struct mbuf *m; 972 int error; 973 974 MGETHDR(m, M_DONTWAIT, MT_DATA); 975 if (m) { 976 MCLGET(m, M_DONTWAIT); 977 if ((m->m_flags & M_EXT) == 0) { 978 m_freem(m); 979 m = NULL; 980 } else { 981 m->m_len = MCLBYTES; 982 } 983 } 984 if (!m) { 985 /* @@@ Handle this gracefully by reusing a scratch buffer 986 * or something. 987 */ 988 panic("Unable to get memory for incoming ethernet\n"); 989 } 990 991 /* Align buffer, @@@ next specific. 992 * perhaps should be using M_ALIGN here instead? 993 * First we give us a little room to align with. 994 */ 995 { 996 u_char *buf = m->m_data; 997 int buflen = m->m_len; 998 buflen -= ENDMA_ENDALIGNMENT+DMA_BEGINALIGNMENT; 999 REALIGN_DMABUF(buf, buflen); 1000 m->m_data = buf; 1001 m->m_len = buflen; 1002 } 1003 1004 m->m_pkthdr.rcvif = ifp; 1005 m->m_pkthdr.len = m->m_len; 1006 1007 error = bus_dmamap_load_mbuf(sc->sc_rx_dmat, 1008 map, m, BUS_DMA_NOWAIT); 1009 1010 bus_dmamap_sync(sc->sc_rx_dmat, map, 0, 1011 map->dm_mapsize, BUS_DMASYNC_PREREAD); 1012 1013 if (error) { 1014 DPRINTF(("DEBUG: m->m_data = 0x%08x, m->m_len = %d\n", 1015 m->m_data, m->m_len)); 1016 DPRINTF(("DEBUG: MCLBYTES = %d, map->_dm_size = %d\n", 1017 MCLBYTES, map->_dm_size)); 1018 1019 panic("%s: can't load rx mbuf chain, error = %d\n", 1020 sc->sc_dev.dv_xname, error); 1021 m_freem(m); 1022 m = NULL; 1023 } 1024 1025 return(m); 1026 } 1027 1028 bus_dmamap_t 1029 mb8795_rxdma_continue(arg) 1030 void *arg; 1031 { 1032 struct mb8795_softc *sc = arg; 1033 bus_dmamap_t map = NULL; 1034 1035 /* 1036 * Currently, starts dumping new packets if the buffers 1037 * fill up. This should probably reclaim unhandled 1038 * buffers instead so we drop older packets instead 1039 * of newer ones. 1040 */ 1041 if (((sc->sc_rx_loaded_idx+1)%MB8795_NRXBUFS) != sc->sc_rx_handled_idx) { 1042 sc->sc_rx_loaded_idx++; 1043 sc->sc_rx_loaded_idx %= MB8795_NRXBUFS; 1044 map = sc->sc_rx_dmamap[sc->sc_rx_loaded_idx]; 1045 1046 DPRINTF(("%s: mb8795_rxdma_continue() sc->sc_rx_loaded_idx = %d\nn", 1047 sc->sc_dev.dv_xname,sc->sc_rx_loaded_idx)); 1048 } 1049 #if (defined(DIAGNOSTIC)) 1050 else { 1051 printf("%s: out of receive DMA buffers\n",sc->sc_dev.dv_xname); 1052 } 1053 #endif 1054 1055 return(map); 1056 } 1057 1058 bus_dmamap_t 1059 mb8795_txdma_continue(arg) 1060 void *arg; 1061 { 1062 struct mb8795_softc *sc = arg; 1063 bus_dmamap_t map = sc->sc_tx_dmamap; 1064 1065 DPRINTF(("%s: mb8795_txdma_continue()\n",sc->sc_dev.dv_xname)); 1066 1067 #ifdef DIAGNOSTIC 1068 if (sc->sc_tx_loaded != 1) { 1069 panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname, 1070 sc->sc_tx_loaded); 1071 } 1072 #endif 1073 1074 return(map); 1075 } 1076 1077 1078 /****************************************************************/ 1079 #if 0 1080 int 1081 mb8795_mediachange(ifp) 1082 struct ifnet *ifp; 1083 { 1084 struct mb8795_softc *sc = ifp->if_softc; 1085 1086 if (sc->sc_mediachange) 1087 return ((*sc->sc_mediachange)(sc)); 1088 return (EINVAL); 1089 } 1090 1091 void 1092 mb8795_mediastatus(ifp, ifmr) 1093 struct ifnet *ifp; 1094 struct ifmediareq *ifmr; 1095 { 1096 struct mb8795_softc *sc = ifp->if_softc; 1097 1098 if ((ifp->if_flags & IFF_UP) == 0) 1099 return; 1100 1101 ifmr->ifm_status = IFM_AVALID; 1102 if (sc->sc_havecarrier) 1103 ifmr->ifm_status |= IFM_ACTIVE; 1104 1105 if (sc->sc_mediastatus) 1106 (*sc->sc_mediastatus)(sc, ifmr); 1107 } 1108 #endif 1109 /****************************************************************/ 1110
Indexes created Mon Sep 22 21:09:42 GMT 2025