mb8795.c revision 1.8
1 /* $NetBSD: mb8795.c,v 1.8 1998/12/19 09:31:44 dbj Exp $ */ 2 /* 3 * Copyright (c) 1998 Darrin B. Jewell 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Darrin B. Jewell 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include "opt_inet.h" 33 #include "opt_ccitt.h" 34 #include "opt_llc.h" 35 #include "opt_ns.h" 36 #include "bpfilter.h" 37 #include "rnd.h" 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/mbuf.h> 42 #include <sys/syslog.h> 43 #include <sys/socket.h> 44 #include <sys/device.h> 45 #include <sys/malloc.h> 46 #include <sys/ioctl.h> 47 #include <sys/errno.h> 48 #if NRND > 0 49 #include <sys/rnd.h> 50 #endif 51 52 #include <net/if.h> 53 #include <net/if_dl.h> 54 #include <net/if_ether.h> 55 56 #if 0 57 #include <net/if_media.h> 58 #endif 59 60 #ifdef INET 61 #include <netinet/in.h> 62 #include <netinet/if_inarp.h> 63 #include <netinet/in_systm.h> 64 #include <netinet/in_var.h> 65 #include <netinet/ip.h> 66 #endif 67 68 #ifdef NS 69 #include <netns/ns.h> 70 #include <netns/ns_if.h> 71 #endif 72 73 #if defined(CCITT) && defined(LLC) 74 #include <sys/socketvar.h> 75 #include <netccitt/x25.h> 76 #include <netccitt/pk.h> 77 #include <netccitt/pk_var.h> 78 #include <netccitt/pk_extern.h> 79 #endif 80 81 #if NBPFILTER > 0 82 #include <net/bpf.h> 83 #include <net/bpfdesc.h> 84 #endif 85 86 #include <machine/cpu.h> 87 #include <machine/bus.h> 88 #include <machine/intr.h> 89 90 /* @@@ this is here for the REALIGN_DMABUF hack below */ 91 #include "nextdmareg.h" 92 #include "nextdmavar.h" 93 94 #include "mb8795reg.h" 95 #include "mb8795var.h" 96 97 #if 0 98 #define XE_DEBUG 99 #endif 100 101 #ifdef XE_DEBUG 102 #define DPRINTF(x) printf x; 103 #else 104 #define DPRINTF(x) 105 #endif 106 107 108 /* 109 * Support for 110 * Fujitsu Ethernet Data Link Controller (MB8795) 111 * and the Fujitsu Manchester Encoder/Decoder (MB502). 112 */ 113 114 int debugipkt = 0; 115 116 117 void mb8795_shutdown __P((void *)); 118 119 #if 0 120 int mb8795_mediachange __P((struct ifnet *)); 121 void mb8795_mediastatus __P((struct ifnet *, struct ifmediareq *)); 122 #endif 123 124 struct mbuf * mb8795_rxdmamap_load __P((struct mb8795_softc *, 125 bus_dmamap_t map)); 126 127 bus_dmamap_t mb8795_rxdma_continue __P((void *)); 128 void mb8795_rxdma_completed __P((bus_dmamap_t,void *)); 129 bus_dmamap_t mb8795_txdma_continue __P((void *)); 130 void mb8795_txdma_completed __P((bus_dmamap_t,void *)); 131 void mb8795_rxdma_shutdown __P((void *)); 132 void mb8795_txdma_shutdown __P((void *)); 133 bus_dmamap_t mb8795_txdma_restart __P((bus_dmamap_t,void *)); 134 135 void 136 mb8795_config(sc) 137 struct mb8795_softc *sc; 138 { 139 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 140 141 DPRINTF(("%s: mb8795_config()\n",sc->sc_dev.dv_xname)); 142 143 /* Initialize ifnet structure. */ 144 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 145 ifp->if_softc = sc; 146 ifp->if_start = mb8795_start; 147 ifp->if_ioctl = mb8795_ioctl; 148 ifp->if_watchdog = mb8795_watchdog; 149 ifp->if_flags = 150 IFF_BROADCAST | IFF_NOTRAILERS; 151 152 #if 0 153 /* Initialize ifmedia structures. */ 154 ifmedia_init(&sc->sc_media, 0, mb8795_mediachange, mb8795_mediastatus); 155 if (sc->sc_supmedia != NULL) { 156 int i; 157 for (i = 0; i < sc->sc_nsupmedia; i++) 158 ifmedia_add(&sc->sc_media, sc->sc_supmedia[i], 159 0, NULL); 160 ifmedia_set(&sc->sc_media, sc->sc_defaultmedia); 161 } else { 162 ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_MANUAL, 0, NULL); 163 ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_MANUAL); 164 } 165 #endif 166 167 /* Attach the interface. */ 168 if_attach(ifp); 169 ether_ifattach(ifp, sc->sc_enaddr); 170 171 /* decrease the mtu on this interface to deal with 172 * alignment problems 173 */ 174 ifp->if_mtu -= 16; 175 176 #if NBPFILTER > 0 177 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 178 #endif 179 180 sc->sc_sh = shutdownhook_establish(mb8795_shutdown, sc); 181 if (sc->sc_sh == NULL) 182 panic("mb8795_config: can't establish shutdownhook"); 183 184 #if NRND > 0 185 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 186 RND_TYPE_NET); 187 #endif 188 189 /* Initialize the dma maps */ 190 { 191 int error; 192 if ((error = bus_dmamap_create(sc->sc_tx_dmat, MCLBYTES, 193 (MCLBYTES/MSIZE), MCLBYTES, 0, BUS_DMA_ALLOCNOW, 194 &sc->sc_tx_dmamap)) != 0) { 195 panic("%s: can't create tx DMA map, error = %d\n", 196 sc->sc_dev.dv_xname, error); 197 } 198 { 199 int i; 200 for(i=0;i<MB8795_NRXBUFS;i++) { 201 if ((error = bus_dmamap_create(sc->sc_rx_dmat, MCLBYTES, 202 (MCLBYTES/MSIZE), MCLBYTES, 0, BUS_DMA_ALLOCNOW, 203 &sc->sc_rx_dmamap[i])) != 0) { 204 panic("%s: can't create rx DMA map, error = %d\n", 205 sc->sc_dev.dv_xname, error); 206 } 207 sc->sc_rx_mb_head[i] = NULL; 208 } 209 sc->sc_rx_loaded_idx = 0; 210 sc->sc_rx_completed_idx = 0; 211 sc->sc_rx_handled_idx = 0; 212 } 213 } 214 215 /* @@@ more next hacks 216 * the 2000 covers at least a 1500 mtu + headers 217 * + DMA_BEGINALIGNMENT+ ENDMA_ENDALIGNMENT 218 */ 219 sc->sc_txbuf = malloc(2000, M_DEVBUF, M_NOWAIT); 220 if (!sc->sc_txbuf) panic("%s: can't malloc tx DMA buffer", 221 sc->sc_dev.dv_xname); 222 223 sc->sc_tx_mb_head = NULL; 224 sc->sc_tx_loaded = 0; 225 226 sc->sc_tx_nd->nd_shutdown_cb = mb8795_txdma_shutdown; 227 sc->sc_tx_nd->nd_continue_cb = mb8795_txdma_continue; 228 sc->sc_tx_nd->nd_completed_cb = mb8795_txdma_completed; 229 sc->sc_tx_nd->nd_cb_arg = sc; 230 231 sc->sc_rx_nd->nd_shutdown_cb = mb8795_rxdma_shutdown; 232 sc->sc_rx_nd->nd_continue_cb = mb8795_rxdma_continue; 233 sc->sc_rx_nd->nd_completed_cb = mb8795_rxdma_completed; 234 sc->sc_rx_nd->nd_cb_arg = sc; 235 236 DPRINTF(("%s: leaving mb8795_config()\n",sc->sc_dev.dv_xname)); 237 } 238 239 240 /****************************************************************/ 241 #if 0 242 #define XCHR(x) "0123456789abcdef"[(x) & 0xf] 243 static void 244 hex_dump(unsigned char *pkt, size_t len) 245 { 246 size_t i, j; 247 248 printf("0000: "); 249 for(i=0; i<len; i++) { 250 printf("%c%c ", XCHR(pkt[i]>>4), XCHR(pkt[i])); 251 if ((i+1) % 16 == 0) { 252 printf(" %c", '"'); 253 for(j=0; j<16; j++) 254 printf("%c", pkt[i-15+j]>=32 && pkt[i-15+j]<127?pkt[i-15+j]:'.'); 255 printf("%c\n%c%c%c%c: ", '"', XCHR((i+1)>>12), 256 XCHR((i+1)>>8), XCHR((i+1)>>4), XCHR(i+1)); 257 } 258 } 259 printf("\n"); 260 } 261 #endif 262 263 /* 264 * Controller receive interrupt. 265 */ 266 void 267 mb8795_rint(sc) 268 struct mb8795_softc *sc; 269 { 270 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 271 int error = 0; 272 u_char rxstat; 273 u_char rxmask; 274 275 rxstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT); 276 rxmask = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK); 277 278 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT, XE_RXSTAT_CLEAR); 279 280 #if 0 281 DPRINTF(("%s: rx interrupt, rxstat = %b\n", 282 sc->sc_dev.dv_xname, rxstat, XE_RXSTAT_BITS)); 283 #endif 284 285 if (rxstat & XE_RXSTAT_RESET) { 286 DPRINTF(("%s: rx reset packet\n", 287 sc->sc_dev.dv_xname)); 288 error++; 289 } 290 if (rxstat & XE_RXSTAT_SHORT) { 291 DPRINTF(("%s: rx short packet\n", 292 sc->sc_dev.dv_xname)); 293 error++; 294 } 295 if (rxstat & XE_RXSTAT_ALIGNERR) { 296 DPRINTF(("%s: rx alignment error\n", 297 sc->sc_dev.dv_xname)); 298 error++; 299 } 300 if (rxstat & XE_RXSTAT_CRCERR) { 301 DPRINTF(("%s: rx CRC error\n", 302 sc->sc_dev.dv_xname)); 303 error++; 304 } 305 if (rxstat & XE_RXSTAT_OVERFLOW) { 306 DPRINTF(("%s: rx overflow error\n", 307 sc->sc_dev.dv_xname)); 308 error++; 309 } 310 311 if (error) { 312 ifp->if_ierrors++; 313 /* @@@ handle more gracefully, free memory, etc. */ 314 } 315 316 if (rxstat & XE_RXSTAT_OK) { 317 int s; 318 s = spldma(); 319 320 while(sc->sc_rx_handled_idx != sc->sc_rx_completed_idx) { 321 struct mbuf *m; 322 bus_dmamap_t map; 323 324 sc->sc_rx_handled_idx++; 325 sc->sc_rx_handled_idx %= MB8795_NRXBUFS; 326 327 /* Should probably not do this much while interrupts 328 * are disabled, but for now we will. 329 */ 330 331 map = sc->sc_rx_dmamap[sc->sc_rx_handled_idx]; 332 m = sc->sc_rx_mb_head[sc->sc_rx_handled_idx]; 333 334 bus_dmamap_sync(sc->sc_rx_dmat, map, 335 0, map->dm_mapsize, BUS_DMASYNC_POSTREAD); 336 337 338 /* Find receive length and chop off CRC */ 339 /* @@@ assumes packet is all in first segment 340 * also assumes segment length is length of packet. 341 * see comment in nextdma.c nextdma_intr(); 342 */ 343 m->m_pkthdr.len = map->dm_segs[0].ds_len-4; 344 m->m_len = map->dm_segs[0].ds_len-4; 345 m->m_pkthdr.rcvif = ifp; 346 347 bus_dmamap_unload(sc->sc_rx_dmat, map); 348 349 /* Install a fresh mbuf for next packet */ 350 351 sc->sc_rx_mb_head[sc->sc_rx_handled_idx] = 352 mb8795_rxdmamap_load(sc,map); 353 354 /* enable interrupts while we process the packet */ 355 splx(s); 356 357 #if defined(XE_DEBUG) 358 /* Peek at the packet */ 359 DPRINTF(("%s: received packet, at VA 0x%08x-0x%08x,len %d\n", 360 sc->sc_dev.dv_xname,mtod(m,u_char *),mtod(m,u_char *)+m->m_len,m->m_len)); 361 #if 0 362 hex_dump(mtod(m,u_char *), m->m_pkthdr.len < 255 ? m->m_pkthdr.len : 128 ); 363 #endif 364 #endif 365 366 { 367 struct ether_header *eh; 368 369 ifp->if_ipackets++; 370 debugipkt++; 371 372 /* We assume that the header fit entirely in one mbuf. */ 373 eh = mtod(m, struct ether_header *); 374 375 /* Pass the packet up, with the ether header sort-of removed. */ 376 m_adj(m, sizeof(struct ether_header)); 377 ether_input(ifp, eh, m); 378 } 379 380 s = spldma(); 381 382 } 383 384 splx(s); 385 386 } 387 388 DPRINTF(("%s: rx interrupt, rxstat = %b\n", 389 sc->sc_dev.dv_xname, rxstat, XE_RXSTAT_BITS)); 390 391 #if 0 && defined(XE_DEBUG) 392 { 393 DPRINTF(("rxstat = 0x%b\n", 394 bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT), XE_RXSTAT_BITS)); 395 DPRINTF(("rxmask = 0x%b\n", 396 bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK), XE_RXMASK_BITS)); 397 DPRINTF(("rxmode = 0x%b\n", 398 bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMODE), XE_RXMODE_BITS)); 399 } 400 #endif 401 402 return; 403 } 404 405 /* 406 * Controller transmit interrupt. 407 */ 408 void 409 mb8795_tint(sc) 410 struct mb8795_softc *sc; 411 412 { 413 int reset = 0; 414 u_char txstat; 415 u_char txmask; 416 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 417 418 txstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT); 419 txmask = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK); 420 421 #if 0 422 DPRINTF(("%s: tx interrupt, txstat = %b\n", 423 sc->sc_dev.dv_xname, txstat, XE_TXSTAT_BITS)); 424 #endif 425 426 if (txstat & XE_TXSTAT_SHORTED) { 427 printf("%s: tx cable shorted\n", sc->sc_dev.dv_xname); 428 ifp->if_oerrors++; 429 } 430 if (txstat & XE_TXSTAT_UNDERFLOW) { 431 printf("%s: tx underflow\n", sc->sc_dev.dv_xname); 432 ifp->if_oerrors++; 433 } 434 if (txstat & XE_TXSTAT_COLLERR) { 435 DPRINTF(("%s: tx collision\n", sc->sc_dev.dv_xname)); 436 ifp->if_collisions++; 437 } 438 if (txstat & XE_TXSTAT_COLLERR16) { 439 printf("%s: tx 16th collision\n", sc->sc_dev.dv_xname); 440 ifp->if_oerrors++; 441 ifp->if_collisions += 16; 442 } 443 444 if (reset) { 445 mb8795_reset(sc); 446 return; 447 } 448 449 #if 0 450 if (txstat & XE_TXSTAT_READY) { 451 452 panic("%s: unexpected tx interrupt %b", 453 sc->sc_dev.dv_xname,txstat,XE_TXSTAT_BITS); 454 455 /* turn interrupt off */ 456 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 457 txmask & ~XE_TXMASK_READYIE); 458 } 459 #endif 460 461 return; 462 } 463 464 /****************************************************************/ 465 466 void 467 mb8795_reset(sc) 468 struct mb8795_softc *sc; 469 { 470 int s; 471 472 s = splimp(); 473 mb8795_init(sc); 474 splx(s); 475 } 476 477 void 478 mb8795_watchdog(ifp) 479 struct ifnet *ifp; 480 { 481 struct mb8795_softc *sc = ifp->if_softc; 482 483 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 484 ++ifp->if_oerrors; 485 486 DPRINTF(("%s: %d input errors, %d input packets\n", 487 sc->sc_dev.dv_xname, ifp->if_ierrors, ifp->if_ipackets)); 488 489 mb8795_reset(sc); 490 } 491 492 /* 493 * Initialization of interface; set up initialization block 494 * and transmit/receive descriptor rings. 495 * @@@ error handling is bogus in here. memory leaks 496 */ 497 void 498 mb8795_init(sc) 499 struct mb8795_softc *sc; 500 { 501 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 502 503 m_freem(sc->sc_tx_mb_head); 504 sc->sc_tx_mb_head = NULL; 505 sc->sc_tx_loaded = 0; 506 507 { 508 int i; 509 for(i=0;i<MB8795_NRXBUFS;i++) { 510 if (sc->sc_rx_mb_head[i]) { 511 bus_dmamap_unload(sc->sc_rx_dmat, sc->sc_rx_dmamap[i]); 512 m_freem(sc->sc_rx_mb_head[i]); 513 } 514 sc->sc_rx_mb_head[i] = 515 mb8795_rxdmamap_load(sc, sc->sc_rx_dmamap[i]); 516 } 517 sc->sc_rx_loaded_idx = 0; 518 sc->sc_rx_completed_idx = 0; 519 sc->sc_rx_handled_idx = 0; 520 } 521 522 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RESET, XE_RESET_MODE); 523 524 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMODE, XE_TXMODE_LB_DISABLE); 525 #if 0 /* This interrupt was sometimes failing to ack correctly 526 * causing a loop @@@ 527 */ 528 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 529 XE_TXMASK_UNDERFLOWIE | XE_TXMASK_COLLIE | XE_TXMASK_COLL16IE 530 | XE_TXMASK_PARERRIE); 531 #else 532 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 0); 533 #endif 534 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT, XE_TXSTAT_CLEAR); 535 536 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXMODE, XE_RXMODE_NORMAL); 537 538 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK, 539 XE_RXMASK_OKIE | XE_RXMASK_RESETIE | XE_RXMASK_SHORTIE | 540 XE_RXMASK_ALIGNERRIE | XE_RXMASK_CRCERRIE | XE_RXMASK_OVERFLOWIE); 541 542 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT, XE_RXSTAT_CLEAR); 543 544 { 545 int i; 546 for(i=0;i<sizeof(sc->sc_enaddr);i++) { 547 bus_space_write_1(sc->sc_bst,sc->sc_bsh,XE_ENADDR+i,sc->sc_enaddr[i]); 548 } 549 } 550 551 DPRINTF(("%s: initializing ethernet %02x:%02x:%02x:%02x:%02x:%02x, size=%d\n", 552 sc->sc_dev.dv_xname, 553 sc->sc_enaddr[0],sc->sc_enaddr[1],sc->sc_enaddr[2], 554 sc->sc_enaddr[3],sc->sc_enaddr[4],sc->sc_enaddr[5], 555 sizeof(sc->sc_enaddr))); 556 557 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RESET, 0); 558 559 ifp->if_flags |= IFF_RUNNING; 560 ifp->if_flags &= ~IFF_OACTIVE; 561 ifp->if_timer = 0; 562 563 nextdma_init(sc->sc_tx_nd); 564 nextdma_init(sc->sc_rx_nd); 565 566 nextdma_start(sc->sc_rx_nd, DMACSR_READ); 567 568 if (ifp->if_snd.ifq_head != NULL) { 569 mb8795_start(ifp); 570 } 571 } 572 573 void 574 mb8795_stop(sc) 575 struct mb8795_softc *sc; 576 { 577 printf("%s: stop not implemented\n", sc->sc_dev.dv_xname); 578 } 579 580 581 void 582 mb8795_shutdown(arg) 583 void *arg; 584 { 585 struct mb8795_softc *sc = (struct mb8795_softc *)arg; 586 mb8795_stop(sc); 587 } 588 589 /****************************************************************/ 590 int 591 mb8795_ioctl(ifp, cmd, data) 592 register struct ifnet *ifp; 593 u_long cmd; 594 caddr_t data; 595 { 596 register struct mb8795_softc *sc = ifp->if_softc; 597 struct ifaddr *ifa = (struct ifaddr *)data; 598 struct ifreq *ifr = (struct ifreq *)data; 599 int s, error = 0; 600 601 s = splimp(); 602 603 switch (cmd) { 604 605 case SIOCSIFADDR: 606 ifp->if_flags |= IFF_UP; 607 608 switch (ifa->ifa_addr->sa_family) { 609 #ifdef INET 610 case AF_INET: 611 mb8795_init(sc); 612 arp_ifinit(ifp, ifa); 613 break; 614 #endif 615 #ifdef NS 616 case AF_NS: 617 { 618 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 619 620 if (ns_nullhost(*ina)) 621 ina->x_host = 622 *(union ns_host *)LLADDR(ifp->if_sadl); 623 else { 624 bcopy(ina->x_host.c_host, 625 LLADDR(ifp->if_sadl), 626 sizeof(sc->sc_enaddr)); 627 } 628 /* Set new address. */ 629 mb8795_init(sc); 630 break; 631 } 632 #endif 633 default: 634 mb8795_init(sc); 635 break; 636 } 637 break; 638 639 #if defined(CCITT) && defined(LLC) 640 case SIOCSIFCONF_X25: 641 ifp->if_flags |= IFF_UP; 642 ifa->ifa_rtrequest = cons_rtrequest; /* XXX */ 643 error = x25_llcglue(PRC_IFUP, ifa->ifa_addr); 644 if (error == 0) 645 mb8795_init(sc); 646 break; 647 #endif /* CCITT && LLC */ 648 649 case SIOCSIFFLAGS: 650 if ((ifp->if_flags & IFF_UP) == 0 && 651 (ifp->if_flags & IFF_RUNNING) != 0) { 652 /* 653 * If interface is marked down and it is running, then 654 * stop it. 655 */ 656 mb8795_stop(sc); 657 ifp->if_flags &= ~IFF_RUNNING; 658 } else if ((ifp->if_flags & IFF_UP) != 0 && 659 (ifp->if_flags & IFF_RUNNING) == 0) { 660 /* 661 * If interface is marked up and it is stopped, then 662 * start it. 663 */ 664 mb8795_init(sc); 665 } else { 666 /* 667 * Reset the interface to pick up changes in any other 668 * flags that affect hardware registers. 669 */ 670 /*mb8795_stop(sc);*/ 671 mb8795_init(sc); 672 } 673 #ifdef XE_DEBUG 674 if (ifp->if_flags & IFF_DEBUG) 675 sc->sc_debug = 1; 676 else 677 sc->sc_debug = 0; 678 #endif 679 break; 680 681 case SIOCADDMULTI: 682 case SIOCDELMULTI: 683 error = (cmd == SIOCADDMULTI) ? 684 ether_addmulti(ifr, &sc->sc_ethercom) : 685 ether_delmulti(ifr, &sc->sc_ethercom); 686 687 if (error == ENETRESET) { 688 /* 689 * Multicast list has changed; set the hardware filter 690 * accordingly. 691 */ 692 mb8795_reset(sc); 693 error = 0; 694 } 695 break; 696 697 #if 0 698 case SIOCGIFMEDIA: 699 case SIOCSIFMEDIA: 700 error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd); 701 break; 702 #endif 703 704 default: 705 error = EINVAL; 706 break; 707 } 708 709 splx(s); 710 711 #if 0 712 DPRINTF(("DEBUG: mb8795_ioctl(0x%lx) returning %d\n", 713 cmd,error)); 714 #endif 715 716 return (error); 717 } 718 719 /* 720 * Setup output on interface. 721 * Get another datagram to send off of the interface queue, and map it to the 722 * interface before starting the output. 723 * Called only at splimp or interrupt level. 724 */ 725 void 726 mb8795_start(ifp) 727 struct ifnet *ifp; 728 { 729 int error; 730 struct mb8795_softc *sc = ifp->if_softc; 731 732 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 733 return; 734 735 DPRINTF(("%s: mb8795_start()\n",sc->sc_dev.dv_xname)); 736 737 #if (defined(DIAGNOSTIC)) 738 { 739 u_char txstat; 740 txstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT); 741 if (!(txstat & XE_TXSTAT_READY)) { 742 /* @@@ I used to panic here, but then it paniced once. 743 * Let's see if I can just reset instead. [ dbj 980706.1900 ] 744 */ 745 printf("%s: transmitter not ready\n", sc->sc_dev.dv_xname); 746 mb8795_reset(sc); 747 return; 748 } 749 } 750 #endif 751 752 #if 0 753 return; /* @@@ Turn off xmit for debugging */ 754 #endif 755 756 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT, XE_TXSTAT_CLEAR); 757 758 IF_DEQUEUE(&ifp->if_snd, sc->sc_tx_mb_head); 759 if (sc->sc_tx_mb_head == 0) { 760 printf("%s: No packet to start\n", 761 sc->sc_dev.dv_xname); 762 return; 763 } 764 765 ifp->if_timer = 5; 766 767 /* The following is a next specific hack that should 768 * probably be moved out of MI code. 769 * This macro assumes it can move forward as needed 770 * in the buffer. Perhaps it should zero the extra buffer. 771 */ 772 #define REALIGN_DMABUF(s,l) \ 773 { (s) = ((u_char *)(((unsigned)(s)+DMA_BEGINALIGNMENT-1) \ 774 &~(DMA_BEGINALIGNMENT-1))); \ 775 (l) = ((u_char *)(((unsigned)((s)+(l))+ENDMA_ENDALIGNMENT-1) \ 776 &~(ENDMA_ENDALIGNMENT-1)))-(s);} 777 778 #if 0 779 error = bus_dmamap_load_mbuf(sc->sc_tx_dmat, 780 sc->sc_tx_dmamap, 781 sc->sc_tx_mb_head, 782 BUS_DMA_NOWAIT); 783 #else 784 { 785 u_char *buf = sc->sc_txbuf; 786 int buflen = 0; 787 struct mbuf *m = sc->sc_tx_mb_head; 788 buflen = m->m_pkthdr.len; 789 790 /* Fix runt packets, @@@ memory overrun */ 791 if (buflen < ETHERMIN+sizeof(struct ether_header)) { 792 buflen = ETHERMIN+sizeof(struct ether_header); 793 } 794 795 buflen += 15; 796 REALIGN_DMABUF(buf,buflen); 797 if (buflen > 1520) { 798 panic("%s: packet too long\n",sc->sc_dev.dv_xname); 799 } 800 801 { 802 u_char *p = buf; 803 for (m=sc->sc_tx_mb_head; m; m = m->m_next) { 804 if (m->m_len == 0) continue; 805 bcopy(mtod(m, u_char *), p, m->m_len); 806 p += m->m_len; 807 } 808 } 809 810 error = bus_dmamap_load(sc->sc_tx_dmat, sc->sc_tx_dmamap, 811 buf,buflen,NULL,BUS_DMA_NOWAIT); 812 } 813 #endif 814 if (error) { 815 printf("%s: can't load mbuf chain, error = %d\n", 816 sc->sc_dev.dv_xname, error); 817 m_freem(sc->sc_tx_mb_head); 818 sc->sc_tx_mb_head = NULL; 819 return; 820 } 821 822 #ifdef DIAGNOSTIC 823 if (sc->sc_tx_loaded != 0) { 824 panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname, 825 sc->sc_tx_loaded); 826 } 827 #endif 828 829 ifp->if_flags |= IFF_OACTIVE; 830 831 bus_dmamap_sync(sc->sc_tx_dmat, sc->sc_tx_dmamap, 0, 832 sc->sc_tx_dmamap->dm_mapsize, BUS_DMASYNC_PREWRITE); 833 834 nextdma_start(sc->sc_tx_nd, DMACSR_WRITE); 835 836 #if NBPFILTER > 0 837 /* 838 * Pass packet to bpf if there is a listener. 839 */ 840 if (ifp->if_bpf) 841 bpf_mtap(ifp->if_bpf, sc->sc_tx_mb_head); 842 #endif 843 844 } 845 846 /****************************************************************/ 847 848 void 849 mb8795_txdma_completed(map, arg) 850 bus_dmamap_t map; 851 void *arg; 852 { 853 struct mb8795_softc *sc = arg; 854 855 DPRINTF(("%s: mb8795_txdma_completed()\n",sc->sc_dev.dv_xname)); 856 857 #ifdef DIAGNOSTIC 858 if (!sc->sc_tx_loaded) { 859 panic("%s: tx completed never loaded ",sc->sc_dev.dv_xname); 860 } 861 if (map != sc->sc_tx_dmamap) { 862 panic("%s: unexpected tx completed map",sc->sc_dev.dv_xname); 863 } 864 865 #endif 866 } 867 868 void 869 mb8795_txdma_shutdown(arg) 870 void *arg; 871 { 872 struct mb8795_softc *sc = arg; 873 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 874 875 DPRINTF(("%s: mb8795_txdma_shutdown()\n",sc->sc_dev.dv_xname)); 876 877 #ifdef DIAGNOSTIC 878 if (!sc->sc_tx_loaded) { 879 panic("%s: tx shutdown never loaded ",sc->sc_dev.dv_xname); 880 } 881 #endif 882 883 { 884 885 if (sc->sc_tx_loaded) { 886 bus_dmamap_sync(sc->sc_tx_dmat, sc->sc_tx_dmamap, 887 0, sc->sc_tx_dmamap->dm_mapsize, 888 BUS_DMASYNC_POSTWRITE); 889 bus_dmamap_unload(sc->sc_tx_dmat, sc->sc_tx_dmamap); 890 m_freem(sc->sc_tx_mb_head); 891 sc->sc_tx_mb_head = NULL; 892 893 sc->sc_tx_loaded--; 894 } 895 896 #ifdef DIAGNOSTIC 897 if (sc->sc_tx_loaded != 0) { 898 panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname, 899 sc->sc_tx_loaded); 900 } 901 #endif 902 903 ifp->if_flags &= ~IFF_OACTIVE; 904 905 ifp->if_timer = 0; 906 907 if (ifp->if_snd.ifq_head != NULL) { 908 mb8795_start(ifp); 909 } 910 911 } 912 913 #if 0 914 /* Enable ready interrupt */ 915 bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 916 bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK) 917 | XE_TXMASK_READYIE); 918 #endif 919 } 920 921 922 void 923 mb8795_rxdma_completed(map, arg) 924 bus_dmamap_t map; 925 void *arg; 926 { 927 struct mb8795_softc *sc = arg; 928 929 sc->sc_rx_completed_idx++; 930 sc->sc_rx_completed_idx %= MB8795_NRXBUFS; 931 932 DPRINTF(("%s: mb8795_rxdma_completed(), sc->sc_rx_completed_idx = %d\n", 933 sc->sc_dev.dv_xname, sc->sc_rx_completed_idx)); 934 935 #if (defined(DIAGNOSTIC)) 936 if (map != sc->sc_rx_dmamap[sc->sc_rx_completed_idx]) { 937 panic("%s: Unexpected rx dmamap completed\n", 938 sc->sc_dev.dv_xname); 939 } 940 #endif 941 } 942 943 void 944 mb8795_rxdma_shutdown(arg) 945 void *arg; 946 { 947 struct mb8795_softc *sc = arg; 948 949 panic("%s: mb8795_rxdma_shutdown() unexpected", sc->sc_dev.dv_xname); 950 } 951 952 953 /* 954 * load a dmamap with a freshly allocated mbuf 955 */ 956 struct mbuf * 957 mb8795_rxdmamap_load(sc,map) 958 struct mb8795_softc *sc; 959 bus_dmamap_t map; 960 { 961 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 962 struct mbuf *m; 963 int error; 964 965 MGETHDR(m, M_DONTWAIT, MT_DATA); 966 if (m) { 967 MCLGET(m, M_DONTWAIT); 968 if ((m->m_flags & M_EXT) == 0) { 969 m_freem(m); 970 m = NULL; 971 } else { 972 m->m_len = MCLBYTES; 973 } 974 } 975 if (!m) { 976 /* @@@ Handle this gracefully by reusing a scratch buffer 977 * or something. 978 */ 979 panic("Unable to get memory for incoming ethernet\n"); 980 } 981 982 /* Align buffer, @@@ next specific. 983 * perhaps should be using M_ALIGN here instead? 984 * First we give us a little room to align with. 985 */ 986 { 987 u_char *buf = m->m_data; 988 int buflen = m->m_len; 989 buflen -= ENDMA_ENDALIGNMENT+DMA_BEGINALIGNMENT; 990 REALIGN_DMABUF(buf, buflen); 991 m->m_data = buf; 992 m->m_len = buflen; 993 } 994 995 m->m_pkthdr.rcvif = ifp; 996 m->m_pkthdr.len = m->m_len; 997 998 error = bus_dmamap_load_mbuf(sc->sc_rx_dmat, 999 map, m, BUS_DMA_NOWAIT); 1000 1001 bus_dmamap_sync(sc->sc_rx_dmat, map, 0, 1002 map->dm_mapsize, BUS_DMASYNC_PREREAD); 1003 1004 if (error) { 1005 DPRINTF(("DEBUG: m->m_data = 0x%08x, m->m_len = %d\n", 1006 m->m_data, m->m_len)); 1007 DPRINTF(("DEBUG: MCLBYTES = %d, map->_dm_size = %d\n", 1008 MCLBYTES, map->_dm_size)); 1009 1010 panic("%s: can't load rx mbuf chain, error = %d\n", 1011 sc->sc_dev.dv_xname, error); 1012 m_freem(m); 1013 m = NULL; 1014 } 1015 1016 return(m); 1017 } 1018 1019 bus_dmamap_t 1020 mb8795_rxdma_continue(arg) 1021 void *arg; 1022 { 1023 struct mb8795_softc *sc = arg; 1024 bus_dmamap_t map = NULL; 1025 1026 /* 1027 * Currently, starts dumping new packets if the buffers 1028 * fill up. This should probably reclaim unhandled 1029 * buffers instead so we drop older packets instead 1030 * of newer ones. 1031 */ 1032 if (((sc->sc_rx_loaded_idx+1)%MB8795_NRXBUFS) != sc->sc_rx_handled_idx) { 1033 sc->sc_rx_loaded_idx++; 1034 sc->sc_rx_loaded_idx %= MB8795_NRXBUFS; 1035 map = sc->sc_rx_dmamap[sc->sc_rx_loaded_idx]; 1036 1037 DPRINTF(("%s: mb8795_rxdma_continue() sc->sc_rx_loaded_idx = %d\nn", 1038 sc->sc_dev.dv_xname,sc->sc_rx_loaded_idx)); 1039 } 1040 #if (defined(DIAGNOSTIC)) 1041 else { 1042 printf("%s: out of receive DMA buffers\n",sc->sc_dev.dv_xname); 1043 } 1044 #endif 1045 1046 return(map); 1047 } 1048 1049 bus_dmamap_t 1050 mb8795_txdma_continue(arg) 1051 void *arg; 1052 { 1053 struct mb8795_softc *sc = arg; 1054 bus_dmamap_t map; 1055 1056 DPRINTF(("%s: mb8795_txdma_continue()\n",sc->sc_dev.dv_xname)); 1057 1058 if (sc->sc_tx_loaded) { 1059 map = NULL; 1060 } else { 1061 map = sc->sc_tx_dmamap; 1062 sc->sc_tx_loaded++; 1063 } 1064 1065 #ifdef DIAGNOSTIC 1066 if (sc->sc_tx_loaded != 1) { 1067 panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname, 1068 sc->sc_tx_loaded); 1069 } 1070 #endif 1071 1072 return(map); 1073 } 1074 1075 1076 /****************************************************************/ 1077 #if 0 1078 int 1079 mb8795_mediachange(ifp) 1080 struct ifnet *ifp; 1081 { 1082 struct mb8795_softc *sc = ifp->if_softc; 1083 1084 if (sc->sc_mediachange) 1085 return ((*sc->sc_mediachange)(sc)); 1086 return (EINVAL); 1087 } 1088 1089 void 1090 mb8795_mediastatus(ifp, ifmr) 1091 struct ifnet *ifp; 1092 struct ifmediareq *ifmr; 1093 { 1094 struct mb8795_softc *sc = ifp->if_softc; 1095 1096 if ((ifp->if_flags & IFF_UP) == 0) 1097 return; 1098 1099 ifmr->ifm_status = IFM_AVALID; 1100 if (sc->sc_havecarrier) 1101 ifmr->ifm_status |= IFM_ACTIVE; 1102 1103 if (sc->sc_mediastatus) 1104 (*sc->sc_mediastatus)(sc, ifmr); 1105 } 1106 #endif 1107 /****************************************************************/ 1108
Indexes created Tue Sep 23 07:09:52 GMT 2025