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bus_dma.h revision 1.3.2.3
      1  1.3.2.3  bouyer /* $NetBSD: bus_dma.h,v 1.3.2.3 2001/04/21 17:54:24 bouyer Exp $ */
      2      1.2     dbj 
      3      1.2     dbj /*
      4      1.2     dbj  * This file was extracted from from alpha/include/bus.h
      5      1.2     dbj  * and should probably be resynced when needed.
      6      1.2     dbj  * Darrin B. Jewell <dbj (at) netbsd.org> Sat Jul 31 06:11:33 UTC 1999
      7      1.2     dbj  * original cvs id: NetBSD: bus.h,v 1.29 1999/06/18 04:49:24 cgd Exp
      8      1.2     dbj  */
      9      1.2     dbj 
     10      1.1     dbj 
     11      1.1     dbj /*-
     12  1.3.2.2  bouyer  * Copyright (c) 1997, 1998, 2001 The NetBSD Foundation, Inc.
     13      1.1     dbj  * All rights reserved.
     14      1.1     dbj  *
     15      1.1     dbj  * This code is derived from software contributed to The NetBSD Foundation
     16      1.1     dbj  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
     17      1.1     dbj  * NASA Ames Research Center.
     18      1.1     dbj  *
     19      1.1     dbj  * Redistribution and use in source and binary forms, with or without
     20      1.1     dbj  * modification, are permitted provided that the following conditions
     21      1.1     dbj  * are met:
     22      1.1     dbj  * 1. Redistributions of source code must retain the above copyright
     23      1.1     dbj  *    notice, this list of conditions and the following disclaimer.
     24      1.1     dbj  * 2. Redistributions in binary form must reproduce the above copyright
     25      1.1     dbj  *    notice, this list of conditions and the following disclaimer in the
     26      1.1     dbj  *    documentation and/or other materials provided with the distribution.
     27      1.1     dbj  * 3. All advertising materials mentioning features or use of this software
     28      1.1     dbj  *    must display the following acknowledgement:
     29      1.1     dbj  *	This product includes software developed by the NetBSD
     30      1.1     dbj  *	Foundation, Inc. and its contributors.
     31      1.1     dbj  * 4. Neither the name of The NetBSD Foundation nor the names of its
     32      1.1     dbj  *    contributors may be used to endorse or promote products derived
     33      1.1     dbj  *    from this software without specific prior written permission.
     34      1.1     dbj  *
     35      1.1     dbj  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     36      1.1     dbj  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     37      1.1     dbj  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     38      1.1     dbj  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     39      1.1     dbj  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     40      1.1     dbj  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     41      1.1     dbj  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     42      1.1     dbj  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     43      1.1     dbj  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     44      1.1     dbj  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     45      1.1     dbj  * POSSIBILITY OF SUCH DAMAGE.
     46      1.1     dbj  */
     47      1.1     dbj 
     48      1.1     dbj /*
     49      1.1     dbj  * Copyright (c) 1996 Carnegie-Mellon University.
     50      1.1     dbj  * All rights reserved.
     51      1.1     dbj  *
     52      1.1     dbj  * Author: Chris G. Demetriou
     53      1.1     dbj  *
     54      1.1     dbj  * Permission to use, copy, modify and distribute this software and
     55      1.1     dbj  * its documentation is hereby granted, provided that both the copyright
     56      1.1     dbj  * notice and this permission notice appear in all copies of the
     57      1.1     dbj  * software, derivative works or modified versions, and any portions
     58      1.1     dbj  * thereof, and that both notices appear in supporting documentation.
     59      1.1     dbj  *
     60      1.1     dbj  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     61      1.1     dbj  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     62      1.1     dbj  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     63      1.1     dbj  *
     64      1.1     dbj  * Carnegie Mellon requests users of this software to return to
     65      1.1     dbj  *
     66      1.1     dbj  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     67      1.1     dbj  *  School of Computer Science
     68      1.1     dbj  *  Carnegie Mellon University
     69      1.1     dbj  *  Pittsburgh PA 15213-3890
     70      1.1     dbj  *
     71      1.1     dbj  * any improvements or extensions that they make and grant Carnegie the
     72      1.1     dbj  * rights to redistribute these changes.
     73      1.1     dbj  */
     74      1.1     dbj 
     75      1.2     dbj #ifndef _NEXT68K_BUS_DMA_H_
     76      1.2     dbj #define	_NEXT68K_BUS_DMA_H_
     77      1.1     dbj 
     78      1.1     dbj /*
     79      1.1     dbj  * Bus DMA methods.
     80      1.1     dbj  */
     81      1.1     dbj 
     82      1.1     dbj /*
     83      1.1     dbj  * Flags used in various bus DMA methods.
     84      1.1     dbj  */
     85      1.1     dbj #define	BUS_DMA_WAITOK		0x00	/* safe to sleep (pseudo-flag) */
     86      1.1     dbj #define	BUS_DMA_NOWAIT		0x01	/* not safe to sleep */
     87      1.1     dbj #define	BUS_DMA_ALLOCNOW	0x02	/* perform resource allocation now */
     88      1.1     dbj #define	BUS_DMA_COHERENT	0x04	/* hint: map memory DMA coherent */
     89  1.3.2.2  bouyer #define	BUS_DMA_STREAMING	0x08	/* hint: sequential, unidirectional */
     90      1.1     dbj #define	BUS_DMA_BUS1		0x10	/* placeholders for bus functions... */
     91      1.1     dbj #define	BUS_DMA_BUS2		0x20
     92      1.1     dbj #define	BUS_DMA_BUS3		0x40
     93      1.1     dbj #define	BUS_DMA_BUS4		0x80
     94      1.1     dbj 
     95      1.1     dbj /* Forwards needed by prototypes below. */
     96      1.1     dbj struct mbuf;
     97      1.1     dbj struct uio;
     98      1.1     dbj 
     99      1.1     dbj /*
    100      1.1     dbj  * Operations performed by bus_dmamap_sync().
    101      1.1     dbj  */
    102      1.1     dbj #define	BUS_DMASYNC_PREREAD	0x01	/* pre-read synchronization */
    103      1.1     dbj #define	BUS_DMASYNC_POSTREAD	0x02	/* post-read synchronization */
    104      1.1     dbj #define	BUS_DMASYNC_PREWRITE	0x04	/* pre-write synchronization */
    105      1.1     dbj #define	BUS_DMASYNC_POSTWRITE	0x08	/* post-write synchronization */
    106      1.1     dbj 
    107      1.2     dbj typedef struct next68k_bus_dma_tag *bus_dma_tag_t;
    108      1.2     dbj typedef struct next68k_bus_dmamap *bus_dmamap_t;
    109      1.1     dbj 
    110      1.1     dbj /*
    111      1.1     dbj  *	bus_dma_segment_t
    112      1.1     dbj  *
    113      1.1     dbj  *	Describes a single contiguous DMA transaction.  Values
    114      1.1     dbj  *	are suitable for programming into DMA registers.
    115      1.1     dbj  */
    116      1.2     dbj struct next68k_bus_dma_segment {
    117      1.1     dbj 	bus_addr_t	ds_addr;	/* DMA address */
    118      1.1     dbj 	bus_size_t	ds_len;		/* length of transfer */
    119      1.1     dbj };
    120      1.2     dbj typedef struct next68k_bus_dma_segment	bus_dma_segment_t;
    121      1.1     dbj 
    122      1.1     dbj /*
    123      1.1     dbj  *	bus_dma_tag_t
    124      1.1     dbj  *
    125      1.1     dbj  *	A machine-dependent opaque type describing the implementation of
    126      1.1     dbj  *	DMA for a given bus.
    127      1.1     dbj  */
    128      1.2     dbj struct next68k_bus_dma_tag {
    129      1.1     dbj 	void	*_cookie;		/* cookie used in the guts */
    130      1.1     dbj 
    131      1.1     dbj 	/*
    132      1.2     dbj 	 * Some chipsets have a built-in boundary constraint, independent
    133      1.2     dbj 	 * of what the device requests.  This allows that boundary to
    134      1.2     dbj 	 * be specified.  If the device has a more restrictive contraint,
    135      1.2     dbj 	 * the map will use that, otherwise this boundary will be used.
    136      1.2     dbj 	 * This value is ignored if 0.
    137      1.1     dbj 	 */
    138      1.2     dbj 	bus_size_t _boundary;
    139      1.1     dbj 
    140      1.1     dbj 	/*
    141      1.1     dbj 	 * DMA mapping methods.
    142      1.1     dbj 	 */
    143      1.1     dbj 	int	(*_dmamap_create) __P((bus_dma_tag_t, bus_size_t, int,
    144      1.1     dbj 		    bus_size_t, bus_size_t, int, bus_dmamap_t *));
    145      1.1     dbj 	void	(*_dmamap_destroy) __P((bus_dma_tag_t, bus_dmamap_t));
    146      1.1     dbj 	int	(*_dmamap_load) __P((bus_dma_tag_t, bus_dmamap_t, void *,
    147      1.1     dbj 		    bus_size_t, struct proc *, int));
    148      1.1     dbj 	int	(*_dmamap_load_mbuf) __P((bus_dma_tag_t, bus_dmamap_t,
    149      1.1     dbj 		    struct mbuf *, int));
    150      1.1     dbj 	int	(*_dmamap_load_uio) __P((bus_dma_tag_t, bus_dmamap_t,
    151      1.1     dbj 		    struct uio *, int));
    152      1.1     dbj 	int	(*_dmamap_load_raw) __P((bus_dma_tag_t, bus_dmamap_t,
    153      1.1     dbj 		    bus_dma_segment_t *, int, bus_size_t, int));
    154      1.1     dbj 	void	(*_dmamap_unload) __P((bus_dma_tag_t, bus_dmamap_t));
    155      1.1     dbj 	void	(*_dmamap_sync) __P((bus_dma_tag_t, bus_dmamap_t,
    156      1.1     dbj 		    bus_addr_t, bus_size_t, int));
    157      1.1     dbj 
    158      1.1     dbj 	/*
    159      1.1     dbj 	 * DMA memory utility functions.
    160      1.1     dbj 	 */
    161      1.1     dbj 	int	(*_dmamem_alloc) __P((bus_dma_tag_t, bus_size_t, bus_size_t,
    162      1.1     dbj 		    bus_size_t, bus_dma_segment_t *, int, int *, int));
    163      1.1     dbj 	void	(*_dmamem_free) __P((bus_dma_tag_t,
    164      1.1     dbj 		    bus_dma_segment_t *, int));
    165      1.1     dbj 	int	(*_dmamem_map) __P((bus_dma_tag_t, bus_dma_segment_t *,
    166      1.1     dbj 		    int, size_t, caddr_t *, int));
    167      1.1     dbj 	void	(*_dmamem_unmap) __P((bus_dma_tag_t, caddr_t, size_t));
    168  1.3.2.1  bouyer 	paddr_t	(*_dmamem_mmap) __P((bus_dma_tag_t, bus_dma_segment_t *,
    169  1.3.2.1  bouyer 		    int, off_t, int, int));
    170      1.1     dbj };
    171      1.1     dbj 
    172      1.1     dbj #define	bus_dmamap_create(t, s, n, m, b, f, p)			\
    173      1.1     dbj 	(*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
    174      1.1     dbj #define	bus_dmamap_destroy(t, p)				\
    175      1.1     dbj 	(*(t)->_dmamap_destroy)((t), (p))
    176      1.1     dbj #define	bus_dmamap_load(t, m, b, s, p, f)			\
    177      1.1     dbj 	(*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
    178      1.1     dbj #define	bus_dmamap_load_mbuf(t, m, b, f)			\
    179      1.1     dbj 	(*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
    180      1.1     dbj #define	bus_dmamap_load_uio(t, m, u, f)				\
    181      1.1     dbj 	(*(t)->_dmamap_load_uio)((t), (m), (u), (f))
    182      1.1     dbj #define	bus_dmamap_load_raw(t, m, sg, n, s, f)			\
    183      1.1     dbj 	(*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
    184      1.1     dbj #define	bus_dmamap_unload(t, p)					\
    185      1.1     dbj 	(*(t)->_dmamap_unload)((t), (p))
    186      1.1     dbj #define	bus_dmamap_sync(t, p, o, l, ops)			\
    187      1.1     dbj 	(*(t)->_dmamap_sync)((t), (p), (o), (l), (ops))
    188      1.1     dbj #define	bus_dmamem_alloc(t, s, a, b, sg, n, r, f)		\
    189      1.1     dbj 	(*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
    190      1.1     dbj #define	bus_dmamem_free(t, sg, n)				\
    191      1.1     dbj 	(*(t)->_dmamem_free)((t), (sg), (n))
    192      1.1     dbj #define	bus_dmamem_map(t, sg, n, s, k, f)			\
    193      1.1     dbj 	(*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
    194      1.1     dbj #define	bus_dmamem_unmap(t, k, s)				\
    195      1.1     dbj 	(*(t)->_dmamem_unmap)((t), (k), (s))
    196      1.1     dbj #define	bus_dmamem_mmap(t, sg, n, o, p, f)			\
    197      1.1     dbj 	(*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
    198      1.1     dbj 
    199      1.1     dbj /*
    200      1.1     dbj  *	bus_dmamap_t
    201      1.1     dbj  *
    202      1.1     dbj  *	Describes a DMA mapping.
    203      1.1     dbj  */
    204      1.2     dbj struct next68k_bus_dmamap {
    205      1.1     dbj 	/*
    206      1.2     dbj 	 * PRIVATE MEMBERS: not for use by machine-independent code.
    207      1.1     dbj 	 */
    208      1.1     dbj 	bus_size_t	_dm_size;	/* largest DMA transfer mappable */
    209      1.1     dbj 	int		_dm_segcnt;	/* number of segs this map can map */
    210      1.1     dbj 	bus_size_t	_dm_maxsegsz;	/* largest possible segment */
    211      1.1     dbj 	bus_size_t	_dm_boundary;	/* don't cross this */
    212      1.1     dbj 	int		_dm_flags;	/* misc. flags */
    213      1.1     dbj 
    214  1.3.2.3  bouyer 	/* Machine dependant fields: */
    215  1.3.2.3  bouyer 	bus_size_t  dm_xfer_len;			/* length of successful transfer */
    216  1.3.2.3  bouyer 
    217      1.1     dbj 	/*
    218      1.1     dbj 	 * PUBLIC MEMBERS: these are used by machine-independent code.
    219      1.1     dbj 	 */
    220      1.1     dbj 	bus_size_t	dm_mapsize;	/* size of the mapping */
    221      1.1     dbj 	int		dm_nsegs;	/* # valid segments in mapping */
    222      1.1     dbj 	bus_dma_segment_t dm_segs[1];	/* segments; variable length */
    223  1.3.2.3  bouyer 
    224      1.1     dbj };
    225      1.1     dbj 
    226      1.2     dbj #ifdef _NEXT68K_BUS_DMA_PRIVATE
    227      1.1     dbj int	_bus_dmamap_create __P((bus_dma_tag_t, bus_size_t, int, bus_size_t,
    228      1.1     dbj 	    bus_size_t, int, bus_dmamap_t *));
    229      1.1     dbj void	_bus_dmamap_destroy __P((bus_dma_tag_t, bus_dmamap_t));
    230      1.1     dbj 
    231      1.1     dbj int	_bus_dmamap_load_direct __P((bus_dma_tag_t, bus_dmamap_t,
    232      1.1     dbj 	    void *, bus_size_t, struct proc *, int));
    233      1.1     dbj int	_bus_dmamap_load_mbuf_direct __P((bus_dma_tag_t,
    234      1.1     dbj 	    bus_dmamap_t, struct mbuf *, int));
    235      1.1     dbj int	_bus_dmamap_load_uio_direct __P((bus_dma_tag_t,
    236      1.1     dbj 	    bus_dmamap_t, struct uio *, int));
    237      1.1     dbj int	_bus_dmamap_load_raw_direct __P((bus_dma_tag_t,
    238      1.2     dbj 	    bus_dmamap_t, bus_dma_segment_t *, int, bus_size_t, int));
    239      1.1     dbj 
    240      1.1     dbj void	_bus_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t));
    241      1.1     dbj void	_bus_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
    242      1.1     dbj 	    bus_size_t, int));
    243      1.1     dbj 
    244      1.1     dbj int	_bus_dmamem_alloc __P((bus_dma_tag_t tag, bus_size_t size,
    245      1.1     dbj 	    bus_size_t alignment, bus_size_t boundary,
    246      1.1     dbj 	    bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags));
    247      1.1     dbj void	_bus_dmamem_free __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
    248      1.1     dbj 	    int nsegs));
    249      1.1     dbj int	_bus_dmamem_map __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
    250      1.1     dbj 	    int nsegs, size_t size, caddr_t *kvap, int flags));
    251      1.1     dbj void	_bus_dmamem_unmap __P((bus_dma_tag_t tag, caddr_t kva,
    252      1.1     dbj 	    size_t size));
    253  1.3.2.1  bouyer paddr_t	_bus_dmamem_mmap __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
    254  1.3.2.1  bouyer 	    int nsegs, off_t off, int prot, int flags));
    255      1.2     dbj #endif /* _NEXT68K_BUS_DMA_PRIVATE */
    256      1.1     dbj 
    257      1.2     dbj #endif /* _NEXT68K_BUS_DMA_H_ */
    258