bus_space.h revision 1.1 1 1.1 dbj /* $NetBSD: bus_space.h,v 1.1 1998/06/09 07:53:05 dbj Exp $ */
2 1.1 dbj
3 1.1 dbj /*-
4 1.1 dbj * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
5 1.1 dbj * All rights reserved.
6 1.1 dbj *
7 1.1 dbj * This code is derived from software contributed to The NetBSD Foundation
8 1.1 dbj * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 1.1 dbj * NASA Ames Research Center.
10 1.1 dbj *
11 1.1 dbj * Redistribution and use in source and binary forms, with or without
12 1.1 dbj * modification, are permitted provided that the following conditions
13 1.1 dbj * are met:
14 1.1 dbj * 1. Redistributions of source code must retain the above copyright
15 1.1 dbj * notice, this list of conditions and the following disclaimer.
16 1.1 dbj * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 dbj * notice, this list of conditions and the following disclaimer in the
18 1.1 dbj * documentation and/or other materials provided with the distribution.
19 1.1 dbj * 3. All advertising materials mentioning features or use of this software
20 1.1 dbj * must display the following acknowledgement:
21 1.1 dbj * This product includes software developed by the NetBSD
22 1.1 dbj * Foundation, Inc. and its contributors.
23 1.1 dbj * 4. Neither the name of The NetBSD Foundation nor the names of its
24 1.1 dbj * contributors may be used to endorse or promote products derived
25 1.1 dbj * from this software without specific prior written permission.
26 1.1 dbj *
27 1.1 dbj * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 1.1 dbj * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 1.1 dbj * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 1.1 dbj * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 1.1 dbj * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.1 dbj * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.1 dbj * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.1 dbj * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.1 dbj * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.1 dbj * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.1 dbj * POSSIBILITY OF SUCH DAMAGE.
38 1.1 dbj */
39 1.1 dbj
40 1.1 dbj /*
41 1.1 dbj * Copyright (C) 1997 Scott Reynolds. All rights reserved.
42 1.1 dbj *
43 1.1 dbj * Redistribution and use in source and binary forms, with or without
44 1.1 dbj * modification, are permitted provided that the following conditions
45 1.1 dbj * are met:
46 1.1 dbj * 1. Redistributions of source code must retain the above copyright
47 1.1 dbj * notice, this list of conditions and the following disclaimer.
48 1.1 dbj * 2. Redistributions in binary form must reproduce the above copyright
49 1.1 dbj * notice, this list of conditions and the following disclaimer in the
50 1.1 dbj * documentation and/or other materials provided with the distribution.
51 1.1 dbj * 3. The name of the author may not be used to endorse or promote products
52 1.1 dbj * derived from this software without specific prior written permission
53 1.1 dbj *
54 1.1 dbj * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
55 1.1 dbj * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
56 1.1 dbj * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
57 1.1 dbj * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
58 1.1 dbj * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
59 1.1 dbj * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
60 1.1 dbj * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
61 1.1 dbj * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
62 1.1 dbj * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
63 1.1 dbj * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
64 1.1 dbj */
65 1.1 dbj
66 1.1 dbj #ifndef _NEXT68K_BUS_SPACE_H_
67 1.1 dbj #define _NEXT68K_BUS_SPACE_H_
68 1.1 dbj /*
69 1.1 dbj * Addresses (in bus space).
70 1.1 dbj */
71 1.1 dbj typedef u_long bus_addr_t;
72 1.1 dbj typedef u_long bus_size_t;
73 1.1 dbj
74 1.1 dbj /*
75 1.1 dbj * Access methods for bus resources and address space.
76 1.1 dbj */
77 1.1 dbj typedef volatile char * bus_space_tag_t;
78 1.1 dbj typedef u_long bus_space_handle_t;
79 1.1 dbj
80 1.1 dbj /*
81 1.1 dbj * Value for the next68k bus space tag, not to be used directly by MI code.
82 1.1 dbj */
83 1.1 dbj #define NEXT68K_INTIO_BUS_SPACE intiobase
84 1.1 dbj
85 1.1 dbj /*
86 1.1 dbj * Mapping and unmapping operations.
87 1.1 dbj */
88 1.1 dbj #define bus_space_map(t, a, s, f, hp) \
89 1.1 dbj ((((a)>=INTIOBASE)&&((a)+(s)<INTIOTOP)) ? \
90 1.1 dbj ((*(hp)=((t)+((a)-INTIOBASE))),0) : (-1))
91 1.1 dbj
92 1.1 dbj #define bus_space_unmap(t, h, s)
93 1.1 dbj
94 1.1 dbj #define bus_space_subregion(t, h, o, s, hp) \
95 1.1 dbj (*(hp)=(h)+(o))
96 1.1 dbj
97 1.1 dbj #define BUS_SPACE_MAP_CACHEABLE 0x01
98 1.1 dbj #define BUS_SPACE_MAP_LINEAR 0x02
99 1.1 dbj
100 1.1 dbj /*
101 1.1 dbj * Allocation and deallocation operations.
102 1.1 dbj */
103 1.1 dbj #define bus_space_alloc(t, rs, re, s, a, b, f, ap, hp) \
104 1.1 dbj (-1)
105 1.1 dbj
106 1.1 dbj #define bus_space_free(t, h, s)
107 1.1 dbj
108 1.1 dbj /*
109 1.1 dbj * u_intN_t bus_space_read_N __P((bus_space_tag_t tag,
110 1.1 dbj * bus_space_handle_t bsh, bus_size_t offset));
111 1.1 dbj *
112 1.1 dbj * Read a 1, 2, 4, or 8 byte quantity from bus space
113 1.1 dbj * described by tag/handle/offset.
114 1.1 dbj */
115 1.1 dbj
116 1.1 dbj #define bus_space_read_1(t, h, o) \
117 1.1 dbj ((void) t, (*(volatile u_int8_t *)((h) + (o))))
118 1.1 dbj
119 1.1 dbj #define bus_space_read_2(t, h, o) \
120 1.1 dbj ((void) t, (*(volatile u_int16_t *)((h) + (o))))
121 1.1 dbj
122 1.1 dbj #define bus_space_read_4(t, h, o) \
123 1.1 dbj ((void) t, (*(volatile u_int32_t *)((h) + (o))))
124 1.1 dbj
125 1.1 dbj #if 0 /* Cause a link error for bus_space_read_8 */
126 1.1 dbj #define bus_space_read_8(t, h, o) !!! bus_space_read_8 unimplemented !!!
127 1.1 dbj #endif
128 1.1 dbj
129 1.1 dbj /*
130 1.1 dbj * void bus_space_read_multi_N __P((bus_space_tag_t tag,
131 1.1 dbj * bus_space_handle_t bsh, bus_size_t offset,
132 1.1 dbj * u_intN_t *addr, size_t count));
133 1.1 dbj *
134 1.1 dbj * Read `count' 1, 2, 4, or 8 byte quantities from bus space
135 1.1 dbj * described by tag/handle/offset and copy into buffer provided.
136 1.1 dbj */
137 1.1 dbj
138 1.1 dbj #define bus_space_read_multi_1(t, h, o, a, c) do { \
139 1.1 dbj (void) t; \
140 1.1 dbj __asm __volatile (" \
141 1.1 dbj movl %0,a0 ; \
142 1.1 dbj movl %1,a1 ; \
143 1.1 dbj movl %2,d0 ; \
144 1.1 dbj 1: movb a0@,a1@+ ; \
145 1.1 dbj subql #1,d0 ; \
146 1.1 dbj jne 1b" : \
147 1.1 dbj : \
148 1.1 dbj "r" ((h) + (o)), "g" (a), "g" (c) : \
149 1.1 dbj "a0","a1","d0"); \
150 1.1 dbj } while (0);
151 1.1 dbj
152 1.1 dbj #define bus_space_read_multi_2(t, h, o, a, c) do { \
153 1.1 dbj (void) t; \
154 1.1 dbj __asm __volatile (" \
155 1.1 dbj movl %0,a0 ; \
156 1.1 dbj movl %1,a1 ; \
157 1.1 dbj movl %2,d0 ; \
158 1.1 dbj 1: movw a0@,a1@+ ; \
159 1.1 dbj subql #1,d0 ; \
160 1.1 dbj jne 1b" : \
161 1.1 dbj : \
162 1.1 dbj "r" ((h) + (o)), "g" (a), "g" (c) : \
163 1.1 dbj "a0","a1","d0"); \
164 1.1 dbj } while (0);
165 1.1 dbj
166 1.1 dbj #define bus_space_read_multi_4(t, h, o, a, c) do { \
167 1.1 dbj (void) t; \
168 1.1 dbj __asm __volatile (" \
169 1.1 dbj movl %0,a0 ; \
170 1.1 dbj movl %1,a1 ; \
171 1.1 dbj movl %2,d0 ; \
172 1.1 dbj 1: movl a0@,a1@+ ; \
173 1.1 dbj subql #1,d0 ; \
174 1.1 dbj jne 1b" : \
175 1.1 dbj : \
176 1.1 dbj "r" ((h) + (o)), "g" (a), "g" (c) : \
177 1.1 dbj "a0","a1","d0"); \
178 1.1 dbj } while (0);
179 1.1 dbj
180 1.1 dbj #if 0 /* Cause a link error for bus_space_read_multi_8 */
181 1.1 dbj #define bus_space_read_multi_8 !!! bus_space_read_multi_8 unimplemented !!!
182 1.1 dbj #endif
183 1.1 dbj
184 1.1 dbj /*
185 1.1 dbj * void bus_space_read_region_N __P((bus_space_tag_t tag,
186 1.1 dbj * bus_space_handle_t bsh, bus_size_t offset,
187 1.1 dbj * u_intN_t *addr, size_t count));
188 1.1 dbj *
189 1.1 dbj * Read `count' 1, 2, 4, or 8 byte quantities from bus space
190 1.1 dbj * described by tag/handle and starting at `offset' and copy into
191 1.1 dbj * buffer provided.
192 1.1 dbj */
193 1.1 dbj
194 1.1 dbj #define bus_space_read_region_1(t, h, o, a, c) do { \
195 1.1 dbj (void) t; \
196 1.1 dbj __asm __volatile (" \
197 1.1 dbj movl %0,a0 ; \
198 1.1 dbj movl %1,a1 ; \
199 1.1 dbj movl %2,d0 ; \
200 1.1 dbj 1: movb a0@+,a1@+ ; \
201 1.1 dbj subql #1,d0 ; \
202 1.1 dbj jne 1b" : \
203 1.1 dbj : \
204 1.1 dbj "r" ((h) + (o)), "g" (a), "g" (c) : \
205 1.1 dbj "a0","a1","d0"); \
206 1.1 dbj } while (0);
207 1.1 dbj
208 1.1 dbj #define bus_space_read_region_2(t, h, o, a, c) do { \
209 1.1 dbj (void) t; \
210 1.1 dbj __asm __volatile (" \
211 1.1 dbj movl %0,a0 ; \
212 1.1 dbj movl %1,a1 ; \
213 1.1 dbj movl %2,d0 ; \
214 1.1 dbj 1: movw a0@+,a1@+ ; \
215 1.1 dbj subql #1,d0 ; \
216 1.1 dbj jne 1b" : \
217 1.1 dbj : \
218 1.1 dbj "r" ((h) + (o)), "g" (a), "g" (c) : \
219 1.1 dbj "a0","a1","d0"); \
220 1.1 dbj } while (0);
221 1.1 dbj
222 1.1 dbj #define bus_space_read_region_4(t, h, o, a, c) do { \
223 1.1 dbj (void) t; \
224 1.1 dbj __asm __volatile (" \
225 1.1 dbj movl %0,a0 ; \
226 1.1 dbj movl %1,a1 ; \
227 1.1 dbj movl %2,d0 ; \
228 1.1 dbj 1: movl a0@+,a1@+ ; \
229 1.1 dbj subql #1,d0 ; \
230 1.1 dbj jne 1b" : \
231 1.1 dbj : \
232 1.1 dbj "r" ((h) + (o)), "g" (a), "g" (c) : \
233 1.1 dbj "a0","a1","d0"); \
234 1.1 dbj } while (0);
235 1.1 dbj
236 1.1 dbj #if 0 /* Cause a link error for bus_space_read_region_8 */
237 1.1 dbj #define bus_space_read_region_8 !!! bus_space_read_region_8 unimplemented !!!
238 1.1 dbj #endif
239 1.1 dbj
240 1.1 dbj /*
241 1.1 dbj * void bus_space_write_N __P((bus_space_tag_t tag,
242 1.1 dbj * bus_space_handle_t bsh, bus_size_t offset,
243 1.1 dbj * u_intN_t value));
244 1.1 dbj *
245 1.1 dbj * Write the 1, 2, 4, or 8 byte value `value' to bus space
246 1.1 dbj * described by tag/handle/offset.
247 1.1 dbj */
248 1.1 dbj
249 1.1 dbj #define bus_space_write_1(t, h, o, v) \
250 1.1 dbj ((void) t, ((void)(*(volatile u_int8_t *)((h) + (o)) = (v))))
251 1.1 dbj
252 1.1 dbj #define bus_space_write_2(t, h, o, v) \
253 1.1 dbj ((void) t, ((void)(*(volatile u_int16_t *)((h) + (o)) = (v))))
254 1.1 dbj
255 1.1 dbj #define bus_space_write_4(t, h, o, v) \
256 1.1 dbj ((void) t, ((void)(*(volatile u_int32_t *)((h) + (o)) = (v))))
257 1.1 dbj
258 1.1 dbj #if 0 /* Cause a link error for bus_space_write_8 */
259 1.1 dbj #define bus_space_write_8 !!! bus_space_write_8 not implemented !!!
260 1.1 dbj #endif
261 1.1 dbj
262 1.1 dbj /*
263 1.1 dbj * void bus_space_write_multi_N __P((bus_space_tag_t tag,
264 1.1 dbj * bus_space_handle_t bsh, bus_size_t offset,
265 1.1 dbj * const u_intN_t *addr, size_t count));
266 1.1 dbj *
267 1.1 dbj * Write `count' 1, 2, 4, or 8 byte quantities from the buffer
268 1.1 dbj * provided to bus space described by tag/handle/offset.
269 1.1 dbj */
270 1.1 dbj
271 1.1 dbj #define bus_space_write_multi_1(t, h, o, a, c) do { \
272 1.1 dbj (void) t; \
273 1.1 dbj __asm __volatile (" \
274 1.1 dbj movl %0,a0 ; \
275 1.1 dbj movl %1,a1 ; \
276 1.1 dbj movl %2,d0 ; \
277 1.1 dbj 1: movb a1@+,a0@ ; \
278 1.1 dbj subql #1,d0 ; \
279 1.1 dbj jne 1b" : \
280 1.1 dbj : \
281 1.1 dbj "r" ((h) + (o)), "g" (a), "g" (c) : \
282 1.1 dbj "a0","a1","d0"); \
283 1.1 dbj } while (0);
284 1.1 dbj
285 1.1 dbj #define bus_space_write_multi_2(t, h, o, a, c) do { \
286 1.1 dbj (void) t; \
287 1.1 dbj __asm __volatile (" \
288 1.1 dbj movl %0,a0 ; \
289 1.1 dbj movl %1,a1 ; \
290 1.1 dbj movl %2,d0 ; \
291 1.1 dbj 1: movw a1@+,a0@ ; \
292 1.1 dbj subql #1,d0 ; \
293 1.1 dbj jne 1b" : \
294 1.1 dbj : \
295 1.1 dbj "r" ((h) + (o)), "g" (a), "g" (c) : \
296 1.1 dbj "a0","a1","d0"); \
297 1.1 dbj } while (0);
298 1.1 dbj
299 1.1 dbj #define bus_space_write_multi_4(t, h, o, a, c) do { \
300 1.1 dbj (void) t; \
301 1.1 dbj __asm __volatile (" \
302 1.1 dbj movl %0,a0 ; \
303 1.1 dbj movl %1,a1 ; \
304 1.1 dbj movl %2,d0 ; \
305 1.1 dbj 1: movl a1@+,a0@ ; \
306 1.1 dbj subql #1,d0 ; \
307 1.1 dbj jne 1b" : \
308 1.1 dbj : \
309 1.1 dbj "r" ((h) + (o)), "g" (a), "g" (c) : \
310 1.1 dbj "a0","a1","d0"); \
311 1.1 dbj } while (0);
312 1.1 dbj
313 1.1 dbj #if 0 /* Cause a link error for bus_space_write_8 */
314 1.1 dbj #define bus_space_write_multi_8(t, h, o, a, c) \
315 1.1 dbj !!! bus_space_write_multi_8 unimplimented !!!
316 1.1 dbj #endif
317 1.1 dbj
318 1.1 dbj /*
319 1.1 dbj * void bus_space_write_region_N __P((bus_space_tag_t tag,
320 1.1 dbj * bus_space_handle_t bsh, bus_size_t offset,
321 1.1 dbj * const u_intN_t *addr, size_t count));
322 1.1 dbj *
323 1.1 dbj * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided
324 1.1 dbj * to bus space described by tag/handle starting at `offset'.
325 1.1 dbj */
326 1.1 dbj
327 1.1 dbj #define bus_space_write_region_1(t, h, o, a, c) do { \
328 1.1 dbj (void) t; \
329 1.1 dbj __asm __volatile (" \
330 1.1 dbj movl %0,a0 ; \
331 1.1 dbj movl %1,a1 ; \
332 1.1 dbj movl %2,d0 ; \
333 1.1 dbj 1: movb a1@+,a0@+ ; \
334 1.1 dbj subql #1,d0 ; \
335 1.1 dbj jne 1b" : \
336 1.1 dbj : \
337 1.1 dbj "r" ((h) + (o)), "g" (a), "g" (c) : \
338 1.1 dbj "a0","a1","d0"); \
339 1.1 dbj } while (0);
340 1.1 dbj
341 1.1 dbj #define bus_space_write_region_2(t, h, o, a, c) do { \
342 1.1 dbj (void) t; \
343 1.1 dbj __asm __volatile (" \
344 1.1 dbj movl %0,a0 ; \
345 1.1 dbj movl %1,a1 ; \
346 1.1 dbj movl %2,d0 ; \
347 1.1 dbj 1: movw a1@+,a0@+ ; \
348 1.1 dbj subql #1,d0 ; \
349 1.1 dbj jne 1b" : \
350 1.1 dbj : \
351 1.1 dbj "r" ((h) + (o)), "g" (a), "g" (c) : \
352 1.1 dbj "a0","a1","d0"); \
353 1.1 dbj } while (0);
354 1.1 dbj
355 1.1 dbj #define bus_space_write_region_4(t, h, o, a, c) do { \
356 1.1 dbj (void) t; \
357 1.1 dbj __asm __volatile (" \
358 1.1 dbj movl %0,a0 ; \
359 1.1 dbj movl %1,a1 ; \
360 1.1 dbj movl %2,d0 ; \
361 1.1 dbj 1: movl a1@+,a0@+ ; \
362 1.1 dbj subql #1,d0 ; \
363 1.1 dbj jne 1b" : \
364 1.1 dbj : \
365 1.1 dbj "r" ((h) + (o)), "g" (a), "g" (c) : \
366 1.1 dbj "a0","a1","d0"); \
367 1.1 dbj } while (0);
368 1.1 dbj
369 1.1 dbj #if 0 /* Cause a link error for bus_space_write_region_8 */
370 1.1 dbj #define bus_space_write_region_8 \
371 1.1 dbj !!! bus_space_write_region_8 unimplemented !!!
372 1.1 dbj #endif
373 1.1 dbj
374 1.1 dbj /*
375 1.1 dbj * void bus_space_set_multi_N __P((bus_space_tag_t tag,
376 1.1 dbj * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
377 1.1 dbj * size_t count));
378 1.1 dbj *
379 1.1 dbj * Write the 1, 2, 4, or 8 byte value `val' to bus space described
380 1.1 dbj * by tag/handle/offset `count' times.
381 1.1 dbj */
382 1.1 dbj
383 1.1 dbj #define bus_space_set_multi_1(t, h, o, val, c) do { \
384 1.1 dbj (void) t; \
385 1.1 dbj __asm __volatile (" \
386 1.1 dbj movl %0,a0 ; \
387 1.1 dbj movl %1,d1 ; \
388 1.1 dbj movl %2,d0 ; \
389 1.1 dbj 1: movb d1,a0@ ; \
390 1.1 dbj subql #1,d0 ; \
391 1.1 dbj jne 1b" : \
392 1.1 dbj : \
393 1.1 dbj "r" ((h) + (o)), "g" (val), "g" (c) : \
394 1.1 dbj "a0","d0","d1"); \
395 1.1 dbj } while (0);
396 1.1 dbj
397 1.1 dbj #define bus_space_set_multi_2(t, h, o, val, c) do { \
398 1.1 dbj (void) t; \
399 1.1 dbj __asm __volatile (" \
400 1.1 dbj movl %0,a0 ; \
401 1.1 dbj movl %1,d1 ; \
402 1.1 dbj movl %2,d0 ; \
403 1.1 dbj 1: movw d1,a0@ ; \
404 1.1 dbj subql #1,d0 ; \
405 1.1 dbj jne 1b" : \
406 1.1 dbj : \
407 1.1 dbj "r" ((h) + (o)), "g" (val), "g" (c) : \
408 1.1 dbj "a0","d0","d1"); \
409 1.1 dbj } while (0);
410 1.1 dbj
411 1.1 dbj #define bus_space_set_multi_4(t, h, o, val, c) do { \
412 1.1 dbj (void) t; \
413 1.1 dbj __asm __volatile (" \
414 1.1 dbj movl %0,a0 ; \
415 1.1 dbj movl %1,d1 ; \
416 1.1 dbj movl %2,d0 ; \
417 1.1 dbj 1: movl d1,a0@ ; \
418 1.1 dbj subql #1,d0 ; \
419 1.1 dbj jne 1b" : \
420 1.1 dbj : \
421 1.1 dbj "r" ((h) + (o)), "g" (val), "g" (c) : \
422 1.1 dbj "a0","d0","d1"); \
423 1.1 dbj } while (0);
424 1.1 dbj
425 1.1 dbj #if 0 /* Cause a link error for bus_space_set_multi_8 */
426 1.1 dbj #define bus_space_set_multi_8 \
427 1.1 dbj !!! bus_space_set_multi_8 unimplemented !!!
428 1.1 dbj #endif
429 1.1 dbj
430 1.1 dbj /*
431 1.1 dbj * void bus_space_set_region_N __P((bus_space_tag_t tag,
432 1.1 dbj * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
433 1.1 dbj * size_t count));
434 1.1 dbj *
435 1.1 dbj * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
436 1.1 dbj * by tag/handle starting at `offset'.
437 1.1 dbj */
438 1.1 dbj
439 1.1 dbj #define bus_space_set_region_1(t, h, o, val, c) do { \
440 1.1 dbj (void) t; \
441 1.1 dbj __asm __volatile (" \
442 1.1 dbj movl %0,a0 ; \
443 1.1 dbj movl %1,d1 ; \
444 1.1 dbj movl %2,d0 ; \
445 1.1 dbj 1: movb d1,a0@+ ; \
446 1.1 dbj subql #1,d0 ; \
447 1.1 dbj jne 1b" : \
448 1.1 dbj : \
449 1.1 dbj "r" ((h) + (o)), "g" (val), "g" (c) : \
450 1.1 dbj "a0","d0","d1"); \
451 1.1 dbj } while (0);
452 1.1 dbj
453 1.1 dbj #define bus_space_set_region_2(t, h, o, val, c) do { \
454 1.1 dbj (void) t; \
455 1.1 dbj __asm __volatile (" \
456 1.1 dbj movl %0,a0 ; \
457 1.1 dbj movl %1,d1 ; \
458 1.1 dbj movl %2,d0 ; \
459 1.1 dbj 1: movw d1,a0@+ ; \
460 1.1 dbj subql #1,d0 ; \
461 1.1 dbj jne 1b" : \
462 1.1 dbj : \
463 1.1 dbj "r" ((h) + (o)), "g" (val), "g" (c) : \
464 1.1 dbj "a0","d0","d1"); \
465 1.1 dbj } while (0);
466 1.1 dbj
467 1.1 dbj #define bus_space_set_region_4(t, h, o, val, c) do { \
468 1.1 dbj (void) t; \
469 1.1 dbj __asm __volatile (" \
470 1.1 dbj movl %0,a0 ; \
471 1.1 dbj movl %1,d1 ; \
472 1.1 dbj movl %2,d0 ; \
473 1.1 dbj 1: movl d1,a0@+ ; \
474 1.1 dbj subql #1,d0 ; \
475 1.1 dbj jne 1b" : \
476 1.1 dbj : \
477 1.1 dbj "r" ((h) + (o)), "g" (val), "g" (c) : \
478 1.1 dbj "a0","d0","d1"); \
479 1.1 dbj } while (0);
480 1.1 dbj
481 1.1 dbj #if 0 /* Cause a link error for bus_space_set_region_8 */
482 1.1 dbj #define bus_space_set_region_8 \
483 1.1 dbj !!! bus_space_set_region_8 unimplemented !!!
484 1.1 dbj #endif
485 1.1 dbj
486 1.1 dbj /*
487 1.1 dbj * void bus_space_copy_N __P((bus_space_tag_t tag,
488 1.1 dbj * bus_space_handle_t bsh1, bus_size_t off1,
489 1.1 dbj * bus_space_handle_t bsh2, bus_size_t off2,
490 1.1 dbj * size_t count));
491 1.1 dbj *
492 1.1 dbj * Copy `count' 1, 2, 4, or 8 byte values from bus space starting
493 1.1 dbj * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
494 1.1 dbj */
495 1.1 dbj
496 1.1 dbj #define __NEXT68K_copy_region_N(BYTES) \
497 1.1 dbj static __inline void __CONCAT(bus_space_copy_region_,BYTES) \
498 1.1 dbj __P((bus_space_tag_t, \
499 1.1 dbj bus_space_handle_t bsh1, bus_size_t off1, \
500 1.1 dbj bus_space_handle_t bsh2, bus_size_t off2, \
501 1.1 dbj bus_size_t count)); \
502 1.1 dbj \
503 1.1 dbj static __inline void \
504 1.1 dbj __CONCAT(bus_space_copy_region_,BYTES)(t, h1, o1, h2, o2, c) \
505 1.1 dbj bus_space_tag_t t; \
506 1.1 dbj bus_space_handle_t h1, h2; \
507 1.1 dbj bus_size_t o1, o2, c; \
508 1.1 dbj { \
509 1.1 dbj bus_size_t o; \
510 1.1 dbj \
511 1.1 dbj if ((h1 + o1) >= (h2 + o2)) { \
512 1.1 dbj /* src after dest: copy forward */ \
513 1.1 dbj for (o = 0; c != 0; c--, o += BYTES) \
514 1.1 dbj __CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \
515 1.1 dbj __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \
516 1.1 dbj } else { \
517 1.1 dbj /* dest after src: copy backwards */ \
518 1.1 dbj for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) \
519 1.1 dbj __CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \
520 1.1 dbj __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \
521 1.1 dbj } \
522 1.1 dbj }
523 1.1 dbj __NEXT68K_copy_region_N(1)
524 1.1 dbj __NEXT68K_copy_region_N(2)
525 1.1 dbj __NEXT68K_copy_region_N(4)
526 1.1 dbj #if 0 /* Cause a link error for bus_space_copy_8 */
527 1.1 dbj #define bus_space_copy_8 \
528 1.1 dbj !!! bus_space_copy_8 unimplemented !!!
529 1.1 dbj #endif
530 1.1 dbj
531 1.1 dbj #undef __NEXT68K_copy_region_N
532 1.1 dbj
533 1.1 dbj /*
534 1.1 dbj * Bus read/write barrier methods.
535 1.1 dbj *
536 1.1 dbj * void bus_space_barrier __P((bus_space_tag_t tag,
537 1.1 dbj * bus_space_handle_t bsh, bus_size_t offset,
538 1.1 dbj * bus_size_t len, int flags));
539 1.1 dbj *
540 1.1 dbj * Note: the 680x0 does not currently require barriers, but we must
541 1.1 dbj * provide the flags to MI code.
542 1.1 dbj */
543 1.1 dbj #define bus_space_barrier(t, h, o, l, f) \
544 1.1 dbj ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)))
545 1.1 dbj #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */
546 1.1 dbj #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */
547 1.1 dbj
548 1.1 dbj #endif /* _NEXT68K_BUS_SPACE_H_ */
549