bus_space.h revision 1.17 1 1.17 skrll /* $NetBSD: bus_space.h,v 1.17 2019/09/23 16:17:57 skrll Exp $ */
2 1.1 dbj
3 1.1 dbj /*-
4 1.1 dbj * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
5 1.1 dbj * All rights reserved.
6 1.1 dbj *
7 1.1 dbj * This code is derived from software contributed to The NetBSD Foundation
8 1.1 dbj * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 1.1 dbj * NASA Ames Research Center.
10 1.1 dbj *
11 1.1 dbj * Redistribution and use in source and binary forms, with or without
12 1.1 dbj * modification, are permitted provided that the following conditions
13 1.1 dbj * are met:
14 1.1 dbj * 1. Redistributions of source code must retain the above copyright
15 1.1 dbj * notice, this list of conditions and the following disclaimer.
16 1.1 dbj * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 dbj * notice, this list of conditions and the following disclaimer in the
18 1.1 dbj * documentation and/or other materials provided with the distribution.
19 1.1 dbj *
20 1.1 dbj * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 1.1 dbj * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 1.1 dbj * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 1.1 dbj * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 1.1 dbj * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 1.1 dbj * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 1.1 dbj * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 1.1 dbj * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 1.1 dbj * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 1.1 dbj * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 1.1 dbj * POSSIBILITY OF SUCH DAMAGE.
31 1.1 dbj */
32 1.1 dbj
33 1.1 dbj /*
34 1.1 dbj * Copyright (C) 1997 Scott Reynolds. All rights reserved.
35 1.1 dbj *
36 1.1 dbj * Redistribution and use in source and binary forms, with or without
37 1.1 dbj * modification, are permitted provided that the following conditions
38 1.1 dbj * are met:
39 1.1 dbj * 1. Redistributions of source code must retain the above copyright
40 1.1 dbj * notice, this list of conditions and the following disclaimer.
41 1.1 dbj * 2. Redistributions in binary form must reproduce the above copyright
42 1.1 dbj * notice, this list of conditions and the following disclaimer in the
43 1.1 dbj * documentation and/or other materials provided with the distribution.
44 1.1 dbj * 3. The name of the author may not be used to endorse or promote products
45 1.1 dbj * derived from this software without specific prior written permission
46 1.1 dbj *
47 1.1 dbj * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
48 1.1 dbj * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
49 1.1 dbj * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
50 1.1 dbj * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
51 1.1 dbj * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
52 1.1 dbj * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
53 1.1 dbj * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
54 1.1 dbj * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
55 1.1 dbj * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
56 1.1 dbj * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
57 1.1 dbj */
58 1.1 dbj
59 1.1 dbj #ifndef _NEXT68K_BUS_SPACE_H_
60 1.1 dbj #define _NEXT68K_BUS_SPACE_H_
61 1.1 dbj /*
62 1.1 dbj * Addresses (in bus space).
63 1.1 dbj */
64 1.1 dbj typedef u_long bus_addr_t;
65 1.1 dbj typedef u_long bus_size_t;
66 1.1 dbj
67 1.17 skrll #define PRIxBUSADDR "lx"
68 1.17 skrll #define PRIxBUSSIZE "lx"
69 1.17 skrll #define PRIuBUSSIZE "lu"
70 1.17 skrll
71 1.1 dbj /*
72 1.1 dbj * Access methods for bus resources and address space.
73 1.1 dbj */
74 1.1 dbj typedef volatile char * bus_space_tag_t;
75 1.1 dbj typedef u_long bus_space_handle_t;
76 1.1 dbj
77 1.17 skrll #define PRIxBSH "lx"
78 1.17 skrll
79 1.1 dbj /*
80 1.1 dbj * Value for the next68k bus space tag, not to be used directly by MI code.
81 1.1 dbj */
82 1.10 mycroft #define NEXT68K_INTIO_BUS_SPACE ((bus_space_tag_t)intiobase)
83 1.1 dbj
84 1.1 dbj /*
85 1.6 deberg * Values for the next68k video bus space tags, not to be used directly
86 1.6 deberg * by MI code.
87 1.3 dbj */
88 1.10 mycroft #define NEXT68K_MONO_VIDEO_BUS_SPACE ((bus_space_tag_t)monobase)
89 1.10 mycroft #define NEXT68K_COLOR_VIDEO_BUS_SPACE ((bus_space_tag_t)colorbase)
90 1.3 dbj
91 1.3 dbj /*
92 1.1 dbj * Mapping and unmapping operations.
93 1.1 dbj */
94 1.1 dbj #define bus_space_map(t, a, s, f, hp) \
95 1.1 dbj ((((a)>=INTIOBASE)&&((a)+(s)<INTIOTOP)) ? \
96 1.3 dbj ((*(hp)=(bus_space_handle_t)((t)+((a)-INTIOBASE))),0) : \
97 1.4 dbj ((((a)>=MONOBASE)&&((a)+(s)<MONOTOP)) ? \
98 1.4 dbj ((*(hp)=(bus_space_handle_t)((t)+((a)-MONOBASE))),0) : \
99 1.6 deberg ((((a)>=COLORBASE)&&((a)+(s)<COLORTOP)) ? \
100 1.6 deberg ((*(hp)=(bus_space_handle_t)((t)+((a)-COLORBASE))),0) : (-1))))
101 1.1 dbj
102 1.1 dbj #define bus_space_unmap(t, h, s)
103 1.1 dbj
104 1.1 dbj #define bus_space_subregion(t, h, o, s, hp) \
105 1.1 dbj (*(hp)=(h)+(o))
106 1.1 dbj
107 1.1 dbj #define BUS_SPACE_MAP_CACHEABLE 0x01
108 1.1 dbj #define BUS_SPACE_MAP_LINEAR 0x02
109 1.1 dbj
110 1.1 dbj /*
111 1.1 dbj * Allocation and deallocation operations.
112 1.1 dbj */
113 1.1 dbj #define bus_space_alloc(t, rs, re, s, a, b, f, ap, hp) \
114 1.1 dbj (-1)
115 1.1 dbj
116 1.1 dbj #define bus_space_free(t, h, s)
117 1.8 deberg
118 1.8 deberg /*
119 1.11 chs * paddr_t bus_space_mmap(bus_space_tag_t t, bus_addr_t base,
120 1.11 chs * off_t offset, int prot, int flags);
121 1.8 deberg *
122 1.8 deberg * Mmap an area of bus space.
123 1.8 deberg */
124 1.8 deberg
125 1.9 mycroft #define bus_space_mmap(t, a, s, prot, flags) \
126 1.9 mycroft ((((a)>=INTIOBASE)&&((a)+(s)<INTIOTOP)) ? \
127 1.9 mycroft m68k_btop((t)+((a)-INTIOBASE)) : \
128 1.9 mycroft ((((a)>=MONOBASE)&&((a)+(s)<MONOTOP)) ? \
129 1.9 mycroft m68k_btop((t)+((a)-MONOBASE)) : \
130 1.9 mycroft ((((a)>=COLORBASE)&&((a)+(s)<COLORTOP)) ? \
131 1.9 mycroft m68k_btop((t)+((a)-COLORBASE)) : (-1))))
132 1.1 dbj
133 1.1 dbj /*
134 1.11 chs * u_intN_t bus_space_read_N(bus_space_tag_t tag,
135 1.11 chs * bus_space_handle_t bsh, bus_size_t offset);
136 1.1 dbj *
137 1.1 dbj * Read a 1, 2, 4, or 8 byte quantity from bus space
138 1.1 dbj * described by tag/handle/offset.
139 1.1 dbj */
140 1.1 dbj
141 1.1 dbj #define bus_space_read_1(t, h, o) \
142 1.1 dbj ((void) t, (*(volatile u_int8_t *)((h) + (o))))
143 1.1 dbj
144 1.1 dbj #define bus_space_read_2(t, h, o) \
145 1.1 dbj ((void) t, (*(volatile u_int16_t *)((h) + (o))))
146 1.1 dbj
147 1.1 dbj #define bus_space_read_4(t, h, o) \
148 1.1 dbj ((void) t, (*(volatile u_int32_t *)((h) + (o))))
149 1.1 dbj
150 1.1 dbj #if 0 /* Cause a link error for bus_space_read_8 */
151 1.1 dbj #define bus_space_read_8(t, h, o) !!! bus_space_read_8 unimplemented !!!
152 1.1 dbj #endif
153 1.1 dbj
154 1.1 dbj /*
155 1.11 chs * void bus_space_read_multi_N(bus_space_tag_t tag,
156 1.1 dbj * bus_space_handle_t bsh, bus_size_t offset,
157 1.11 chs * u_intN_t *addr, size_t count);
158 1.1 dbj *
159 1.1 dbj * Read `count' 1, 2, 4, or 8 byte quantities from bus space
160 1.1 dbj * described by tag/handle/offset and copy into buffer provided.
161 1.1 dbj */
162 1.1 dbj
163 1.1 dbj #define bus_space_read_multi_1(t, h, o, a, c) do { \
164 1.1 dbj (void) t; \
165 1.13 perry __asm volatile (" \
166 1.7 chs movl %0,%%a0 ; \
167 1.7 chs movl %1,%%a1 ; \
168 1.7 chs movl %2,%%d0 ; \
169 1.7 chs 1: movb %%a0@,%%a1@+ ; \
170 1.7 chs subql #1,%%d0 ; \
171 1.1 dbj jne 1b" : \
172 1.1 dbj : \
173 1.1 dbj "r" ((h) + (o)), "g" (a), "g" (c) : \
174 1.1 dbj "a0","a1","d0"); \
175 1.1 dbj } while (0);
176 1.1 dbj
177 1.1 dbj #define bus_space_read_multi_2(t, h, o, a, c) do { \
178 1.1 dbj (void) t; \
179 1.13 perry __asm volatile (" \
180 1.7 chs movl %0,%%a0 ; \
181 1.7 chs movl %1,%%a1 ; \
182 1.7 chs movl %2,%%d0 ; \
183 1.7 chs 1: movw %%a0@,%%a1@+ ; \
184 1.7 chs subql #1,%%d0 ; \
185 1.1 dbj jne 1b" : \
186 1.1 dbj : \
187 1.1 dbj "r" ((h) + (o)), "g" (a), "g" (c) : \
188 1.1 dbj "a0","a1","d0"); \
189 1.1 dbj } while (0);
190 1.1 dbj
191 1.1 dbj #define bus_space_read_multi_4(t, h, o, a, c) do { \
192 1.1 dbj (void) t; \
193 1.13 perry __asm volatile (" \
194 1.7 chs movl %0,%%a0 ; \
195 1.7 chs movl %1,%%a1 ; \
196 1.7 chs movl %2,%%d0 ; \
197 1.7 chs 1: movl %%a0@,%%a1@+ ; \
198 1.7 chs subql #1,%%d0 ; \
199 1.1 dbj jne 1b" : \
200 1.1 dbj : \
201 1.1 dbj "r" ((h) + (o)), "g" (a), "g" (c) : \
202 1.1 dbj "a0","a1","d0"); \
203 1.1 dbj } while (0);
204 1.1 dbj
205 1.1 dbj #if 0 /* Cause a link error for bus_space_read_multi_8 */
206 1.1 dbj #define bus_space_read_multi_8 !!! bus_space_read_multi_8 unimplemented !!!
207 1.1 dbj #endif
208 1.1 dbj
209 1.1 dbj /*
210 1.11 chs * void bus_space_read_region_N(bus_space_tag_t tag,
211 1.1 dbj * bus_space_handle_t bsh, bus_size_t offset,
212 1.11 chs * u_intN_t *addr, size_t count);
213 1.1 dbj *
214 1.1 dbj * Read `count' 1, 2, 4, or 8 byte quantities from bus space
215 1.1 dbj * described by tag/handle and starting at `offset' and copy into
216 1.1 dbj * buffer provided.
217 1.1 dbj */
218 1.1 dbj
219 1.1 dbj #define bus_space_read_region_1(t, h, o, a, c) do { \
220 1.1 dbj (void) t; \
221 1.13 perry __asm volatile (" \
222 1.7 chs movl %0,%%a0 ; \
223 1.7 chs movl %1,%%a1 ; \
224 1.7 chs movl %2,%%d0 ; \
225 1.7 chs 1: movb %%a0@+,%%a1@+ ; \
226 1.7 chs subql #1,%%d0 ; \
227 1.1 dbj jne 1b" : \
228 1.1 dbj : \
229 1.1 dbj "r" ((h) + (o)), "g" (a), "g" (c) : \
230 1.1 dbj "a0","a1","d0"); \
231 1.1 dbj } while (0);
232 1.1 dbj
233 1.1 dbj #define bus_space_read_region_2(t, h, o, a, c) do { \
234 1.1 dbj (void) t; \
235 1.13 perry __asm volatile (" \
236 1.7 chs movl %0,%%a0 ; \
237 1.7 chs movl %1,%%a1 ; \
238 1.7 chs movl %2,%%d0 ; \
239 1.7 chs 1: movw %%a0@+,%%a1@+ ; \
240 1.7 chs subql #1,%%d0 ; \
241 1.1 dbj jne 1b" : \
242 1.1 dbj : \
243 1.1 dbj "r" ((h) + (o)), "g" (a), "g" (c) : \
244 1.1 dbj "a0","a1","d0"); \
245 1.1 dbj } while (0);
246 1.1 dbj
247 1.1 dbj #define bus_space_read_region_4(t, h, o, a, c) do { \
248 1.1 dbj (void) t; \
249 1.13 perry __asm volatile (" \
250 1.7 chs movl %0,%%a0 ; \
251 1.7 chs movl %1,%%a1 ; \
252 1.7 chs movl %2,%%d0 ; \
253 1.7 chs 1: movl %%a0@+,%%a1@+ ; \
254 1.7 chs subql #1,%%d0 ; \
255 1.1 dbj jne 1b" : \
256 1.1 dbj : \
257 1.1 dbj "r" ((h) + (o)), "g" (a), "g" (c) : \
258 1.1 dbj "a0","a1","d0"); \
259 1.1 dbj } while (0);
260 1.1 dbj
261 1.1 dbj #if 0 /* Cause a link error for bus_space_read_region_8 */
262 1.1 dbj #define bus_space_read_region_8 !!! bus_space_read_region_8 unimplemented !!!
263 1.1 dbj #endif
264 1.1 dbj
265 1.1 dbj /*
266 1.11 chs * void bus_space_write_N(bus_space_tag_t tag,
267 1.1 dbj * bus_space_handle_t bsh, bus_size_t offset,
268 1.11 chs * u_intN_t value);
269 1.1 dbj *
270 1.1 dbj * Write the 1, 2, 4, or 8 byte value `value' to bus space
271 1.1 dbj * described by tag/handle/offset.
272 1.1 dbj */
273 1.1 dbj
274 1.1 dbj #define bus_space_write_1(t, h, o, v) \
275 1.1 dbj ((void) t, ((void)(*(volatile u_int8_t *)((h) + (o)) = (v))))
276 1.1 dbj
277 1.1 dbj #define bus_space_write_2(t, h, o, v) \
278 1.1 dbj ((void) t, ((void)(*(volatile u_int16_t *)((h) + (o)) = (v))))
279 1.1 dbj
280 1.1 dbj #define bus_space_write_4(t, h, o, v) \
281 1.1 dbj ((void) t, ((void)(*(volatile u_int32_t *)((h) + (o)) = (v))))
282 1.1 dbj
283 1.1 dbj #if 0 /* Cause a link error for bus_space_write_8 */
284 1.1 dbj #define bus_space_write_8 !!! bus_space_write_8 not implemented !!!
285 1.1 dbj #endif
286 1.1 dbj
287 1.1 dbj /*
288 1.11 chs * void bus_space_write_multi_N(bus_space_tag_t tag,
289 1.1 dbj * bus_space_handle_t bsh, bus_size_t offset,
290 1.11 chs * const u_intN_t *addr, size_t count);
291 1.1 dbj *
292 1.1 dbj * Write `count' 1, 2, 4, or 8 byte quantities from the buffer
293 1.1 dbj * provided to bus space described by tag/handle/offset.
294 1.1 dbj */
295 1.1 dbj
296 1.1 dbj #define bus_space_write_multi_1(t, h, o, a, c) do { \
297 1.1 dbj (void) t; \
298 1.13 perry __asm volatile (" \
299 1.7 chs movl %0,%%a0 ; \
300 1.7 chs movl %1,%%a1 ; \
301 1.7 chs movl %2,%%d0 ; \
302 1.7 chs 1: movb %%a1@+,%%a0@ ; \
303 1.7 chs subql #1,%%d0 ; \
304 1.1 dbj jne 1b" : \
305 1.1 dbj : \
306 1.1 dbj "r" ((h) + (o)), "g" (a), "g" (c) : \
307 1.1 dbj "a0","a1","d0"); \
308 1.1 dbj } while (0);
309 1.1 dbj
310 1.1 dbj #define bus_space_write_multi_2(t, h, o, a, c) do { \
311 1.1 dbj (void) t; \
312 1.13 perry __asm volatile (" \
313 1.7 chs movl %0,%%a0 ; \
314 1.7 chs movl %1,%%a1 ; \
315 1.7 chs movl %2,%%d0 ; \
316 1.7 chs 1: movw %%a1@+,%%a0@ ; \
317 1.7 chs subql #1,%%d0 ; \
318 1.1 dbj jne 1b" : \
319 1.1 dbj : \
320 1.1 dbj "r" ((h) + (o)), "g" (a), "g" (c) : \
321 1.1 dbj "a0","a1","d0"); \
322 1.1 dbj } while (0);
323 1.1 dbj
324 1.1 dbj #define bus_space_write_multi_4(t, h, o, a, c) do { \
325 1.1 dbj (void) t; \
326 1.13 perry __asm volatile (" \
327 1.7 chs movl %0,%%a0 ; \
328 1.7 chs movl %1,%%a1 ; \
329 1.7 chs movl %2,%%d0 ; \
330 1.7 chs 1: movl %%a1@+,%%a0@ ; \
331 1.7 chs subql #1,%%d0 ; \
332 1.1 dbj jne 1b" : \
333 1.1 dbj : \
334 1.1 dbj "r" ((h) + (o)), "g" (a), "g" (c) : \
335 1.1 dbj "a0","a1","d0"); \
336 1.1 dbj } while (0);
337 1.1 dbj
338 1.1 dbj #if 0 /* Cause a link error for bus_space_write_8 */
339 1.1 dbj #define bus_space_write_multi_8(t, h, o, a, c) \
340 1.1 dbj !!! bus_space_write_multi_8 unimplimented !!!
341 1.1 dbj #endif
342 1.1 dbj
343 1.1 dbj /*
344 1.11 chs * void bus_space_write_region_N(bus_space_tag_t tag,
345 1.1 dbj * bus_space_handle_t bsh, bus_size_t offset,
346 1.11 chs * const u_intN_t *addr, size_t count);
347 1.1 dbj *
348 1.1 dbj * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided
349 1.1 dbj * to bus space described by tag/handle starting at `offset'.
350 1.1 dbj */
351 1.1 dbj
352 1.1 dbj #define bus_space_write_region_1(t, h, o, a, c) do { \
353 1.1 dbj (void) t; \
354 1.13 perry __asm volatile (" \
355 1.7 chs movl %0,%%a0 ; \
356 1.7 chs movl %1,%%a1 ; \
357 1.7 chs movl %2,%%d0 ; \
358 1.7 chs 1: movb %%a1@+,%%a0@+ ; \
359 1.7 chs subql #1,%%d0 ; \
360 1.1 dbj jne 1b" : \
361 1.1 dbj : \
362 1.1 dbj "r" ((h) + (o)), "g" (a), "g" (c) : \
363 1.1 dbj "a0","a1","d0"); \
364 1.1 dbj } while (0);
365 1.1 dbj
366 1.1 dbj #define bus_space_write_region_2(t, h, o, a, c) do { \
367 1.1 dbj (void) t; \
368 1.13 perry __asm volatile (" \
369 1.7 chs movl %0,%%a0 ; \
370 1.7 chs movl %1,%%a1 ; \
371 1.7 chs movl %2,%%d0 ; \
372 1.7 chs 1: movw %%a1@+,%%a0@+ ; \
373 1.7 chs subql #1,%%d0 ; \
374 1.1 dbj jne 1b" : \
375 1.1 dbj : \
376 1.1 dbj "r" ((h) + (o)), "g" (a), "g" (c) : \
377 1.1 dbj "a0","a1","d0"); \
378 1.1 dbj } while (0);
379 1.1 dbj
380 1.1 dbj #define bus_space_write_region_4(t, h, o, a, c) do { \
381 1.1 dbj (void) t; \
382 1.13 perry __asm volatile (" \
383 1.7 chs movl %0,%%a0 ; \
384 1.7 chs movl %1,%%a1 ; \
385 1.7 chs movl %2,%%d0 ; \
386 1.7 chs 1: movl %%a1@+,%%a0@+ ; \
387 1.7 chs subql #1,%%d0 ; \
388 1.1 dbj jne 1b" : \
389 1.1 dbj : \
390 1.1 dbj "r" ((h) + (o)), "g" (a), "g" (c) : \
391 1.1 dbj "a0","a1","d0"); \
392 1.1 dbj } while (0);
393 1.1 dbj
394 1.1 dbj #if 0 /* Cause a link error for bus_space_write_region_8 */
395 1.1 dbj #define bus_space_write_region_8 \
396 1.1 dbj !!! bus_space_write_region_8 unimplemented !!!
397 1.1 dbj #endif
398 1.1 dbj
399 1.1 dbj /*
400 1.11 chs * void bus_space_set_multi_N(bus_space_tag_t tag,
401 1.1 dbj * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
402 1.11 chs * size_t count);
403 1.1 dbj *
404 1.1 dbj * Write the 1, 2, 4, or 8 byte value `val' to bus space described
405 1.1 dbj * by tag/handle/offset `count' times.
406 1.1 dbj */
407 1.1 dbj
408 1.1 dbj #define bus_space_set_multi_1(t, h, o, val, c) do { \
409 1.1 dbj (void) t; \
410 1.13 perry __asm volatile (" \
411 1.7 chs movl %0,%%a0 ; \
412 1.7 chs movl %1,%%d1 ; \
413 1.7 chs movl %2,%%d0 ; \
414 1.7 chs 1: movb %%d1,%%a0@ ; \
415 1.7 chs subql #1,%%d0 ; \
416 1.1 dbj jne 1b" : \
417 1.1 dbj : \
418 1.1 dbj "r" ((h) + (o)), "g" (val), "g" (c) : \
419 1.1 dbj "a0","d0","d1"); \
420 1.1 dbj } while (0);
421 1.1 dbj
422 1.1 dbj #define bus_space_set_multi_2(t, h, o, val, c) do { \
423 1.1 dbj (void) t; \
424 1.13 perry __asm volatile (" \
425 1.7 chs movl %0,%%a0 ; \
426 1.7 chs movl %1,%%d1 ; \
427 1.7 chs movl %2,%%d0 ; \
428 1.7 chs 1: movw %%d1,%%a0@ ; \
429 1.7 chs subql #1,%%d0 ; \
430 1.1 dbj jne 1b" : \
431 1.1 dbj : \
432 1.1 dbj "r" ((h) + (o)), "g" (val), "g" (c) : \
433 1.1 dbj "a0","d0","d1"); \
434 1.1 dbj } while (0);
435 1.1 dbj
436 1.1 dbj #define bus_space_set_multi_4(t, h, o, val, c) do { \
437 1.1 dbj (void) t; \
438 1.13 perry __asm volatile (" \
439 1.7 chs movl %0,%%a0 ; \
440 1.7 chs movl %1,%%d1 ; \
441 1.7 chs movl %2,%%d0 ; \
442 1.7 chs 1: movl %%d1,%%a0@ ; \
443 1.7 chs subql #1,%%d0 ; \
444 1.1 dbj jne 1b" : \
445 1.1 dbj : \
446 1.1 dbj "r" ((h) + (o)), "g" (val), "g" (c) : \
447 1.1 dbj "a0","d0","d1"); \
448 1.1 dbj } while (0);
449 1.1 dbj
450 1.1 dbj #if 0 /* Cause a link error for bus_space_set_multi_8 */
451 1.1 dbj #define bus_space_set_multi_8 \
452 1.1 dbj !!! bus_space_set_multi_8 unimplemented !!!
453 1.1 dbj #endif
454 1.1 dbj
455 1.1 dbj /*
456 1.11 chs * void bus_space_set_region_N(bus_space_tag_t tag,
457 1.1 dbj * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
458 1.11 chs * size_t count);
459 1.1 dbj *
460 1.1 dbj * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
461 1.1 dbj * by tag/handle starting at `offset'.
462 1.1 dbj */
463 1.1 dbj
464 1.1 dbj #define bus_space_set_region_1(t, h, o, val, c) do { \
465 1.1 dbj (void) t; \
466 1.13 perry __asm volatile (" \
467 1.7 chs movl %0,%%a0 ; \
468 1.7 chs movl %1,%%d1 ; \
469 1.7 chs movl %2,%%d0 ; \
470 1.7 chs 1: movb %%d1,%%a0@+ ; \
471 1.7 chs subql #1,%%d0 ; \
472 1.1 dbj jne 1b" : \
473 1.1 dbj : \
474 1.1 dbj "r" ((h) + (o)), "g" (val), "g" (c) : \
475 1.1 dbj "a0","d0","d1"); \
476 1.1 dbj } while (0);
477 1.1 dbj
478 1.1 dbj #define bus_space_set_region_2(t, h, o, val, c) do { \
479 1.1 dbj (void) t; \
480 1.13 perry __asm volatile (" \
481 1.7 chs movl %0,%%a0 ; \
482 1.7 chs movl %1,%%d1 ; \
483 1.7 chs movl %2,%%d0 ; \
484 1.7 chs 1: movw %%d1,%%a0@+ ; \
485 1.7 chs subql #1,%%d0 ; \
486 1.1 dbj jne 1b" : \
487 1.1 dbj : \
488 1.1 dbj "r" ((h) + (o)), "g" (val), "g" (c) : \
489 1.1 dbj "a0","d0","d1"); \
490 1.1 dbj } while (0);
491 1.1 dbj
492 1.1 dbj #define bus_space_set_region_4(t, h, o, val, c) do { \
493 1.1 dbj (void) t; \
494 1.13 perry __asm volatile (" \
495 1.7 chs movl %0,%%a0 ; \
496 1.7 chs movl %1,%%d1 ; \
497 1.7 chs movl %2,%%d0 ; \
498 1.7 chs 1: movl %%d1,%%a0@+ ; \
499 1.7 chs subql #1,%%d0 ; \
500 1.1 dbj jne 1b" : \
501 1.1 dbj : \
502 1.1 dbj "r" ((h) + (o)), "g" (val), "g" (c) : \
503 1.1 dbj "a0","d0","d1"); \
504 1.1 dbj } while (0);
505 1.1 dbj
506 1.1 dbj #if 0 /* Cause a link error for bus_space_set_region_8 */
507 1.1 dbj #define bus_space_set_region_8 \
508 1.1 dbj !!! bus_space_set_region_8 unimplemented !!!
509 1.1 dbj #endif
510 1.1 dbj
511 1.1 dbj /*
512 1.11 chs * void bus_space_copy_N(bus_space_tag_t tag,
513 1.1 dbj * bus_space_handle_t bsh1, bus_size_t off1,
514 1.1 dbj * bus_space_handle_t bsh2, bus_size_t off2,
515 1.11 chs * size_t count);
516 1.1 dbj *
517 1.1 dbj * Copy `count' 1, 2, 4, or 8 byte values from bus space starting
518 1.1 dbj * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
519 1.1 dbj */
520 1.1 dbj
521 1.1 dbj #define __NEXT68K_copy_region_N(BYTES) \
522 1.14 perry static __inline void __CONCAT(bus_space_copy_region_,BYTES) \
523 1.11 chs (bus_space_tag_t, \
524 1.11 chs bus_space_handle_t, bus_size_t, \
525 1.11 chs bus_space_handle_t, bus_size_t, \
526 1.11 chs bus_size_t); \
527 1.1 dbj \
528 1.14 perry static __inline void \
529 1.16 matt __CONCAT(bus_space_copy_region_,BYTES)( \
530 1.16 matt bus_space_tag_t t, \
531 1.16 matt bus_space_handle_t h1, \
532 1.16 matt bus_size_t o1, \
533 1.16 matt bus_space_handle_t h2, \
534 1.16 matt bus_size_t o2, \
535 1.16 matt bus_size_t c) \
536 1.1 dbj { \
537 1.1 dbj bus_size_t o; \
538 1.1 dbj \
539 1.1 dbj if ((h1 + o1) >= (h2 + o2)) { \
540 1.1 dbj /* src after dest: copy forward */ \
541 1.1 dbj for (o = 0; c != 0; c--, o += BYTES) \
542 1.1 dbj __CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \
543 1.1 dbj __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \
544 1.1 dbj } else { \
545 1.1 dbj /* dest after src: copy backwards */ \
546 1.1 dbj for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) \
547 1.1 dbj __CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \
548 1.1 dbj __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \
549 1.1 dbj } \
550 1.1 dbj }
551 1.1 dbj __NEXT68K_copy_region_N(1)
552 1.1 dbj __NEXT68K_copy_region_N(2)
553 1.1 dbj __NEXT68K_copy_region_N(4)
554 1.1 dbj #if 0 /* Cause a link error for bus_space_copy_8 */
555 1.1 dbj #define bus_space_copy_8 \
556 1.1 dbj !!! bus_space_copy_8 unimplemented !!!
557 1.1 dbj #endif
558 1.1 dbj
559 1.1 dbj #undef __NEXT68K_copy_region_N
560 1.1 dbj
561 1.1 dbj /*
562 1.1 dbj * Bus read/write barrier methods.
563 1.1 dbj *
564 1.11 chs * void bus_space_barrier(bus_space_tag_t tag,
565 1.1 dbj * bus_space_handle_t bsh, bus_size_t offset,
566 1.11 chs * bus_size_t len, int flags);
567 1.1 dbj *
568 1.1 dbj * Note: the 680x0 does not currently require barriers, but we must
569 1.1 dbj * provide the flags to MI code.
570 1.1 dbj */
571 1.1 dbj #define bus_space_barrier(t, h, o, l, f) \
572 1.1 dbj ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)))
573 1.1 dbj #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */
574 1.1 dbj #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */
575 1.5 drochner
576 1.5 drochner #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
577 1.1 dbj
578 1.1 dbj #endif /* _NEXT68K_BUS_SPACE_H_ */
579