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intr.h revision 1.16 
      1 /*	$NetBSD: intr.h,v 1.16 2006/12/21 15:55:24 yamt Exp $	*/
      2 
      3 /*
      4  * Copyright (C) 1997 Scott Reynolds
      5  * Copyright (C) 1998 Darrin Jewell
      6  * All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  * 3. The name of the author may not be used to endorse or promote products
     17  *    derived from this software without specific prior written permission.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     20  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     21  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     22  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     23  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     24  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     25  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     26  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     27  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     28  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     29  */
     30 
     31 #ifndef _NEXT68K_INTR_H_
     32 #define _NEXT68K_INTR_H_
     33 
     34 #include <machine/psl.h>
     35 
     36 /* Probably want to dealwith IPL's here @@@ */
     37 
     38 #ifdef _KERNEL
     39 
     40 /* spl0 requires checking for software interrupts */
     41 
     42 /* watch out for side effects */
     43 #define splx(s)         ((s) & PSL_IPL ? _spl(s) : spl0())
     44 
     45 /****************************************************************/
     46 
     47 #define	IPL_HIGH	(PSL_S|PSL_IPL7)
     48 #define	IPL_SERIAL	(PSL_S|PSL_IPL5)
     49 #define	IPL_SCHED	(PSL_S|PSL_IPL7)
     50 #define	IPL_LOCK	(PSL_S|PSL_IPL7)
     51 #define	IPL_CLOCK	(PSL_S|PSL_IPL3)
     52 #define	IPL_STATCLOCK	IPL_CLOCK
     53 #define	IPL_VM		(PSL_S|PSL_IPL6)
     54 #define	IPL_TTY		(PSL_S|PSL_IPL3)
     55 #define	IPL_BIO		(PSL_S|PSL_IPL3)
     56 #define	IPL_NET		(PSL_S|PSL_IPL3)
     57 #define	IPL_SOFTNET	(PSL_S|PSL_IPL2)
     58 #define	IPL_SOFTCLOCK	(PSL_S|PSL_IPL1)
     59 #define	IPL_NONE	0
     60 
     61 typedef int ipl_t;
     62 typedef struct {
     63 	ipl_t _ipl;
     64 } ipl_cookie_t;
     65 
     66 static inline ipl_cookie_t
     67 makeiplcookie(ipl_t ipl)
     68 {
     69 
     70 	return (ipl_cookie_t){._ipl = ipl};
     71 }
     72 
     73 static inline int
     74 splraiseipl(ipl_cookie_t icookie)
     75 {
     76 
     77 	return _splraise(icookie._ipl);
     78 }
     79 
     80 #include <sys/spl.h>
     81 
     82 #define spllowersoftclock() spl1()
     83 
     84 #define spldma()        _splraise(PSL_S|PSL_IPL6)
     85 
     86 /****************************************************************/
     87 
     88 /*
     89  * simulated software interrupt register
     90  */
     91 extern volatile u_int8_t ssir;
     92 
     93 #define	SIR_NET		0x01
     94 #define	SIR_CLOCK	0x02
     95 #define	SIR_SERIAL	0x04
     96 #define SIR_DTMGR	0x08
     97 #define SIR_ADB		0x10
     98 
     99 #define	siron(mask)	\
    100 	__asm volatile ( "orb %1,%0" : "=m" (ssir) : "i" (mask))
    101 #define	siroff(mask)	\
    102 	__asm volatile ( "andb %1,%0" : "=m" (ssir) : "ir" (~(mask)));
    103 
    104 #define	setsoftnet()	siron(SIR_NET)
    105 #define	setsoftclock()	siron(SIR_CLOCK)
    106 #define	setsoftserial()	siron(SIR_SERIAL)
    107 #define	setsoftdtmgr()	siron(SIR_DTMGR)
    108 #define	setsoftadb()	siron(SIR_ADB)
    109 
    110 extern u_long allocate_sir(void (*)(void *),void *);
    111 extern void init_sir(void);
    112 
    113 /* locore.s */
    114 int	spl0(void);
    115 
    116 extern volatile u_long *intrstat;
    117 extern volatile u_long *intrmask;
    118 #define INTR_SETMASK(x)		(*intrmask = (x))
    119 #define INTR_ENABLE(x)		(*intrmask |= NEXT_I_BIT(x))
    120 #define INTR_DISABLE(x)		(*intrmask &= (~NEXT_I_BIT(x)))
    121 #define INTR_OCCURRED(x)	(*intrstat & NEXT_I_BIT(x))
    122 
    123 #endif /* _KERNEL */
    124 
    125 #endif /* _NEXT68K_INTR_H_ */
    126