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intr.h revision 1.7 
      1 /*	$NetBSD: intr.h,v 1.7 2000/08/21 02:06:33 thorpej Exp $	*/
      2 
      3 /*
      4  * Copyright (C) 1997 Scott Reynolds
      5  * Copyright (C) 1998 Darrin Jewell
      6  * All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  * 3. The name of the author may not be used to endorse or promote products
     17  *    derived from this software without specific prior written permission.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     20  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     21  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     22  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     23  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     24  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     25  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     26  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     27  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     28  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     29  */
     30 
     31 #ifndef _NEXT68K_INTR_H_
     32 #define _NEXT68K_INTR_H_
     33 
     34 #include <machine/psl.h>
     35 
     36 /* Probably want to dealwith IPL's here @@@ */
     37 
     38 #ifdef _KERNEL
     39 
     40 /* spl0 requires checking for software interrupts */
     41 
     42 /* watch out for side effects */
     43 #define splx(s)         ((s) & PSL_IPL ? _spl(s) : spl0())
     44 
     45 /****************************************************************/
     46 
     47 #define splhigh()       spl7()
     48 #define splserial()     _splraise(PSL_S|PSL_IPL5)
     49 #define splsched()      spl7()
     50 #define splclock()      _splraise(PSL_S|PSL_IPL6)
     51 #define splstatclock()  splclock()
     52 #define splimp()        _splraise(PSL_S|PSL_IPL6)
     53 #define spltty()        _splraise(PSL_S|PSL_IPL3)
     54 #define splbio()        _splraise(PSL_S|PSL_IPL3)
     55 #define splnet()        _splraise(PSL_S|PSL_IPL3)
     56 #define splsoftnet()    _splraise(PSL_S|PSL_IPL2)
     57 #define	splsoftclock()	splraise1()
     58 #define spllowersoftclock() spl1()
     59 
     60 #define spldma()        _splraise(PSL_S|PSL_IPL6)
     61 
     62 /****************************************************************/
     63 
     64 /*
     65  * simulated software interrupt register
     66  */
     67 extern volatile u_int8_t ssir;
     68 
     69 #define	SIR_NET		0x01
     70 #define	SIR_CLOCK	0x02
     71 #define	SIR_SERIAL	0x04
     72 #define SIR_DTMGR	0x08
     73 #define SIR_ADB		0x10
     74 
     75 #define	siron(mask)	\
     76 	__asm __volatile ( "orb %1,%0" : "=m" (ssir) : "i" (mask))
     77 #define	siroff(mask)	\
     78 	__asm __volatile ( "andb %1,%0" : "=m" (ssir) : "ir" (~(mask)));
     79 
     80 #define	setsoftnet()	siron(SIR_NET)
     81 #define	setsoftclock()	siron(SIR_CLOCK)
     82 #define	setsoftserial()	siron(SIR_SERIAL)
     83 #define	setsoftdtmgr()	siron(SIR_DTMGR)
     84 #define	setsoftadb()	siron(SIR_ADB)
     85 
     86 extern u_long allocate_sir __P((void (*)(void *),void *));
     87 extern void init_sir __P((void));
     88 
     89 /* locore.s */
     90 int	spl0 __P((void));
     91 #endif /* _KERNEL */
     92 
     93 #define INTR_SETMASK(x)  ((*(volatile u_long *)IIOV(NEXT_P_INTRMASK))=(x))
     94 #define INTR_ENABLE(x)   ((*(volatile u_long *)IIOV(NEXT_P_INTRMASK))|=NEXT_I_BIT(x))
     95 #define INTR_DISABLE(x)  ((*(volatile u_long *)IIOV(NEXT_P_INTRMASK))&=(~NEXT_I_BIT(x)))
     96 #define INTR_OCCURRED(x)  ((*(volatile u_long *)IIOV(NEXT_P_INTRSTAT))& NEXT_I_BIT(x))
     97 
     98 #endif /* _NEXT68K_INTR_H_ */
     99