scsi.c revision 1.1.1.1 1 1.1 dbj /* $NetBSD: scsi.c,v 1.1.1.1 1998/06/09 07:53:06 dbj Exp $ */
2 1.1 dbj /*
3 1.1 dbj * Copyright (c) 1994, 1997 Rolf Grossmann
4 1.1 dbj * All rights reserved.
5 1.1 dbj *
6 1.1 dbj * Redistribution and use in source and binary forms, with or without
7 1.1 dbj * modification, are permitted provided that the following conditions
8 1.1 dbj * are met:
9 1.1 dbj * 1. Redistributions of source code must retain the above copyright
10 1.1 dbj * notice, this list of conditions and the following disclaimer.
11 1.1 dbj * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 dbj * notice, this list of conditions and the following disclaimer in the
13 1.1 dbj * documentation and/or other materials provided with the distribution.
14 1.1 dbj * 3. All advertising materials mentioning features or use of this software
15 1.1 dbj * must display the following acknowledgement:
16 1.1 dbj * This product includes software developed by Rolf Grossmann.
17 1.1 dbj * 4. The name of the author may not be used to endorse or promote products
18 1.1 dbj * derived from this software without specific prior written permission
19 1.1 dbj *
20 1.1 dbj * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21 1.1 dbj * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 1.1 dbj * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 1.1 dbj * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 1.1 dbj * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 1.1 dbj * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 1.1 dbj * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 1.1 dbj * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 1.1 dbj * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 1.1 dbj * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 1.1 dbj */
31 1.1 dbj
32 1.1 dbj #include <sys/param.h>
33 1.1 dbj #include <next68k/dev/espreg.h>
34 1.1 dbj #include <dev/scsipi/scsi_message.h>
35 1.1 dbj #if 0
36 1.1 dbj #include <next/next/prominfo.h>
37 1.1 dbj #else
38 1.1 dbj #include <next68k/next68k/nextrom.h>
39 1.1 dbj #endif
40 1.1 dbj #include "scsireg.h"
41 1.1 dbj #include "dmareg.h"
42 1.1 dbj #include "scsivar.h"
43 1.1 dbj
44 1.1 dbj #include <lib/libsa/stand.h>
45 1.1 dbj
46 1.1 dbj struct scsi_softc scsi_softc, *sc = &scsi_softc;
47 1.1 dbj char the_dma_buffer[MAX_DMASIZE+DMA_ENDALIGNMENT], *dma_buffer;
48 1.1 dbj
49 1.1 dbj int scsi_msgin(void);
50 1.1 dbj int dma_start(char *addr, int len);
51 1.1 dbj int dma_done(void);
52 1.1 dbj
53 1.1 dbj #ifdef SCSI_DEBUG
54 1.1 dbj #define DPRINTF(x) printf x;
55 1.1 dbj #else
56 1.1 dbj #define DPRINTF(x)
57 1.1 dbj #endif
58 1.1 dbj
59 1.1 dbj void
60 1.1 dbj scsi_init(void)
61 1.1 dbj {
62 1.1 dbj volatile caddr_t sr;
63 1.1 dbj struct dma_dev *dma;
64 1.1 dbj
65 1.1 dbj sr = P_SCSI;
66 1.1 dbj dma = (struct dma_dev *)P_SCSI_CSR;
67 1.1 dbj
68 1.1 dbj dma_buffer = DMA_ALIGN(char *, the_dma_buffer);
69 1.1 dbj
70 1.1 dbj P_FLOPPY[FLP_CTRL] &= ~FLC_82077_SEL; /* select SCSI chip */
71 1.1 dbj
72 1.1 dbj /* first reset dma */
73 1.1 dbj dma->dd_csr = DMACSR_RESET;
74 1.1 dbj DELAY(200);
75 1.1 dbj sr[ESP_DCTL] = ESPDCTL_20MHZ | ESPDCTL_INTENB | ESPDCTL_RESET;
76 1.1 dbj DELAY(10);
77 1.1 dbj sr[ESP_DCTL] = ESPDCTL_20MHZ | ESPDCTL_INTENB;
78 1.1 dbj DELAY(10);
79 1.1 dbj
80 1.1 dbj /* then reset the SCSI chip */
81 1.1 dbj sr[ESP_CMD] = ESPCMD_RSTCHIP;
82 1.1 dbj sr[ESP_CMD] = ESPCMD_NOP;
83 1.1 dbj DELAY(500);
84 1.1 dbj
85 1.1 dbj /* now reset the SCSI bus */
86 1.1 dbj sr[ESP_CMD] = ESPCMD_RSTSCSI;
87 1.1 dbj DELAY(18000000); /* XXX should be about 2-3 seconds at least */
88 1.1 dbj
89 1.1 dbj /* then reset the SCSI chip again and initialize it properly */
90 1.1 dbj sr[ESP_CMD] = ESPCMD_RSTCHIP;
91 1.1 dbj sr[ESP_CMD] = ESPCMD_NOP;
92 1.1 dbj DELAY(500);
93 1.1 dbj sr[ESP_CFG1] = ESPCFG1_SLOW | ESPCFG1_BUSID;
94 1.1 dbj sr[ESP_CFG2] = 0;
95 1.1 dbj sr[ESP_CCF] = 4; /* S5RCLKCONV_FACTOR(20); */
96 1.1 dbj sr[ESP_TIMEOUT] = 152; /* S5RSELECT_TIMEOUT(20,250); */
97 1.1 dbj sr[ESP_SYNCOFF] = 0;
98 1.1 dbj sr[ESP_SYNCTP] = 5;
99 1.1 dbj /*
100 1.1 dbj sc->sc_intrstatus = sr->s5r_intrstatus;
101 1.1 dbj sc->sc_intrstatus = sr->s5r_intrstatus;
102 1.1 dbj */
103 1.1 dbj sr[ESP_CFG1] = ESPCFG1_PARENB | ESPCFG1_BUSID;
104 1.1 dbj
105 1.1 dbj sc->sc_state = SCSI_IDLE;
106 1.1 dbj }
107 1.1 dbj
108 1.1 dbj void
109 1.1 dbj scsierror(char *error)
110 1.1 dbj {
111 1.1 dbj printf("scsierror: %s.\n", error);
112 1.1 dbj }
113 1.1 dbj
114 1.1 dbj short
115 1.1 dbj scsi_getbyte(volatile caddr_t sr)
116 1.1 dbj {
117 1.1 dbj if ((sr[ESP_FFLAG] & ESPFIFO_FF) == 0)
118 1.1 dbj {
119 1.1 dbj printf("getbyte: no data!\n");
120 1.1 dbj return -1;
121 1.1 dbj }
122 1.1 dbj return sr[ESP_FIFO];
123 1.1 dbj }
124 1.1 dbj
125 1.1 dbj int
126 1.1 dbj scsi_wait_for_intr(void)
127 1.1 dbj {
128 1.1 dbj #if 0
129 1.1 dbj extern struct prominfo *pi;
130 1.1 dbj volitle int = pi->pi_intrstat; /* ### use constant? */
131 1.1 dbj #else
132 1.1 dbj extern char *mg;
133 1.1 dbj #define MON(type, off) (*(type *)((u_int) (mg) + off))
134 1.1 dbj volatile int *intrstat = MON(volatile int *,MG_intrstat);
135 1.1 dbj #endif
136 1.1 dbj int count;
137 1.1 dbj
138 1.1 dbj for(count = 0; count < SCSI_TIMEOUT; count++)
139 1.1 dbj if (*intrstat & SCSI_INTR)
140 1.1 dbj return 0;
141 1.1 dbj
142 1.1 dbj printf("scsiicmd: timed out.\n");
143 1.1 dbj return -1;
144 1.1 dbj }
145 1.1 dbj
146 1.1 dbj int
147 1.1 dbj scsiicmd(char target, char lun,
148 1.1 dbj u_char *cbuf, int clen,
149 1.1 dbj char *addr, int len)
150 1.1 dbj {
151 1.1 dbj volatile caddr_t sr;
152 1.1 dbj int i;
153 1.1 dbj
154 1.1 dbj DPRINTF(("scsiicmd: [%x, %d] -> %d (%lx, %d)\n",*cbuf, clen,
155 1.1 dbj target, (long)addr, len));
156 1.1 dbj sr = P_SCSI;
157 1.1 dbj
158 1.1 dbj if (sc->sc_state != SCSI_IDLE) {
159 1.1 dbj scsierror("scsiiscmd: bad state");
160 1.1 dbj return EIO;
161 1.1 dbj }
162 1.1 dbj sc->sc_result = 0;
163 1.1 dbj
164 1.1 dbj /* select target */
165 1.1 dbj sr[ESP_CMD] = ESPCMD_FLUSH;
166 1.1 dbj DELAY(10);
167 1.1 dbj sr[ESP_SELID] = target;
168 1.1 dbj sr[ESP_FIFO] = MSG_IDENTIFY(lun, 0);
169 1.1 dbj for (i=0; i<clen; i++)
170 1.1 dbj sr[ESP_FIFO] = cbuf[i];
171 1.1 dbj sr[ESP_CMD] = ESPCMD_SELATN;
172 1.1 dbj sc->sc_state = SCSI_SELECTING;
173 1.1 dbj
174 1.1 dbj while(sc->sc_state != SCSI_DONE) {
175 1.1 dbj if (scsi_wait_for_intr()) /* maybe we'd better use real intrs ? */
176 1.1 dbj return EIO;
177 1.1 dbj
178 1.1 dbj if (sc->sc_state == SCSI_DMA)
179 1.1 dbj {
180 1.1 dbj /* registers are not valid on dma intr */
181 1.1 dbj sc->sc_status = sc->sc_seqstep = sc->sc_intrstatus = 0;
182 1.1 dbj DPRINTF(("scsiicmd: dma intr\n"));
183 1.1 dbj } else {
184 1.1 dbj /* scsi processing */
185 1.1 dbj sc->sc_status = sr[ESP_STAT];
186 1.1 dbj sc->sc_seqstep = sr[ESP_STEP];
187 1.1 dbj sc->sc_intrstatus = sr[ESP_INTR];
188 1.1 dbj DPRINTF(("scsiicmd: regs[intr=%x, stat=%x, step=%x]\n",
189 1.1 dbj sc->sc_intrstatus, sc->sc_status, sc->sc_seqstep));
190 1.1 dbj }
191 1.1 dbj
192 1.1 dbj if (sc->sc_intrstatus & ESPINTR_SBR) {
193 1.1 dbj scsierror("scsi bus reset");
194 1.1 dbj return EIO;
195 1.1 dbj }
196 1.1 dbj
197 1.1 dbj if ((sc->sc_status & ESPSTAT_GE)
198 1.1 dbj || (sc->sc_intrstatus & ESPINTR_ILL)) {
199 1.1 dbj scsierror("software error");
200 1.1 dbj return EIO;
201 1.1 dbj }
202 1.1 dbj if (sc->sc_status & ESPSTAT_PE)
203 1.1 dbj {
204 1.1 dbj scsierror("parity error");
205 1.1 dbj return EIO;
206 1.1 dbj }
207 1.1 dbj
208 1.1 dbj switch(sc->sc_state)
209 1.1 dbj {
210 1.1 dbj case SCSI_SELECTING:
211 1.1 dbj if (sc->sc_intrstatus & ESPINTR_DIS)
212 1.1 dbj {
213 1.1 dbj sc->sc_state = SCSI_IDLE;
214 1.1 dbj return EUNIT; /* device not present */
215 1.1 dbj }
216 1.1 dbj
217 1.1 dbj #define ESPINTR_DONE (ESPINTR_BS | ESPINTR_FC)
218 1.1 dbj if ((sc->sc_intrstatus & ESPINTR_DONE) != ESPINTR_DONE)
219 1.1 dbj {
220 1.1 dbj scsierror("selection failed");
221 1.1 dbj return EIO;
222 1.1 dbj }
223 1.1 dbj sc->sc_state = SCSI_HASBUS;
224 1.1 dbj break;
225 1.1 dbj case SCSI_HASBUS:
226 1.1 dbj if (sc->sc_intrstatus & ESPINTR_DIS)
227 1.1 dbj {
228 1.1 dbj scsierror("target disconnected");
229 1.1 dbj return EIO;
230 1.1 dbj }
231 1.1 dbj break;
232 1.1 dbj case SCSI_DMA:
233 1.1 dbj if (sc->sc_intrstatus & ESPINTR_DIS)
234 1.1 dbj {
235 1.1 dbj scsierror("target disconnected");
236 1.1 dbj return EIO;
237 1.1 dbj }
238 1.1 dbj if (dma_done() != 0)
239 1.1 dbj return EIO;
240 1.1 dbj continue;
241 1.1 dbj case SCSI_CLEANUP:
242 1.1 dbj if (sc->sc_intrstatus & ESPINTR_DIS)
243 1.1 dbj {
244 1.1 dbj sc->sc_state = SCSI_DONE;
245 1.1 dbj continue;
246 1.1 dbj }
247 1.1 dbj DPRINTF(("hmm ... no disconnect on cleanup?\n"));
248 1.1 dbj sc->sc_state = SCSI_DONE; /* maybe ... */
249 1.1 dbj break;
250 1.1 dbj }
251 1.1 dbj
252 1.1 dbj /* transfer information now */
253 1.1 dbj switch(sc->sc_status & ESPSTAT_PHASE)
254 1.1 dbj {
255 1.1 dbj case DATA_IN_PHASE:
256 1.1 dbj if (dma_start(addr, len) != 0)
257 1.1 dbj return EIO;
258 1.1 dbj break;
259 1.1 dbj case DATA_OUT_PHASE:
260 1.1 dbj scsierror("data out phase not implemented");
261 1.1 dbj return EIO;
262 1.1 dbj case STATUS_PHASE:
263 1.1 dbj DPRINTF(("status phase: "));
264 1.1 dbj sr[ESP_CMD] = ESPCMD_ICCS;
265 1.1 dbj sc->sc_result = scsi_getbyte(sr);
266 1.1 dbj DPRINTF(("status is 0x%x.\n", sc->sc_result));
267 1.1 dbj break;
268 1.1 dbj case MSG_IN_PHASE:
269 1.1 dbj if (scsi_msgin() != 0)
270 1.1 dbj return EIO;
271 1.1 dbj break;
272 1.1 dbj default:
273 1.1 dbj DPRINTF(("phase not implemented: 0x%x.\n",
274 1.1 dbj sc->sc_status & ESPSTAT_PHASE));
275 1.1 dbj scsierror("bad phase");
276 1.1 dbj return EIO;
277 1.1 dbj }
278 1.1 dbj }
279 1.1 dbj
280 1.1 dbj sc->sc_state = SCSI_IDLE;
281 1.1 dbj return -sc->sc_result;
282 1.1 dbj }
283 1.1 dbj
284 1.1 dbj int
285 1.1 dbj scsi_msgin(void)
286 1.1 dbj {
287 1.1 dbj volatile caddr_t sr;
288 1.1 dbj u_char msg;
289 1.1 dbj
290 1.1 dbj sr = P_SCSI;
291 1.1 dbj
292 1.1 dbj msg = scsi_getbyte(sr);
293 1.1 dbj if (msg)
294 1.1 dbj {
295 1.1 dbj printf("unexpected msg: 0x%x.\n",msg);
296 1.1 dbj return -1;
297 1.1 dbj }
298 1.1 dbj if ((sc->sc_intrstatus & ESPINTR_FC) == 0)
299 1.1 dbj {
300 1.1 dbj printf("not function complete.\n");
301 1.1 dbj return -1;
302 1.1 dbj }
303 1.1 dbj sc->sc_state = SCSI_CLEANUP;
304 1.1 dbj sr[ESP_CMD] = ESPCMD_MSGOK;
305 1.1 dbj return 0;
306 1.1 dbj }
307 1.1 dbj
308 1.1 dbj int
309 1.1 dbj dma_start(char *addr, int len)
310 1.1 dbj {
311 1.1 dbj volatile caddr_t sr;
312 1.1 dbj struct dma_dev *dma;
313 1.1 dbj
314 1.1 dbj
315 1.1 dbj sr = P_SCSI;
316 1.1 dbj dma = (struct dma_dev *)P_SCSI_CSR;
317 1.1 dbj
318 1.1 dbj if (len > MAX_DMASIZE)
319 1.1 dbj {
320 1.1 dbj scsierror("dma too long");
321 1.1 dbj return -1;
322 1.1 dbj }
323 1.1 dbj
324 1.1 dbj if (addr == NULL || len == 0)
325 1.1 dbj {
326 1.1 dbj #if 0 /* I'd take that as an error in my code */
327 1.1 dbj DPRINTF(("hmm ... no dma requested.\n"));
328 1.1 dbj sr[ESP_TCL] = 0;
329 1.1 dbj sr[ESP_TCM] = 1;
330 1.1 dbj sr[ESP_CMD] = ESPCMD_NOP;
331 1.1 dbj sr[ESP_CMD] = ESPCMD_DMA | ESPCMD_TRPAD;
332 1.1 dbj return 0;
333 1.1 dbj #else
334 1.1 dbj scsierror("unrequested dma");
335 1.1 dbj return -1;
336 1.1 dbj #endif
337 1.1 dbj }
338 1.1 dbj
339 1.1 dbj DPRINTF(("dma start: %lx, %d byte.\n", (long)addr, len));
340 1.1 dbj sc->dma_addr = addr;
341 1.1 dbj sc->dma_len = len;
342 1.1 dbj
343 1.1 dbj dma->dd_csr = DMACSR_READ | DMACSR_RESET;
344 1.1 dbj dma->dd_next_initbuf = dma_buffer;
345 1.1 dbj dma->dd_limit = DMA_ENDALIGN(char *, dma_buffer+len);
346 1.1 dbj dma->dd_csr = DMACSR_READ | DMACSR_SETENABLE;
347 1.1 dbj
348 1.1 dbj sr[ESP_TCL] = len & 0xff;
349 1.1 dbj sr[ESP_TCM] = len >> 8;
350 1.1 dbj sr[ESP_CMD] = ESPCMD_NOP;
351 1.1 dbj sr[ESP_CMD] = ESPCMD_DMA | ESPCMD_TRANS;
352 1.1 dbj sr[ESP_DCTL] = ESPDCTL_20MHZ|ESPDCTL_INTENB|ESPDCTL_DMAMOD|ESPDCTL_DMARD;
353 1.1 dbj
354 1.1 dbj sc->sc_state = SCSI_DMA;
355 1.1 dbj return 0;
356 1.1 dbj }
357 1.1 dbj
358 1.1 dbj int
359 1.1 dbj dma_done(void)
360 1.1 dbj {
361 1.1 dbj volatile caddr_t sr;
362 1.1 dbj struct dma_dev *dma;
363 1.1 dbj int count, state;
364 1.1 dbj
365 1.1 dbj sr = P_SCSI;
366 1.1 dbj dma = (struct dma_dev *)P_SCSI_CSR;
367 1.1 dbj
368 1.1 dbj state = dma->dd_csr & (DMACSR_BUSEXC | DMACSR_COMPLETE
369 1.1 dbj | DMACSR_SUPDATE | DMACSR_ENABLE);
370 1.1 dbj
371 1.1 dbj count = sr[ESP_TCM]<<8 | sr[ESP_TCL];
372 1.1 dbj DPRINTF(("dma state = 0x%x, remain = %d.\n", state, count));
373 1.1 dbj
374 1.1 dbj if (state & DMACSR_ENABLE)
375 1.1 dbj {
376 1.1 dbj sr[ESP_DCTL] = ESPDCTL_20MHZ | ESPDCTL_INTENB | ESPDCTL_DMAMOD
377 1.1 dbj | ESPDCTL_DMARD | ESPDCTL_FLUSH;
378 1.1 dbj DELAY(5);
379 1.1 dbj sr[ESP_DCTL] = ESPDCTL_20MHZ | ESPDCTL_INTENB | ESPDCTL_DMAMOD
380 1.1 dbj | ESPDCTL_DMARD;
381 1.1 dbj DELAY(5);
382 1.1 dbj return 0;
383 1.1 dbj }
384 1.1 dbj
385 1.1 dbj sr[ESP_DCTL] = ESPDCTL_20MHZ | ESPDCTL_INTENB;
386 1.1 dbj count = sr[ESP_TCM]<<8 | sr[ESP_TCL];
387 1.1 dbj dma->dd_csr = DMACSR_RESET;
388 1.1 dbj
389 1.1 dbj DPRINTF(("dma done. remain = %d, state = 0x%x.\n", count, state));
390 1.1 dbj
391 1.1 dbj if (count != 0)
392 1.1 dbj {
393 1.1 dbj printf("WARNING: unexpected %d characters remain in dma\n",count);
394 1.1 dbj scsierror("dma transfer incomplete");
395 1.1 dbj #if 0
396 1.1 dbj return -1;
397 1.1 dbj #endif
398 1.1 dbj }
399 1.1 dbj
400 1.1 dbj if (state & DMACSR_COMPLETE)
401 1.1 dbj {
402 1.1 dbj bcopy(dma_buffer, sc->dma_addr, sc->dma_len);
403 1.1 dbj sc->sc_state = SCSI_HASBUS;
404 1.1 dbj return 0;
405 1.1 dbj }
406 1.1 dbj if (state & DMACSR_BUSEXC)
407 1.1 dbj {
408 1.1 dbj scsierror("dma failed");
409 1.1 dbj return -1;
410 1.1 dbj }
411 1.1 dbj scsierror("dma not completed\n");
412 1.1 dbj
413 1.1 dbj return -1;
414 1.1 dbj }
415