scsi.c revision 1.2 1 1.2 dbj /* $NetBSD: scsi.c,v 1.2 1999/03/26 06:54:40 dbj Exp $ */
2 1.1 dbj /*
3 1.1 dbj * Copyright (c) 1994, 1997 Rolf Grossmann
4 1.1 dbj * All rights reserved.
5 1.1 dbj *
6 1.1 dbj * Redistribution and use in source and binary forms, with or without
7 1.1 dbj * modification, are permitted provided that the following conditions
8 1.1 dbj * are met:
9 1.1 dbj * 1. Redistributions of source code must retain the above copyright
10 1.1 dbj * notice, this list of conditions and the following disclaimer.
11 1.1 dbj * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 dbj * notice, this list of conditions and the following disclaimer in the
13 1.1 dbj * documentation and/or other materials provided with the distribution.
14 1.1 dbj * 3. All advertising materials mentioning features or use of this software
15 1.1 dbj * must display the following acknowledgement:
16 1.1 dbj * This product includes software developed by Rolf Grossmann.
17 1.1 dbj * 4. The name of the author may not be used to endorse or promote products
18 1.1 dbj * derived from this software without specific prior written permission
19 1.1 dbj *
20 1.1 dbj * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21 1.1 dbj * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 1.1 dbj * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 1.1 dbj * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 1.1 dbj * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 1.1 dbj * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 1.1 dbj * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 1.1 dbj * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 1.1 dbj * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 1.1 dbj * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 1.1 dbj */
31 1.1 dbj
32 1.1 dbj #include <sys/param.h>
33 1.1 dbj #include <next68k/dev/espreg.h>
34 1.1 dbj #include <dev/scsipi/scsi_message.h>
35 1.1 dbj #if 0
36 1.1 dbj #include <next/next/prominfo.h>
37 1.1 dbj #else
38 1.1 dbj #include <next68k/next68k/nextrom.h>
39 1.1 dbj #endif
40 1.1 dbj #include "scsireg.h"
41 1.1 dbj #include "dmareg.h"
42 1.1 dbj #include "scsivar.h"
43 1.1 dbj
44 1.1 dbj #include <lib/libsa/stand.h>
45 1.1 dbj
46 1.1 dbj struct scsi_softc scsi_softc, *sc = &scsi_softc;
47 1.1 dbj char the_dma_buffer[MAX_DMASIZE+DMA_ENDALIGNMENT], *dma_buffer;
48 1.1 dbj
49 1.1 dbj int scsi_msgin(void);
50 1.1 dbj int dma_start(char *addr, int len);
51 1.1 dbj int dma_done(void);
52 1.1 dbj
53 1.2 dbj void scsi_init(void);
54 1.2 dbj void scsierror(char *error);
55 1.2 dbj short scsi_getbyte(volatile caddr_t sr);
56 1.2 dbj int scsi_wait_for_intr(void);
57 1.2 dbj int scsiicmd(char target, char lun,
58 1.2 dbj u_char *cbuf, int clen, char *addr, int len);
59 1.2 dbj
60 1.1 dbj #ifdef SCSI_DEBUG
61 1.1 dbj #define DPRINTF(x) printf x;
62 1.1 dbj #else
63 1.1 dbj #define DPRINTF(x)
64 1.1 dbj #endif
65 1.1 dbj
66 1.1 dbj void
67 1.1 dbj scsi_init(void)
68 1.1 dbj {
69 1.1 dbj volatile caddr_t sr;
70 1.1 dbj struct dma_dev *dma;
71 1.1 dbj
72 1.1 dbj sr = P_SCSI;
73 1.1 dbj dma = (struct dma_dev *)P_SCSI_CSR;
74 1.1 dbj
75 1.1 dbj dma_buffer = DMA_ALIGN(char *, the_dma_buffer);
76 1.1 dbj
77 1.1 dbj P_FLOPPY[FLP_CTRL] &= ~FLC_82077_SEL; /* select SCSI chip */
78 1.1 dbj
79 1.1 dbj /* first reset dma */
80 1.1 dbj dma->dd_csr = DMACSR_RESET;
81 1.1 dbj DELAY(200);
82 1.1 dbj sr[ESP_DCTL] = ESPDCTL_20MHZ | ESPDCTL_INTENB | ESPDCTL_RESET;
83 1.1 dbj DELAY(10);
84 1.1 dbj sr[ESP_DCTL] = ESPDCTL_20MHZ | ESPDCTL_INTENB;
85 1.1 dbj DELAY(10);
86 1.1 dbj
87 1.1 dbj /* then reset the SCSI chip */
88 1.1 dbj sr[ESP_CMD] = ESPCMD_RSTCHIP;
89 1.1 dbj sr[ESP_CMD] = ESPCMD_NOP;
90 1.1 dbj DELAY(500);
91 1.1 dbj
92 1.1 dbj /* now reset the SCSI bus */
93 1.1 dbj sr[ESP_CMD] = ESPCMD_RSTSCSI;
94 1.1 dbj DELAY(18000000); /* XXX should be about 2-3 seconds at least */
95 1.1 dbj
96 1.1 dbj /* then reset the SCSI chip again and initialize it properly */
97 1.1 dbj sr[ESP_CMD] = ESPCMD_RSTCHIP;
98 1.1 dbj sr[ESP_CMD] = ESPCMD_NOP;
99 1.1 dbj DELAY(500);
100 1.1 dbj sr[ESP_CFG1] = ESPCFG1_SLOW | ESPCFG1_BUSID;
101 1.1 dbj sr[ESP_CFG2] = 0;
102 1.1 dbj sr[ESP_CCF] = 4; /* S5RCLKCONV_FACTOR(20); */
103 1.1 dbj sr[ESP_TIMEOUT] = 152; /* S5RSELECT_TIMEOUT(20,250); */
104 1.1 dbj sr[ESP_SYNCOFF] = 0;
105 1.1 dbj sr[ESP_SYNCTP] = 5;
106 1.1 dbj /*
107 1.1 dbj sc->sc_intrstatus = sr->s5r_intrstatus;
108 1.1 dbj sc->sc_intrstatus = sr->s5r_intrstatus;
109 1.1 dbj */
110 1.1 dbj sr[ESP_CFG1] = ESPCFG1_PARENB | ESPCFG1_BUSID;
111 1.1 dbj
112 1.1 dbj sc->sc_state = SCSI_IDLE;
113 1.1 dbj }
114 1.1 dbj
115 1.1 dbj void
116 1.1 dbj scsierror(char *error)
117 1.1 dbj {
118 1.1 dbj printf("scsierror: %s.\n", error);
119 1.1 dbj }
120 1.1 dbj
121 1.1 dbj short
122 1.1 dbj scsi_getbyte(volatile caddr_t sr)
123 1.1 dbj {
124 1.1 dbj if ((sr[ESP_FFLAG] & ESPFIFO_FF) == 0)
125 1.1 dbj {
126 1.1 dbj printf("getbyte: no data!\n");
127 1.1 dbj return -1;
128 1.1 dbj }
129 1.1 dbj return sr[ESP_FIFO];
130 1.1 dbj }
131 1.1 dbj
132 1.1 dbj int
133 1.1 dbj scsi_wait_for_intr(void)
134 1.1 dbj {
135 1.1 dbj #if 0
136 1.1 dbj extern struct prominfo *pi;
137 1.1 dbj volitle int = pi->pi_intrstat; /* ### use constant? */
138 1.1 dbj #else
139 1.1 dbj extern char *mg;
140 1.1 dbj #define MON(type, off) (*(type *)((u_int) (mg) + off))
141 1.1 dbj volatile int *intrstat = MON(volatile int *,MG_intrstat);
142 1.2 dbj volatile int *intrmask = MON(volatile int *,MG_intrmask);
143 1.1 dbj #endif
144 1.1 dbj int count;
145 1.1 dbj
146 1.2 dbj for(count = 0; count < SCSI_TIMEOUT; count++) {
147 1.2 dbj DPRINTF((" *intrstat = 0x%x\t*intrmask = 0x%x\n",*intrstat,*intrmask));
148 1.2 dbj
149 1.1 dbj if (*intrstat & SCSI_INTR)
150 1.1 dbj return 0;
151 1.2 dbj }
152 1.1 dbj
153 1.1 dbj printf("scsiicmd: timed out.\n");
154 1.1 dbj return -1;
155 1.1 dbj }
156 1.1 dbj
157 1.1 dbj int
158 1.1 dbj scsiicmd(char target, char lun,
159 1.1 dbj u_char *cbuf, int clen,
160 1.1 dbj char *addr, int len)
161 1.1 dbj {
162 1.1 dbj volatile caddr_t sr;
163 1.1 dbj int i;
164 1.1 dbj
165 1.1 dbj DPRINTF(("scsiicmd: [%x, %d] -> %d (%lx, %d)\n",*cbuf, clen,
166 1.1 dbj target, (long)addr, len));
167 1.1 dbj sr = P_SCSI;
168 1.1 dbj
169 1.1 dbj if (sc->sc_state != SCSI_IDLE) {
170 1.1 dbj scsierror("scsiiscmd: bad state");
171 1.1 dbj return EIO;
172 1.1 dbj }
173 1.1 dbj sc->sc_result = 0;
174 1.1 dbj
175 1.1 dbj /* select target */
176 1.1 dbj sr[ESP_CMD] = ESPCMD_FLUSH;
177 1.1 dbj DELAY(10);
178 1.1 dbj sr[ESP_SELID] = target;
179 1.1 dbj sr[ESP_FIFO] = MSG_IDENTIFY(lun, 0);
180 1.1 dbj for (i=0; i<clen; i++)
181 1.1 dbj sr[ESP_FIFO] = cbuf[i];
182 1.1 dbj sr[ESP_CMD] = ESPCMD_SELATN;
183 1.1 dbj sc->sc_state = SCSI_SELECTING;
184 1.1 dbj
185 1.1 dbj while(sc->sc_state != SCSI_DONE) {
186 1.1 dbj if (scsi_wait_for_intr()) /* maybe we'd better use real intrs ? */
187 1.1 dbj return EIO;
188 1.1 dbj
189 1.1 dbj if (sc->sc_state == SCSI_DMA)
190 1.1 dbj {
191 1.1 dbj /* registers are not valid on dma intr */
192 1.1 dbj sc->sc_status = sc->sc_seqstep = sc->sc_intrstatus = 0;
193 1.1 dbj DPRINTF(("scsiicmd: dma intr\n"));
194 1.1 dbj } else {
195 1.1 dbj /* scsi processing */
196 1.1 dbj sc->sc_status = sr[ESP_STAT];
197 1.1 dbj sc->sc_seqstep = sr[ESP_STEP];
198 1.1 dbj sc->sc_intrstatus = sr[ESP_INTR];
199 1.1 dbj DPRINTF(("scsiicmd: regs[intr=%x, stat=%x, step=%x]\n",
200 1.1 dbj sc->sc_intrstatus, sc->sc_status, sc->sc_seqstep));
201 1.1 dbj }
202 1.1 dbj
203 1.1 dbj if (sc->sc_intrstatus & ESPINTR_SBR) {
204 1.1 dbj scsierror("scsi bus reset");
205 1.1 dbj return EIO;
206 1.1 dbj }
207 1.1 dbj
208 1.1 dbj if ((sc->sc_status & ESPSTAT_GE)
209 1.1 dbj || (sc->sc_intrstatus & ESPINTR_ILL)) {
210 1.1 dbj scsierror("software error");
211 1.1 dbj return EIO;
212 1.1 dbj }
213 1.1 dbj if (sc->sc_status & ESPSTAT_PE)
214 1.1 dbj {
215 1.1 dbj scsierror("parity error");
216 1.1 dbj return EIO;
217 1.1 dbj }
218 1.1 dbj
219 1.1 dbj switch(sc->sc_state)
220 1.1 dbj {
221 1.1 dbj case SCSI_SELECTING:
222 1.1 dbj if (sc->sc_intrstatus & ESPINTR_DIS)
223 1.1 dbj {
224 1.1 dbj sc->sc_state = SCSI_IDLE;
225 1.1 dbj return EUNIT; /* device not present */
226 1.1 dbj }
227 1.1 dbj
228 1.1 dbj #define ESPINTR_DONE (ESPINTR_BS | ESPINTR_FC)
229 1.1 dbj if ((sc->sc_intrstatus & ESPINTR_DONE) != ESPINTR_DONE)
230 1.1 dbj {
231 1.1 dbj scsierror("selection failed");
232 1.1 dbj return EIO;
233 1.1 dbj }
234 1.1 dbj sc->sc_state = SCSI_HASBUS;
235 1.1 dbj break;
236 1.1 dbj case SCSI_HASBUS:
237 1.1 dbj if (sc->sc_intrstatus & ESPINTR_DIS)
238 1.1 dbj {
239 1.1 dbj scsierror("target disconnected");
240 1.1 dbj return EIO;
241 1.1 dbj }
242 1.1 dbj break;
243 1.1 dbj case SCSI_DMA:
244 1.1 dbj if (sc->sc_intrstatus & ESPINTR_DIS)
245 1.1 dbj {
246 1.1 dbj scsierror("target disconnected");
247 1.1 dbj return EIO;
248 1.1 dbj }
249 1.1 dbj if (dma_done() != 0)
250 1.1 dbj return EIO;
251 1.1 dbj continue;
252 1.1 dbj case SCSI_CLEANUP:
253 1.1 dbj if (sc->sc_intrstatus & ESPINTR_DIS)
254 1.1 dbj {
255 1.1 dbj sc->sc_state = SCSI_DONE;
256 1.1 dbj continue;
257 1.1 dbj }
258 1.1 dbj DPRINTF(("hmm ... no disconnect on cleanup?\n"));
259 1.1 dbj sc->sc_state = SCSI_DONE; /* maybe ... */
260 1.1 dbj break;
261 1.1 dbj }
262 1.1 dbj
263 1.1 dbj /* transfer information now */
264 1.1 dbj switch(sc->sc_status & ESPSTAT_PHASE)
265 1.1 dbj {
266 1.1 dbj case DATA_IN_PHASE:
267 1.1 dbj if (dma_start(addr, len) != 0)
268 1.1 dbj return EIO;
269 1.1 dbj break;
270 1.1 dbj case DATA_OUT_PHASE:
271 1.1 dbj scsierror("data out phase not implemented");
272 1.1 dbj return EIO;
273 1.1 dbj case STATUS_PHASE:
274 1.1 dbj DPRINTF(("status phase: "));
275 1.1 dbj sr[ESP_CMD] = ESPCMD_ICCS;
276 1.1 dbj sc->sc_result = scsi_getbyte(sr);
277 1.1 dbj DPRINTF(("status is 0x%x.\n", sc->sc_result));
278 1.1 dbj break;
279 1.1 dbj case MSG_IN_PHASE:
280 1.1 dbj if (scsi_msgin() != 0)
281 1.1 dbj return EIO;
282 1.1 dbj break;
283 1.1 dbj default:
284 1.1 dbj DPRINTF(("phase not implemented: 0x%x.\n",
285 1.1 dbj sc->sc_status & ESPSTAT_PHASE));
286 1.1 dbj scsierror("bad phase");
287 1.1 dbj return EIO;
288 1.1 dbj }
289 1.1 dbj }
290 1.1 dbj
291 1.1 dbj sc->sc_state = SCSI_IDLE;
292 1.1 dbj return -sc->sc_result;
293 1.1 dbj }
294 1.1 dbj
295 1.1 dbj int
296 1.1 dbj scsi_msgin(void)
297 1.1 dbj {
298 1.1 dbj volatile caddr_t sr;
299 1.1 dbj u_char msg;
300 1.1 dbj
301 1.1 dbj sr = P_SCSI;
302 1.1 dbj
303 1.1 dbj msg = scsi_getbyte(sr);
304 1.1 dbj if (msg)
305 1.1 dbj {
306 1.1 dbj printf("unexpected msg: 0x%x.\n",msg);
307 1.1 dbj return -1;
308 1.1 dbj }
309 1.1 dbj if ((sc->sc_intrstatus & ESPINTR_FC) == 0)
310 1.1 dbj {
311 1.1 dbj printf("not function complete.\n");
312 1.1 dbj return -1;
313 1.1 dbj }
314 1.1 dbj sc->sc_state = SCSI_CLEANUP;
315 1.1 dbj sr[ESP_CMD] = ESPCMD_MSGOK;
316 1.1 dbj return 0;
317 1.1 dbj }
318 1.1 dbj
319 1.1 dbj int
320 1.1 dbj dma_start(char *addr, int len)
321 1.1 dbj {
322 1.1 dbj volatile caddr_t sr;
323 1.1 dbj struct dma_dev *dma;
324 1.1 dbj
325 1.1 dbj
326 1.1 dbj sr = P_SCSI;
327 1.1 dbj dma = (struct dma_dev *)P_SCSI_CSR;
328 1.1 dbj
329 1.1 dbj if (len > MAX_DMASIZE)
330 1.1 dbj {
331 1.1 dbj scsierror("dma too long");
332 1.1 dbj return -1;
333 1.1 dbj }
334 1.1 dbj
335 1.1 dbj if (addr == NULL || len == 0)
336 1.1 dbj {
337 1.1 dbj #if 0 /* I'd take that as an error in my code */
338 1.1 dbj DPRINTF(("hmm ... no dma requested.\n"));
339 1.1 dbj sr[ESP_TCL] = 0;
340 1.1 dbj sr[ESP_TCM] = 1;
341 1.1 dbj sr[ESP_CMD] = ESPCMD_NOP;
342 1.1 dbj sr[ESP_CMD] = ESPCMD_DMA | ESPCMD_TRPAD;
343 1.1 dbj return 0;
344 1.1 dbj #else
345 1.1 dbj scsierror("unrequested dma");
346 1.1 dbj return -1;
347 1.1 dbj #endif
348 1.1 dbj }
349 1.1 dbj
350 1.1 dbj DPRINTF(("dma start: %lx, %d byte.\n", (long)addr, len));
351 1.2 dbj
352 1.2 dbj DPRINTF(("dma_bufffer: start: 0x%lx end: 0x%lx \n",
353 1.2 dbj (long)dma_buffer,(long)DMA_ENDALIGN(char *, dma_buffer+len)));
354 1.2 dbj
355 1.1 dbj sc->dma_addr = addr;
356 1.1 dbj sc->dma_len = len;
357 1.1 dbj
358 1.2 dbj sr[ESP_TCL] = len & 0xff;
359 1.2 dbj sr[ESP_TCM] = len >> 8;
360 1.2 dbj sr[ESP_CMD] = ESPCMD_DMA | ESPCMD_NOP;
361 1.2 dbj sr[ESP_CMD] = ESPCMD_DMA | ESPCMD_TRANS;
362 1.2 dbj
363 1.2 dbj #if 0
364 1.1 dbj dma->dd_csr = DMACSR_READ | DMACSR_RESET;
365 1.1 dbj dma->dd_next_initbuf = dma_buffer;
366 1.1 dbj dma->dd_limit = DMA_ENDALIGN(char *, dma_buffer+len);
367 1.1 dbj dma->dd_csr = DMACSR_READ | DMACSR_SETENABLE;
368 1.2 dbj #else
369 1.2 dbj dma->dd_csr = 0;
370 1.2 dbj dma->dd_csr = DMACSR_INITBUF | DMACSR_READ | DMACSR_RESET;
371 1.2 dbj dma->dd_next_initbuf = dma_buffer;
372 1.2 dbj dma->dd_limit = DMA_ENDALIGN(char *, dma_buffer+len);
373 1.2 dbj dma->dd_csr = DMACSR_READ | DMACSR_SETENABLE;
374 1.2 dbj #endif
375 1.2 dbj
376 1.1 dbj sr[ESP_DCTL] = ESPDCTL_20MHZ|ESPDCTL_INTENB|ESPDCTL_DMAMOD|ESPDCTL_DMARD;
377 1.1 dbj
378 1.1 dbj sc->sc_state = SCSI_DMA;
379 1.1 dbj return 0;
380 1.1 dbj }
381 1.1 dbj
382 1.1 dbj int
383 1.1 dbj dma_done(void)
384 1.1 dbj {
385 1.1 dbj volatile caddr_t sr;
386 1.1 dbj struct dma_dev *dma;
387 1.1 dbj int count, state;
388 1.1 dbj
389 1.1 dbj sr = P_SCSI;
390 1.1 dbj dma = (struct dma_dev *)P_SCSI_CSR;
391 1.1 dbj
392 1.1 dbj state = dma->dd_csr & (DMACSR_BUSEXC | DMACSR_COMPLETE
393 1.1 dbj | DMACSR_SUPDATE | DMACSR_ENABLE);
394 1.1 dbj
395 1.1 dbj count = sr[ESP_TCM]<<8 | sr[ESP_TCL];
396 1.1 dbj DPRINTF(("dma state = 0x%x, remain = %d.\n", state, count));
397 1.1 dbj
398 1.1 dbj if (state & DMACSR_ENABLE)
399 1.1 dbj {
400 1.2 dbj
401 1.2 dbj DPRINTF(("dma still enabled, flushing DCTL.\n"));
402 1.2 dbj
403 1.1 dbj sr[ESP_DCTL] = ESPDCTL_20MHZ | ESPDCTL_INTENB | ESPDCTL_DMAMOD
404 1.1 dbj | ESPDCTL_DMARD | ESPDCTL_FLUSH;
405 1.2 dbj /* DELAY(5); */
406 1.1 dbj sr[ESP_DCTL] = ESPDCTL_20MHZ | ESPDCTL_INTENB | ESPDCTL_DMAMOD
407 1.1 dbj | ESPDCTL_DMARD;
408 1.2 dbj /* DELAY(5); */
409 1.2 dbj
410 1.1 dbj return 0;
411 1.1 dbj }
412 1.1 dbj
413 1.1 dbj sr[ESP_DCTL] = ESPDCTL_20MHZ | ESPDCTL_INTENB;
414 1.1 dbj count = sr[ESP_TCM]<<8 | sr[ESP_TCL];
415 1.1 dbj dma->dd_csr = DMACSR_RESET;
416 1.1 dbj
417 1.1 dbj DPRINTF(("dma done. remain = %d, state = 0x%x.\n", count, state));
418 1.1 dbj
419 1.1 dbj if (count != 0)
420 1.1 dbj {
421 1.1 dbj printf("WARNING: unexpected %d characters remain in dma\n",count);
422 1.1 dbj scsierror("dma transfer incomplete");
423 1.1 dbj #if 0
424 1.1 dbj return -1;
425 1.1 dbj #endif
426 1.1 dbj }
427 1.1 dbj
428 1.1 dbj if (state & DMACSR_COMPLETE)
429 1.1 dbj {
430 1.1 dbj bcopy(dma_buffer, sc->dma_addr, sc->dma_len);
431 1.1 dbj sc->sc_state = SCSI_HASBUS;
432 1.1 dbj return 0;
433 1.1 dbj }
434 1.1 dbj if (state & DMACSR_BUSEXC)
435 1.1 dbj {
436 1.1 dbj scsierror("dma failed");
437 1.1 dbj return -1;
438 1.1 dbj }
439 1.1 dbj scsierror("dma not completed\n");
440 1.1 dbj
441 1.1 dbj return -1;
442 1.1 dbj }
443