1 1.3 tsutsui /* $NetBSD: srt0.s,v 1.3 2023/02/04 14:38:09 tsutsui Exp $ */ 2 1.1 dbj /* 3 1.1 dbj * Copyright (c) 1994 Rolf Grossmann 4 1.1 dbj * All rights reserved. 5 1.1 dbj * 6 1.1 dbj * Redistribution and use in source and binary forms, with or without 7 1.1 dbj * modification, are permitted provided that the following conditions 8 1.1 dbj * are met: 9 1.1 dbj * 1. Redistributions of source code must retain the above copyright 10 1.1 dbj * notice, this list of conditions and the following disclaimer. 11 1.1 dbj * 2. Redistributions in binary form must reproduce the above copyright 12 1.1 dbj * notice, this list of conditions and the following disclaimer in the 13 1.1 dbj * documentation and/or other materials provided with the distribution. 14 1.1 dbj * 3. All advertising materials mentioning features or use of this software 15 1.1 dbj * must display the following acknowledgement: 16 1.1 dbj * This product includes software developed by Rolf Grossmann. 17 1.1 dbj * 4. The name of the author may not be used to endorse or promote products 18 1.1 dbj * derived from this software without specific prior written permission 19 1.1 dbj * 20 1.1 dbj * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 1.1 dbj * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 1.1 dbj * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 1.1 dbj * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 1.1 dbj * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 1.1 dbj * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 1.1 dbj * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 1.1 dbj * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 1.1 dbj * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 1.1 dbj * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 1.1 dbj */ 31 1.1 dbj 32 1.2 chs #include <machine/asm.h> 33 1.2 chs 34 1.1 dbj /* 35 1.1 dbj * Startup code for standalone system 36 1.1 dbj */ 37 1.1 dbj 38 1.2 chs .text 39 1.2 chs ASENTRY_NOPROFILE(start) 40 1.2 chs || clear bss (this should not hurt us i.e. cause an exception) 41 1.2 chs movel #_C_LABEL(edata),%a2 | start of BSS 42 1.2 chs movel #_C_LABEL(end),%a3 | end 43 1.1 dbj Lclr: 44 1.2 chs clrb %a2@+ | clear BSS 45 1.2 chs cmpl %a2,%a3 | done? 46 1.2 chs bne Lclr | no, keep going 47 1.2 chs 48 1.2 chs movl #0x0808,%d0 49 1.2 chs movc %d0,%cacr | clear and disable on-chip cache(s) 50 1.2 chs 51 1.2 chs || catch exceptions myself 52 1.2 chs movec %vbr,%a3 53 1.2 chs movel %a3,save_vbr | save register for restoration 54 1.2 chs lea vectbl,%a4 55 1.2 chs movel %a3@(4),%a4@(4) | copy mg, just for sure 56 1.2 chs movel %a3@(180),%a4@(180) | copy vector for trap #13 57 1.2 chs movel %a3@(124),%a4@(124) | copy vector for int 7 58 1.2 chs movec %a4,%vbr | use the new table 59 1.2 chs 60 1.2 chs || save mg as pi 61 1.2 chs movel %a3@(4),_C_LABEL(mg) 62 1.2 chs 63 1.2 chs || make sure we disallow interrupts 64 1.2 chs movew #0x2600,%sr 65 1.2 chs 66 1.2 chs || away we go 67 1.2 chs movel %sp@(4),%sp@- | copy the argument we got 68 1.2 chs jsr _C_LABEL(main) | call C 69 1.2 chs addql #4,%sp 70 1.2 chs 71 1.2 chs || restore prom vectors 72 1.2 chs movel save_vbr,%a0 73 1.2 chs movec %a0,%vbr 74 1.3 tsutsui 75 1.2 chs || return kernel start address (still in d0) 76 1.2 chs rts 77 1.2 chs 78 1.2 chs ENTRY(_halt) 79 1.2 chs movel save_vbr,%a0 80 1.2 chs movec %a0,%vbr | restore prom vbr 81 1.1 dbj hloop: 82 1.2 chs movel #halt,%d0 83 1.2 chs trap #13 | halt the system 84 1.2 chs bra hloop | and do not allow continuation 85 1.3 tsutsui 86 1.2 chs ASENTRY_NOPROFILE(astrap) 87 1.2 chs moveml %d0-%d7/%a0-%a7,%sp@- | save all registers 88 1.2 chs 89 1.2 chs movel %sp,%sp@- | push pointer to registers 90 1.2 chs jsr _C_LABEL(trap) | call C to handle things (dump regs) 91 1.2 chs addql #4,%sp 92 1.2 chs tstl %d0 93 1.2 chs jeq Lstop 94 1.2 chs moveml %sp@+,%d0-%d7/%a0-%a7 95 1.2 chs rte 96 1.1 dbj Lstop: 97 1.2 chs bra Lstop | stay here 98 1.2 chs 99 1.2 chs .data 100 1.1 dbj save_vbr: 101 1.2 chs .long 0 102 1.1 dbj halt: 103 1.2 chs .asciz "-h" 104 1.2 chs 105 1.2 chs #define TRAP16 \ 106 1.2 chs VECTOR(astrap); VECTOR(astrap); VECTOR(astrap); VECTOR(astrap); \ 107 1.2 chs VECTOR(astrap); VECTOR(astrap); VECTOR(astrap); VECTOR(astrap); \ 108 1.2 chs VECTOR(astrap); VECTOR(astrap); VECTOR(astrap); VECTOR(astrap); \ 109 1.2 chs VECTOR(astrap); VECTOR(astrap); VECTOR(astrap); VECTOR(astrap); 110 1.2 chs 111 1.2 chs vectbl: 112 1.2 chs TRAP16 113 1.2 chs TRAP16 114 1.2 chs TRAP16 115 1.2 chs TRAP16 116 1.2 chs TRAP16 117 1.2 chs TRAP16 118 1.2 chs TRAP16 119 1.2 chs TRAP16 120 1.2 chs TRAP16 121 1.2 chs TRAP16 122 1.2 chs TRAP16 123 1.2 chs TRAP16 124 1.2 chs TRAP16 125 1.2 chs TRAP16 126 1.2 chs TRAP16 127 1.2 chs TRAP16 128
Indexes created Wed Oct 15 16:09:53 GMT 2025