gt_mainbus.c revision 1.2.2.3
1 1.2.2.2 rmind /* $NetBSD: gt_mainbus.c,v 1.2.2.3 2011/03/05 20:51:29 rmind Exp $ */ 2 1.2.2.2 rmind /* 3 1.2.2.2 rmind * Copyright (c) 2010 KIYOHARA Takashi 4 1.2.2.2 rmind * All rights reserved. 5 1.2.2.2 rmind * 6 1.2.2.2 rmind * Redistribution and use in source and binary forms, with or without 7 1.2.2.2 rmind * modification, are permitted provided that the following conditions 8 1.2.2.2 rmind * are met: 9 1.2.2.2 rmind * 1. Redistributions of source code must retain the above copyright 10 1.2.2.2 rmind * notice, this list of conditions and the following disclaimer. 11 1.2.2.2 rmind * 2. Redistributions in binary form must reproduce the above copyright 12 1.2.2.2 rmind * notice, this list of conditions and the following disclaimer in the 13 1.2.2.2 rmind * documentation and/or other materials provided with the distribution. 14 1.2.2.2 rmind * 15 1.2.2.2 rmind * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 1.2.2.2 rmind * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 17 1.2.2.2 rmind * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 18 1.2.2.2 rmind * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 19 1.2.2.2 rmind * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 20 1.2.2.2 rmind * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 21 1.2.2.2 rmind * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 1.2.2.2 rmind * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 23 1.2.2.2 rmind * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 24 1.2.2.2 rmind * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 1.2.2.2 rmind * POSSIBILITY OF SUCH DAMAGE. 26 1.2.2.2 rmind */ 27 1.2.2.2 rmind 28 1.2.2.2 rmind #include <sys/cdefs.h> 29 1.2.2.2 rmind __KERNEL_RCSID(0, "$NetBSD: gt_mainbus.c,v 1.2.2.3 2011/03/05 20:51:29 rmind Exp $"); 30 1.2.2.2 rmind 31 1.2.2.2 rmind #include "opt_pci.h" 32 1.2.2.2 rmind #include "opt_marvell.h" 33 1.2.2.2 rmind #include "gtpci.h" 34 1.2.2.2 rmind #include "pci.h" 35 1.2.2.2 rmind #include "isa.h" 36 1.2.2.2 rmind 37 1.2.2.2 rmind #define _POWERPC_BUS_DMA_PRIVATE 38 1.2.2.2 rmind 39 1.2.2.2 rmind #include <sys/param.h> 40 1.2.2.2 rmind #include <sys/device.h> 41 1.2.2.2 rmind #include <sys/errno.h> 42 1.2.2.2 rmind #include <sys/extent.h> 43 1.2.2.2 rmind #include <sys/malloc.h> 44 1.2.2.2 rmind 45 1.2.2.2 rmind #include <machine/autoconf.h> 46 1.2.2.2 rmind #include <machine/bus.h> 47 1.2.2.2 rmind #include <machine/isa_machdep.h> 48 1.2.2.2 rmind #include <machine/pegasosreg.h> 49 1.2.2.2 rmind 50 1.2.2.2 rmind #include <dev/pci/pcivar.h> 51 1.2.2.2 rmind #include <dev/pci/pciconf.h> 52 1.2.2.3 rmind #include <dev/pci/pcidevs.h> 53 1.2.2.2 rmind 54 1.2.2.2 rmind #include <dev/marvell/gtreg.h> 55 1.2.2.2 rmind #include <dev/marvell/gtvar.h> 56 1.2.2.2 rmind #include <dev/marvell/gtpcireg.h> 57 1.2.2.2 rmind #include <dev/marvell/gtpcivar.h> 58 1.2.2.2 rmind #include <dev/marvell/marvellvar.h> 59 1.2.2.2 rmind #include <dev/ofw/openfirm.h> 60 1.2.2.2 rmind 61 1.2.2.2 rmind 62 1.2.2.2 rmind static int gt_match(device_t, cfdata_t, void *); 63 1.2.2.2 rmind static void gt_attach(device_t, device_t, void *); 64 1.2.2.2 rmind 65 1.2.2.2 rmind #if NGTPCI > 0 66 1.2.2.2 rmind static void gtpci_md_attach_hook(device_t, device_t, 67 1.2.2.2 rmind struct pcibus_attach_args *); 68 1.2.2.2 rmind void gtpci_md_conf_interrupt(void *, int, int, int, int, int *); 69 1.2.2.2 rmind int gtpci_md_conf_hook(void *, int, int, int, pcireg_t); 70 1.2.2.2 rmind #endif 71 1.2.2.2 rmind 72 1.2.2.2 rmind CFATTACH_DECL_NEW(gt, sizeof(struct gt_softc), gt_match, gt_attach, NULL, NULL); 73 1.2.2.2 rmind 74 1.2.2.2 rmind static struct powerpc_bus_space pegasosii_gt_bs_tag = { 75 1.2.2.2 rmind .pbs_offset = PEGASOS2_GT_REGBASE, 76 1.2.2.2 rmind .pbs_base = 0x00000000, 77 1.2.2.2 rmind .pbs_limit = GT_SIZE, 78 1.2.2.2 rmind }; 79 1.2.2.2 rmind static char ex_storage[EXTENT_FIXED_STORAGE_SIZE(8)] 80 1.2.2.2 rmind __attribute__((aligned(8))); 81 1.2.2.2 rmind 82 1.2.2.2 rmind struct powerpc_bus_dma_tag pegasosii_bus_dma_tag = { 83 1.2.2.2 rmind 0, /* _bounce_thresh */ 84 1.2.2.2 rmind _bus_dmamap_create, 85 1.2.2.2 rmind _bus_dmamap_destroy, 86 1.2.2.2 rmind _bus_dmamap_load, 87 1.2.2.2 rmind _bus_dmamap_load_mbuf, 88 1.2.2.2 rmind _bus_dmamap_load_uio, 89 1.2.2.2 rmind _bus_dmamap_load_raw, 90 1.2.2.2 rmind _bus_dmamap_unload, 91 1.2.2.2 rmind _bus_dmamap_sync, 92 1.2.2.2 rmind _bus_dmamem_alloc, 93 1.2.2.2 rmind _bus_dmamem_free, 94 1.2.2.2 rmind _bus_dmamem_map, 95 1.2.2.2 rmind _bus_dmamem_unmap, 96 1.2.2.2 rmind _bus_dmamem_mmap, 97 1.2.2.2 rmind }; 98 1.2.2.2 rmind 99 1.2.2.2 rmind #if NGTPCI > 0 100 1.2.2.2 rmind struct powerpc_bus_space 101 1.2.2.2 rmind gtpci0_io_bs_tag, gtpci0_mem_bs_tag, 102 1.2.2.2 rmind gtpci1_io_bs_tag, gtpci1_mem_bs_tag; 103 1.2.2.2 rmind #endif 104 1.2.2.2 rmind 105 1.2.2.2 rmind struct gtpci_prot gtpci0_prot = { 106 1.2.2.2 rmind GTPCI_ACBL_RDSIZE_32BYTE | 107 1.2.2.2 rmind GTPCI_ACBL_RDMBURST_32BYTE | 108 1.2.2.2 rmind GTPCI_ACBL_PCISWAP_BYTESWAP | 109 1.2.2.2 rmind GTPCI_ACBL_SNOOP_WB | 110 1.2.2.2 rmind GTPCI_ACBL_EN, 111 1.2.2.2 rmind 0, 112 1.2.2.2 rmind }, gtpci1_prot = { 113 1.2.2.2 rmind GTPCI_ACBL_RDSIZE_128BYTE | 114 1.2.2.2 rmind GTPCI_ACBL_RDMBURST_32BYTE | 115 1.2.2.2 rmind GTPCI_ACBL_PCISWAP_BYTESWAP | 116 1.2.2.2 rmind GTPCI_ACBL_SNOOP_WB | 117 1.2.2.2 rmind GTPCI_ACBL_EN, 118 1.2.2.2 rmind 0, 119 1.2.2.2 rmind }; 120 1.2.2.2 rmind 121 1.2.2.2 rmind 122 1.2.2.2 rmind int 123 1.2.2.2 rmind gt_match(device_t parent, cfdata_t cf, void *aux) 124 1.2.2.2 rmind { 125 1.2.2.2 rmind struct confargs *ca = aux; 126 1.2.2.3 rmind uint32_t device_id, vendor_id; 127 1.2.2.3 rmind int node; 128 1.2.2.2 rmind char name[32]; 129 1.2.2.2 rmind 130 1.2.2.2 rmind if (strcmp(ca->ca_name, "gt") != 0 || 131 1.2.2.2 rmind strcmp(model_name, "Pegasos2") != 0) 132 1.2.2.2 rmind return 0; 133 1.2.2.2 rmind 134 1.2.2.2 rmind /* Paranoid check... */ 135 1.2.2.2 rmind for (node = OF_child(OF_finddevice("/")); node; node = OF_peer(node)) { 136 1.2.2.2 rmind memset(name, 0, sizeof(name)); 137 1.2.2.2 rmind if (OF_getprop(node, "name", name, sizeof(name)) == -1) 138 1.2.2.2 rmind continue; 139 1.2.2.3 rmind if (strcmp(name, "pci") == 0) { 140 1.2.2.3 rmind for (node = OF_child(node); node; 141 1.2.2.3 rmind node = OF_peer(node)) { 142 1.2.2.3 rmind if (OF_getprop(node, "vendor-id", 143 1.2.2.3 rmind &vendor_id, sizeof(vendor_id)) == -1) 144 1.2.2.3 rmind continue; 145 1.2.2.3 rmind if (OF_getprop(node, "device-id", 146 1.2.2.3 rmind &device_id, sizeof(device_id)) == -1) 147 1.2.2.3 rmind continue; 148 1.2.2.3 rmind /* Find a Marvell system controller */ 149 1.2.2.3 rmind if (vendor_id == PCI_VENDOR_MARVELL && 150 1.2.2.3 rmind device_id == PCI_PRODUCT_MARVELL_MV64360) 151 1.2.2.3 rmind return 1; 152 1.2.2.3 rmind } 153 1.2.2.3 rmind return 0; 154 1.2.2.3 rmind } 155 1.2.2.2 rmind } 156 1.2.2.2 rmind return 0; 157 1.2.2.2 rmind } 158 1.2.2.2 rmind 159 1.2.2.2 rmind /* ARGSUSED */ 160 1.2.2.2 rmind void 161 1.2.2.2 rmind gt_attach(device_t parent, device_t self, void *aux) 162 1.2.2.2 rmind { 163 1.2.2.2 rmind struct gt_softc *sc = device_private(self); 164 1.2.2.2 rmind #if NGTPCI > 0 165 1.2.2.2 rmind uint32_t busrange[2]; 166 1.2.2.2 rmind int node; 167 1.2.2.2 rmind extern struct genppc_pci_chipset 168 1.2.2.2 rmind genppc_gtpci0_chipset, genppc_gtpci1_chipset; 169 1.2.2.2 rmind #endif 170 1.2.2.2 rmind 171 1.2.2.2 rmind bus_space_init(&pegasosii_gt_bs_tag, "gt", 172 1.2.2.2 rmind ex_storage, sizeof(ex_storage)); 173 1.2.2.2 rmind 174 1.2.2.2 rmind sc->sc_dev = self; 175 1.2.2.2 rmind sc->sc_addr = 0x00000000; 176 1.2.2.2 rmind sc->sc_iot = &pegasosii_gt_bs_tag; 177 1.2.2.2 rmind sc->sc_dmat = &pegasosii_bus_dma_tag; 178 1.2.2.2 rmind 179 1.2.2.2 rmind if (bus_space_map(sc->sc_iot, sc->sc_addr, GT_SIZE, 0, &sc->sc_ioh) != 180 1.2.2.2 rmind 0) { 181 1.2.2.2 rmind aprint_error(": registers map failed\n"); 182 1.2.2.2 rmind return; 183 1.2.2.2 rmind } 184 1.2.2.2 rmind 185 1.2.2.2 rmind init_ofppc_interrupt(); 186 1.2.2.2 rmind 187 1.2.2.2 rmind #if NGTPCI > 0 188 1.2.2.2 rmind /* bus space map the I/O and Memory ranges of PCI unit 1(PCI bus) */ 189 1.2.2.2 rmind node = of_find_firstchild_byname(OF_finddevice("/"), "pci"); 190 1.2.2.2 rmind if (node != -1) { 191 1.2.2.2 rmind gtpci1_io_bs_tag.pbs_flags = 192 1.2.2.2 rmind _BUS_SPACE_LITTLE_ENDIAN | _BUS_SPACE_IO_TYPE; 193 1.2.2.2 rmind gtpci1_io_bs_tag.pbs_base = 0x00000000; 194 1.2.2.2 rmind if (ofwoea_map_space(RANGE_TYPE_PCI, RANGE_IO, node, 195 1.2.2.2 rmind >pci1_io_bs_tag, "gtpci 1 io-space") != 0) 196 1.2.2.2 rmind panic("Can't init gtpci 1 io tag"); 197 1.2.2.2 rmind gtpci1_mem_bs_tag.pbs_flags = 198 1.2.2.2 rmind _BUS_SPACE_LITTLE_ENDIAN | _BUS_SPACE_MEM_TYPE; 199 1.2.2.2 rmind gtpci1_mem_bs_tag.pbs_base = 0x00000000; 200 1.2.2.2 rmind if (ofwoea_map_space(RANGE_TYPE_PCI, RANGE_MEM, node, 201 1.2.2.2 rmind >pci1_mem_bs_tag, "gtpci 1 mem-space") != 0) 202 1.2.2.2 rmind panic("Can't init gtpci 1 mem tag"); 203 1.2.2.2 rmind 204 1.2.2.2 rmind /* PCI bus number */ 205 1.2.2.2 rmind if (OF_getprop(node, "bus-range", busrange, sizeof(busrange)) != 206 1.2.2.2 rmind sizeof(busrange)) { 207 1.2.2.2 rmind aprint_error(": PCI bus range failed\n"); 208 1.2.2.2 rmind return; 209 1.2.2.2 rmind } 210 1.2.2.2 rmind 211 1.2.2.2 rmind /* Override some functions */ 212 1.2.2.2 rmind genppc_gtpci1_chipset.pc_attach_hook = gtpci_md_attach_hook; 213 1.2.2.2 rmind genppc_gtpci1_chipset.pc_intr_map = genofw_pci_intr_map; 214 1.2.2.2 rmind genppc_gtpci1_chipset.pc_node = node; 215 1.2.2.2 rmind genppc_gtpci1_chipset.pc_bus = busrange[0]; 216 1.2.2.2 rmind genppc_gtpci1_chipset.pc_iot = >pci1_io_bs_tag; 217 1.2.2.2 rmind genppc_gtpci1_chipset.pc_memt = >pci1_mem_bs_tag; 218 1.2.2.2 rmind 219 1.2.2.2 rmind #if NISA > 0 220 1.2.2.2 rmind genppc_isa_io_space_tag = gtpci1_io_bs_tag; 221 1.2.2.2 rmind genppc_isa_mem_space_tag = gtpci1_mem_bs_tag; 222 1.2.2.2 rmind map_isa_ioregs(); 223 1.2.2.2 rmind ofppc_init_comcons(of_find_firstchild_byname(node, "isa")); 224 1.2.2.2 rmind #endif 225 1.2.2.2 rmind } 226 1.2.2.2 rmind 227 1.2.2.2 rmind /* bus space map the I/O and Memory ranges of PCI unit 0(AGP bus) */ 228 1.2.2.2 rmind if (node != -1) 229 1.2.2.2 rmind node = of_getnode_byname(OF_peer(node), "pci"); 230 1.2.2.2 rmind if (node != -1 && node != 0) { 231 1.2.2.2 rmind gtpci0_io_bs_tag.pbs_flags = 232 1.2.2.2 rmind _BUS_SPACE_LITTLE_ENDIAN | _BUS_SPACE_IO_TYPE; 233 1.2.2.2 rmind gtpci0_io_bs_tag.pbs_base = 0x00000000; 234 1.2.2.2 rmind if (ofwoea_map_space(RANGE_TYPE_PCI, RANGE_IO, node, 235 1.2.2.2 rmind >pci0_io_bs_tag, "gtpci 0 io-space") != 0) 236 1.2.2.2 rmind panic("Can't init gtpci 0 io tag"); 237 1.2.2.2 rmind gtpci0_mem_bs_tag.pbs_flags = 238 1.2.2.2 rmind _BUS_SPACE_LITTLE_ENDIAN | _BUS_SPACE_MEM_TYPE; 239 1.2.2.2 rmind gtpci0_mem_bs_tag.pbs_base = 0x00000000; 240 1.2.2.2 rmind if (ofwoea_map_space(RANGE_TYPE_PCI, RANGE_MEM, node, 241 1.2.2.2 rmind >pci0_mem_bs_tag, "gtpci 0 mem-space") != 0) 242 1.2.2.2 rmind panic("Can't init gtpci 0 mem tag"); 243 1.2.2.2 rmind 244 1.2.2.2 rmind /* PCI bus number */ 245 1.2.2.2 rmind if (OF_getprop(node, "bus-range", busrange, sizeof(busrange)) != 246 1.2.2.2 rmind sizeof(busrange)) { 247 1.2.2.2 rmind aprint_error(": AGP bus range failed\n"); 248 1.2.2.2 rmind return; 249 1.2.2.2 rmind } 250 1.2.2.2 rmind 251 1.2.2.2 rmind genppc_gtpci0_chipset.pc_node = node; 252 1.2.2.2 rmind genppc_gtpci0_chipset.pc_bus = busrange[0]; 253 1.2.2.2 rmind genppc_gtpci0_chipset.pc_iot = >pci0_io_bs_tag; 254 1.2.2.2 rmind genppc_gtpci0_chipset.pc_memt = >pci0_mem_bs_tag; 255 1.2.2.2 rmind 256 1.2.2.3 rmind /* Enable AGP configuration space access. */ 257 1.2.2.3 rmind bus_space_write_4(sc->sc_iot, sc->sc_ioh, 258 1.2.2.3 rmind GT_GPP_Value_Set, PEGASOS2_AGP_CONF_ENABLE); 259 1.2.2.2 rmind } 260 1.2.2.2 rmind #endif 261 1.2.2.2 rmind 262 1.2.2.2 rmind gt_attach_common(sc); 263 1.2.2.2 rmind } 264 1.2.2.2 rmind 265 1.2.2.2 rmind 266 1.2.2.2 rmind #if NGTPCI > 0 267 1.2.2.2 rmind static void 268 1.2.2.2 rmind gtpci_md_attach_hook(device_t parent, device_t self, 269 1.2.2.2 rmind struct pcibus_attach_args *pba) 270 1.2.2.2 rmind { 271 1.2.2.2 rmind extern struct genppc_pci_chipset genppc_gtpci1_chipset; 272 1.2.2.2 rmind 273 1.2.2.2 rmind if (device_is_a(parent, "gtpci") && 274 1.2.2.2 rmind pba->pba_pc == &genppc_gtpci1_chipset) { 275 1.2.2.2 rmind /* Setup interrupts for PCI bus */ 276 1.2.2.2 rmind struct genppc_pci_chipset_businfo *pbi; 277 1.2.2.2 rmind 278 1.2.2.2 rmind pbi = malloc(sizeof(struct genppc_pci_chipset_businfo), 279 1.2.2.2 rmind M_DEVBUF, M_NOWAIT); 280 1.2.2.2 rmind KASSERT(pbi != NULL); 281 1.2.2.2 rmind pbi->pbi_properties = prop_dictionary_create(); 282 1.2.2.2 rmind KASSERT(pbi->pbi_properties != NULL); 283 1.2.2.2 rmind SIMPLEQ_INIT(&genppc_gtpci1_chipset.pc_pbi); 284 1.2.2.2 rmind SIMPLEQ_INSERT_TAIL(&genppc_gtpci1_chipset.pc_pbi, pbi, next); 285 1.2.2.2 rmind 286 1.2.2.2 rmind genofw_setup_pciintr_map(&genppc_gtpci1_chipset, pbi, 287 1.2.2.2 rmind genppc_gtpci1_chipset.pc_node); 288 1.2.2.2 rmind } 289 1.2.2.2 rmind gtpci_attach_hook(parent, self, pba); 290 1.2.2.2 rmind } 291 1.2.2.2 rmind 292 1.2.2.2 rmind /* ARGSUSED */ 293 1.2.2.2 rmind void 294 1.2.2.2 rmind gtpci_md_conf_interrupt(void * v, int bus, int dev, int pin, int swiz, 295 1.2.2.2 rmind int *iline) 296 1.2.2.2 rmind { 297 1.2.2.2 rmind 298 1.2.2.2 rmind /* do nothing */ 299 1.2.2.2 rmind } 300 1.2.2.2 rmind 301 1.2.2.2 rmind int 302 1.2.2.2 rmind gtpci_md_conf_hook(void *v, int bus, int dev, int func, pcireg_t id) 303 1.2.2.2 rmind { 304 1.2.2.2 rmind struct gtpci_softc *sc = v; 305 1.2.2.2 rmind 306 1.2.2.2 rmind if (gtpci_conf_hook(sc->sc_pc, bus, dev, func, id) == 0) 307 1.2.2.2 rmind return 0; 308 1.2.2.2 rmind return genofw_pci_conf_hook(sc->sc_pc, bus, dev, func, id); 309 1.2.2.2 rmind } 310 1.2.2.2 rmind #endif 311 1.2.2.2 rmind 312 1.2.2.2 rmind 313 1.2.2.2 rmind void * 314 1.2.2.2 rmind marvell_intr_establish(int irq, int ipl, int (*func)(void *), void *arg) 315 1.2.2.2 rmind { 316 1.2.2.2 rmind 317 1.2.2.2 rmind /* pass through */ 318 1.2.2.2 rmind return intr_establish(irq, IST_LEVEL, ipl, func, arg); 319 1.2.2.2 rmind } 320
Indexes created Mon Oct 20 15:10:11 GMT 2025