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ohci_sbus.c revision 1.3.6.2
      1  1.3.6.1    skrll /*	$NetBSD: ohci_sbus.c,v 1.3.6.2 2004/09/18 14:38:48 skrll Exp $	*/
      2      1.1      uch 
      3      1.1      uch /*-
      4      1.1      uch  * Copyright (c) 2001 The NetBSD Foundation, Inc.
      5      1.1      uch  * All rights reserved.
      6      1.1      uch  *
      7      1.1      uch  * This code is derived from software contributed to The NetBSD Foundation
      8      1.1      uch  * by UCHIYAMA Yasushi.
      9      1.1      uch  *
     10      1.1      uch  * Redistribution and use in source and binary forms, with or without
     11      1.1      uch  * modification, are permitted provided that the following conditions
     12      1.1      uch  * are met:
     13      1.1      uch  * 1. Redistributions of source code must retain the above copyright
     14      1.1      uch  *    notice, this list of conditions and the following disclaimer.
     15      1.1      uch  * 2. Redistributions in binary form must reproduce the above copyright
     16      1.1      uch  *    notice, this list of conditions and the following disclaimer in the
     17      1.1      uch  *    documentation and/or other materials provided with the distribution.
     18      1.1      uch  * 3. All advertising materials mentioning features or use of this software
     19      1.1      uch  *    must display the following acknowledgement:
     20      1.1      uch  *        This product includes software developed by the NetBSD
     21      1.1      uch  *        Foundation, Inc. and its contributors.
     22      1.1      uch  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23      1.1      uch  *    contributors may be used to endorse or promote products derived
     24      1.1      uch  *    from this software without specific prior written permission.
     25      1.1      uch  *
     26      1.1      uch  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27      1.1      uch  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28      1.1      uch  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29      1.1      uch  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30      1.1      uch  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31      1.1      uch  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32      1.1      uch  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33      1.1      uch  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34      1.1      uch  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35      1.1      uch  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36      1.1      uch  * POSSIBILITY OF SUCH DAMAGE.
     37      1.1      uch  */
     38      1.1      uch 
     39  1.3.6.1    skrll #include <sys/cdefs.h>
     40  1.3.6.1    skrll __KERNEL_RCSID(0, "$NetBSD: ohci_sbus.c,v 1.3.6.2 2004/09/18 14:38:48 skrll Exp $");
     41  1.3.6.1    skrll 
     42      1.1      uch #include <sys/param.h>
     43      1.1      uch 
     44      1.1      uch /* bus_dma */
     45      1.1      uch #include <sys/mbuf.h>
     46      1.1      uch #include <uvm/uvm_extern.h>
     47      1.1      uch 
     48      1.1      uch #define _PLAYSTATION2_BUS_DMA_PRIVATE
     49      1.1      uch #include <machine/bus.h>
     50      1.1      uch #include <machine/autoconf.h>
     51      1.1      uch 
     52      1.1      uch #include <dev/usb/usb.h>
     53      1.1      uch #include <dev/usb/usbdi.h>
     54      1.1      uch #include <dev/usb/usbdivar.h>
     55      1.1      uch 
     56      1.1      uch #include <dev/usb/ohcireg.h>
     57      1.1      uch #include <dev/usb/ohcivar.h>
     58      1.1      uch 
     59      1.1      uch #include <playstation2/ee/sifvar.h>	/* DMA staff */
     60      1.1      uch #include <playstation2/ee/dmacvar.h>
     61      1.1      uch #include <playstation2/dev/sbusvar.h>
     62      1.1      uch 
     63      1.1      uch #ifdef DEBUG
     64      1.1      uch #define STATIC
     65      1.1      uch #else
     66      1.1      uch #define STATIC static
     67      1.1      uch #endif
     68      1.1      uch 
     69      1.1      uch #define	SBUS_OHCI_REGBASE	MIPS_PHYS_TO_KSEG1(0x1f801600)
     70      1.1      uch #define SBUS_OHCI_REGSIZE	0x1000
     71      1.1      uch 
     72      1.1      uch STATIC int ohci_sbus_match(struct device *, struct cfdata *, void *);
     73      1.1      uch STATIC void ohci_sbus_attach(struct device *, struct device *, void *);
     74      1.1      uch 
     75      1.1      uch STATIC void _ohci_sbus_map_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
     76      1.1      uch     bus_size_t, int);
     77      1.1      uch STATIC int _ohci_sbus_mem_alloc(bus_dma_tag_t, bus_size_t, bus_size_t,
     78      1.1      uch     bus_size_t, bus_dma_segment_t *, int, int *, int);
     79      1.1      uch STATIC void _ohci_sbus_mem_free(bus_dma_tag_t, bus_dma_segment_t *, int);
     80      1.1      uch STATIC int _ohci_sbus_mem_map(bus_dma_tag_t, bus_dma_segment_t *, int, size_t,
     81      1.1      uch     caddr_t *, int);
     82      1.1      uch STATIC void _ohci_sbus_mem_unmap(bus_dma_tag_t, caddr_t, size_t);
     83      1.1      uch 
     84      1.1      uch struct playstation2_bus_dma_tag ohci_bus_dma_tag = {
     85      1.1      uch 	_bus_dmamap_create,
     86      1.1      uch 	_bus_dmamap_destroy,
     87      1.1      uch 	_bus_dmamap_load,
     88      1.1      uch 	_bus_dmamap_load_mbuf,
     89      1.1      uch 	_bus_dmamap_load_uio,
     90      1.1      uch 	_bus_dmamap_load_raw,
     91      1.1      uch 	_bus_dmamap_unload,
     92      1.1      uch 	_ohci_sbus_map_sync,
     93      1.1      uch 	_ohci_sbus_mem_alloc,
     94      1.1      uch 	_ohci_sbus_mem_free,
     95      1.1      uch 	_ohci_sbus_mem_map,
     96      1.1      uch 	_ohci_sbus_mem_unmap,
     97      1.1      uch 	_bus_dmamem_mmap,
     98      1.1      uch };
     99      1.1      uch 
    100      1.1      uch struct ohci_dma_segment {
    101      1.1      uch 	struct iopdma_segment ds_iopdma_seg;
    102      1.1      uch 
    103      1.1      uch 	LIST_ENTRY(ohci_dma_segment) ds_link;
    104      1.1      uch };
    105      1.1      uch 
    106      1.1      uch struct ohci_sbus_softc {
    107      1.1      uch 	struct ohci_softc sc;
    108      1.1      uch 
    109      1.1      uch 	LIST_HEAD(, ohci_dma_segment) sc_dmaseg_head;
    110      1.1      uch };
    111      1.1      uch 
    112      1.3  thorpej CFATTACH_DECL(ohci_sbus, sizeof(struct ohci_sbus_softc),
    113      1.3  thorpej     ohci_sbus_match, ohci_sbus_attach, NULL, NULL);
    114      1.1      uch 
    115      1.1      uch int
    116      1.1      uch ohci_sbus_match(struct device *parent, struct cfdata *cf, void *aux)
    117      1.1      uch {
    118      1.1      uch 
    119      1.1      uch 	return (1);
    120      1.1      uch }
    121      1.1      uch 
    122      1.1      uch void
    123      1.1      uch ohci_sbus_attach(struct device *parent, struct device *self, void *aux)
    124      1.1      uch {
    125      1.1      uch 	struct ohci_sbus_softc *sc = (void *)self;
    126      1.1      uch 	usbd_status result;
    127      1.1      uch 
    128      1.1      uch 	printf("\n");
    129      1.1      uch 
    130      1.1      uch 	sc->sc.iot = bus_space_create(0, "OHCI I/O space", SBUS_OHCI_REGBASE,
    131      1.1      uch 	    SBUS_OHCI_REGSIZE);
    132      1.1      uch 	sc->sc.ioh = SBUS_OHCI_REGBASE;
    133      1.1      uch 
    134      1.1      uch 	ohci_bus_dma_tag._dmachip_cookie = sc;
    135      1.1      uch 	sc->sc.sc_bus.dmatag = &ohci_bus_dma_tag;
    136      1.1      uch 
    137      1.1      uch 	/* Disable interrupts, so we don't can any spurious ones. */
    138      1.1      uch 	bus_space_write_4(sc->sc.iot, sc->sc.ioh, OHCI_INTERRUPT_DISABLE,
    139      1.1      uch 	    OHCI_ALL_INTRS);
    140      1.1      uch 
    141      1.1      uch 	sbus_intr_establish(SBUS_IRQ_USB, ohci_intr, sc);
    142      1.1      uch 
    143      1.1      uch 	/* IOP/EE DMA relay segment list */
    144      1.1      uch 	LIST_INIT(&sc->sc_dmaseg_head);
    145      1.1      uch 
    146      1.1      uch 	result = ohci_init(&sc->sc);
    147      1.1      uch 
    148      1.1      uch 	if (result != USBD_NORMAL_COMPLETION) {
    149      1.1      uch 		printf(": init failed. error=%d\n", result);
    150      1.1      uch 		return;
    151      1.1      uch 	}
    152      1.1      uch 
    153      1.1      uch 	/* Attach usb device. */
    154      1.1      uch 	sc->sc.sc_child = config_found((void *)sc, &sc->sc.sc_bus,
    155      1.1      uch 	    usbctlprint);
    156      1.1      uch }
    157      1.1      uch 
    158      1.1      uch void
    159      1.1      uch _ohci_sbus_map_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
    160      1.1      uch     bus_size_t len, int ops)
    161      1.1      uch {
    162      1.1      uch 
    163      1.1      uch 	dmac_sync_buffer(); /* XXX over flush */
    164      1.1      uch }
    165      1.1      uch 
    166      1.1      uch int
    167      1.1      uch _ohci_sbus_mem_alloc(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment,
    168      1.1      uch     bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs,
    169      1.1      uch     int flags)
    170      1.1      uch {
    171      1.1      uch 	struct ohci_sbus_softc *sc = t->_dmachip_cookie;
    172      1.1      uch 	struct ohci_dma_segment *ds;
    173      1.1      uch 	struct iopdma_segment *iopdma_seg;
    174      1.1      uch 	int error;
    175      1.1      uch 
    176      1.1      uch 	KDASSERT(sc);
    177      1.1      uch 	ds = malloc(sizeof(struct ohci_dma_segment), M_DEVBUF, M_NOWAIT);
    178      1.1      uch 	if (ds == NULL)
    179      1.1      uch 		return (1);
    180      1.1      uch 	/*
    181      1.1      uch 	 * Allocate DMA Area (IOP DMA Area <-> SIF DMA <-> EE DMA Area)
    182      1.1      uch 	 */
    183      1.1      uch 	iopdma_seg = &ds->ds_iopdma_seg;
    184      1.1      uch 	error = iopdma_allocate_buffer(iopdma_seg, size);
    185      1.1      uch 
    186      1.1      uch 	if (error) {
    187      1.1      uch 		free(ds, M_DEVBUF);
    188      1.1      uch 		return (1);
    189      1.1      uch 	}
    190      1.1      uch 
    191      1.1      uch 	segs[0].ds_len	  = iopdma_seg->size;
    192      1.1      uch 	segs[0].ds_addr	  = iopdma_seg->iop_paddr;
    193      1.1      uch 	segs[0]._ds_vaddr = iopdma_seg->ee_vaddr;
    194      1.1      uch 
    195      1.1      uch 	LIST_INSERT_HEAD(&sc->sc_dmaseg_head, ds, ds_link);
    196      1.1      uch 
    197      1.1      uch 	*rsegs = 1;
    198      1.1      uch 
    199      1.1      uch 	return (0);
    200      1.1      uch }
    201      1.1      uch 
    202      1.1      uch void
    203      1.1      uch _ohci_sbus_mem_free(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs)
    204      1.1      uch {
    205      1.1      uch 	struct ohci_sbus_softc *sc = t->_dmachip_cookie;
    206      1.1      uch 	struct ohci_dma_segment *ds;
    207      1.1      uch 	paddr_t addr = segs[0].ds_addr;
    208      1.1      uch 
    209      1.1      uch 	for (ds = LIST_FIRST(&sc->sc_dmaseg_head); ds != NULL;
    210      1.1      uch 	    ds = LIST_NEXT(ds, ds_link)) {
    211      1.1      uch 		if (ds->ds_iopdma_seg.iop_paddr == addr) {
    212      1.1      uch 			iopdma_free_buffer(&ds->ds_iopdma_seg);
    213      1.1      uch 
    214      1.1      uch 			LIST_REMOVE(ds, ds_link);
    215      1.1      uch 			free(ds, M_DEVBUF);
    216      1.1      uch 			return;
    217      1.1      uch 		}
    218      1.1      uch 	}
    219      1.1      uch 
    220      1.1      uch 	panic("_dmamem_free: can't find corresponding handle.");
    221      1.1      uch 	/* NOTREACHED */
    222      1.1      uch }
    223      1.1      uch 
    224      1.1      uch int
    225      1.1      uch _ohci_sbus_mem_map(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs, size_t size,
    226      1.1      uch     caddr_t *kvap, int flags)
    227      1.1      uch {
    228      1.1      uch 	struct ohci_sbus_softc *sc = t->_dmachip_cookie;
    229      1.1      uch 	struct ohci_dma_segment *ds;
    230      1.1      uch 	paddr_t addr = segs[0].ds_addr;
    231      1.1      uch 
    232      1.1      uch 	for (ds = LIST_FIRST(&sc->sc_dmaseg_head); ds != NULL;
    233      1.1      uch 	    ds = LIST_NEXT(ds, ds_link)) {
    234      1.1      uch 		if (ds->ds_iopdma_seg.iop_paddr == addr) {
    235      1.1      uch 
    236      1.1      uch 			*kvap = (caddr_t)ds->ds_iopdma_seg.ee_vaddr;
    237      1.1      uch 
    238      1.1      uch 			return (0);
    239      1.1      uch 		}
    240      1.1      uch 	}
    241      1.1      uch 
    242      1.1      uch 	return (1);
    243      1.1      uch }
    244      1.1      uch 
    245      1.1      uch void
    246      1.1      uch _ohci_sbus_mem_unmap(bus_dma_tag_t t, caddr_t kva, size_t size)
    247      1.1      uch {
    248      1.1      uch 	/* nothing to do */
    249      1.1      uch }
    250