1 1.20 riastrad /* $NetBSD: sbus.c,v 1.20 2022/02/11 17:30:48 riastradh Exp $ */ 2 1.1 uch 3 1.1 uch /*- 4 1.1 uch * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 1.1 uch * All rights reserved. 6 1.1 uch * 7 1.1 uch * This code is derived from software contributed to The NetBSD Foundation 8 1.1 uch * by UCHIYAMA Yasushi. 9 1.1 uch * 10 1.1 uch * Redistribution and use in source and binary forms, with or without 11 1.1 uch * modification, are permitted provided that the following conditions 12 1.1 uch * are met: 13 1.1 uch * 1. Redistributions of source code must retain the above copyright 14 1.1 uch * notice, this list of conditions and the following disclaimer. 15 1.1 uch * 2. Redistributions in binary form must reproduce the above copyright 16 1.1 uch * notice, this list of conditions and the following disclaimer in the 17 1.1 uch * documentation and/or other materials provided with the distribution. 18 1.1 uch * 19 1.1 uch * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 1.1 uch * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.1 uch * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.1 uch * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 1.1 uch * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.1 uch * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.1 uch * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.1 uch * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.1 uch * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.1 uch * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.1 uch * POSSIBILITY OF SUCH DAMAGE. 30 1.1 uch */ 31 1.1 uch 32 1.1 uch /* 33 1.1 uch * PlayStation 2 internal PCMCIA/USB interface unit. 34 1.1 uch */ 35 1.6 lukem 36 1.6 lukem #include <sys/cdefs.h> 37 1.20 riastrad __KERNEL_RCSID(0, "$NetBSD: sbus.c,v 1.20 2022/02/11 17:30:48 riastradh Exp $"); 38 1.1 uch 39 1.16 maya #include <sys/param.h> 40 1.14 maya #include <sys/device.h> 41 1.1 uch #include <sys/systm.h> 42 1.1 uch 43 1.1 uch #include <machine/bootinfo.h> 44 1.1 uch #include <machine/autoconf.h> 45 1.1 uch 46 1.1 uch #include <playstation2/playstation2/interrupt.h> 47 1.1 uch 48 1.1 uch #include <playstation2/ee/eevar.h> 49 1.1 uch #include <playstation2/ee/intcvar.h> 50 1.1 uch #include <playstation2/dev/sbusvar.h> 51 1.1 uch #include <playstation2/dev/sbusreg.h> 52 1.1 uch 53 1.1 uch #ifdef DEBUG 54 1.1 uch #define STATIC 55 1.1 uch #else 56 1.1 uch #define STATIC static 57 1.1 uch #endif 58 1.1 uch 59 1.1 uch STATIC void sbus_type2_pcmcia_intr_clear(void); 60 1.1 uch STATIC void sbus_type2_pcmcia_intr_enable(void); 61 1.1 uch STATIC void sbus_type2_pcmcia_intr_disable(void); 62 1.1 uch STATIC void sbus_type2_pcmcia_intr_reinstall(void); 63 1.1 uch STATIC void sbus_type3_pcmcia_intr_clear(void); 64 1.1 uch STATIC void sbus_type3_pcmcia_intr_enable(void); 65 1.1 uch STATIC void sbus_type3_pcmcia_intr_disable(void); 66 1.1 uch STATIC void sbus_type3_pcmcia_intr_reinstall(void); 67 1.1 uch STATIC int sbus_spurious_intr(void *); 68 1.1 uch 69 1.1 uch STATIC void (*sbus_pcmcia_intr_clear)(void); 70 1.1 uch STATIC void (*sbus_pcmcia_intr_enable)(void); 71 1.1 uch STATIC void (*sbus_pcmcia_intr_disable)(void); 72 1.1 uch STATIC void (*sbus_pcmcia_intr_reinstall)(void); 73 1.1 uch 74 1.1 uch STATIC int (*sbus_pcmcia_intr)(void *) = sbus_spurious_intr; 75 1.1 uch STATIC void *sbus_pcmcia_context; 76 1.1 uch STATIC int (*sbus_usb_intr)(void *) = sbus_spurious_intr; 77 1.1 uch STATIC void *sbus_usb_context; 78 1.1 uch 79 1.1 uch STATIC void sbus_init(int); 80 1.1 uch STATIC int sbus_intr(void *); 81 1.1 uch 82 1.17 maya STATIC int sbus_match(device_t, cfdata_t, void *); 83 1.17 maya STATIC void sbus_attach(device_t, device_t, void *); 84 1.17 maya STATIC int sbus_search(device_t, cfdata_t, 85 1.8 drochner const int *, void *); 86 1.1 uch STATIC int sbus_print(void *, const char *); 87 1.1 uch 88 1.20 riastrad CFATTACH_DECL_NEW(sbus, 0, 89 1.5 thorpej sbus_match, sbus_attach, NULL, NULL); 90 1.1 uch 91 1.1 uch extern struct cfdriver sbus_cd; 92 1.1 uch STATIC int __sbus_attached; 93 1.1 uch 94 1.1 uch int 95 1.17 maya sbus_match(device_t parent, cfdata_t cf, void *aux) 96 1.1 uch { 97 1.1 uch struct mainbus_attach_args *ma = aux; 98 1.1 uch 99 1.1 uch if (strcmp(ma->ma_name, sbus_cd.cd_name) != 0) 100 1.1 uch return (0); 101 1.1 uch 102 1.1 uch return (!__sbus_attached); 103 1.1 uch } 104 1.1 uch 105 1.1 uch void 106 1.17 maya sbus_attach(device_t parent, device_t self, void *aux) 107 1.1 uch { 108 1.1 uch int type = BOOTINFO_REF(BOOTINFO_PCMCIA_TYPE); 109 1.1 uch 110 1.1 uch printf(": controller type %d\n", type); 111 1.1 uch 112 1.1 uch /* Initialize SBUS controller */ 113 1.1 uch sbus_init(type); 114 1.1 uch 115 1.18 thorpej config_search(self, NULL, 116 1.19 thorpej CFARGS(.search = sbus_search)); 117 1.1 uch } 118 1.1 uch 119 1.1 uch int 120 1.17 maya sbus_search(device_t parent, cfdata_t cf, 121 1.8 drochner const int *ldesc, void *aux) 122 1.1 uch { 123 1.1 uch struct sbus_attach_args sa; 124 1.1 uch 125 1.18 thorpej if (config_probe(parent, cf, &sa)) 126 1.19 thorpej config_attach(parent, cf, &sa, sbus_print, CFARGS_NONE); 127 1.1 uch 128 1.1 uch return (0); 129 1.1 uch } 130 1.1 uch 131 1.1 uch int 132 1.1 uch sbus_print(void *aux, const char *pnp) 133 1.1 uch { 134 1.1 uch 135 1.1 uch return (pnp ? QUIET : UNCONF); 136 1.1 uch } 137 1.1 uch 138 1.1 uch void 139 1.1 uch sbus_init(int type) 140 1.1 uch { 141 1.1 uch /* install model dependent hook */ 142 1.1 uch #define SET_PCMCIA_INTR_OPS(x) \ 143 1.1 uch sbus_pcmcia_intr_clear = sbus_type##x##_pcmcia_intr_clear; \ 144 1.1 uch sbus_pcmcia_intr_enable = sbus_type##x##_pcmcia_intr_enable; \ 145 1.1 uch sbus_pcmcia_intr_disable = sbus_type##x##_pcmcia_intr_disable; \ 146 1.1 uch sbus_pcmcia_intr_reinstall = sbus_type##x##_pcmcia_intr_reinstall 147 1.1 uch 148 1.1 uch switch (type) { 149 1.1 uch default: 150 1.1 uch panic("unknown pcmcia controller type = %d", type); 151 1.1 uch break; 152 1.1 uch case 0: 153 1.1 uch /* FALLTHROUGH */ 154 1.1 uch case 1: 155 1.1 uch /* FALLTHROUGH */ 156 1.1 uch case 2: 157 1.1 uch SET_PCMCIA_INTR_OPS(2); 158 1.1 uch break; 159 1.1 uch case 3: 160 1.1 uch SET_PCMCIA_INTR_OPS(3); 161 1.1 uch break; 162 1.1 uch } 163 1.1 uch #undef SET_PCMCIA_INTR_OPS 164 1.1 uch /* disable interrupt */ 165 1.1 uch (*sbus_pcmcia_intr_disable)(); 166 1.1 uch 167 1.1 uch /* clear interrupt */ 168 1.1 uch (*sbus_pcmcia_intr_clear)(); 169 1.1 uch _reg_write_4(SBUS_SMFLG_REG, SMFLG_PCMCIA_INT); 170 1.1 uch _reg_write_4(SBUS_SMFLG_REG, SMFLG_USB_INT); 171 1.1 uch 172 1.1 uch /* connect to INTC */ 173 1.1 uch intc_intr_establish(I_CH1_SBUS, IPL_BIO, sbus_intr, 0); 174 1.1 uch } 175 1.1 uch 176 1.1 uch void * 177 1.1 uch sbus_intr_establish(enum sbus_irq irq, int (*ih_func)(void *), void *ih_arg) 178 1.1 uch { 179 1.1 uch switch (irq) { 180 1.1 uch default: 181 1.3 provos panic("unknown IRQ"); 182 1.1 uch break; 183 1.1 uch case SBUS_IRQ_PCMCIA: 184 1.1 uch sbus_pcmcia_intr = ih_func; 185 1.1 uch sbus_pcmcia_context = ih_arg; 186 1.1 uch (*sbus_pcmcia_intr_enable)(); 187 1.1 uch break; 188 1.1 uch case SBUS_IRQ_USB: 189 1.1 uch sbus_usb_intr = ih_func; 190 1.1 uch sbus_usb_context = ih_arg; 191 1.1 uch break; 192 1.1 uch } 193 1.1 uch 194 1.1 uch return (void *)irq; 195 1.1 uch } 196 1.1 uch 197 1.1 uch void 198 1.1 uch sbus_intr_disestablish(void *handle) 199 1.1 uch { 200 1.1 uch int irq = (int)handle; 201 1.1 uch 202 1.1 uch switch (irq) { 203 1.1 uch default: 204 1.3 provos panic("unknown IRQ"); 205 1.1 uch break; 206 1.1 uch case SBUS_IRQ_PCMCIA: 207 1.1 uch sbus_pcmcia_intr = sbus_spurious_intr; 208 1.1 uch (*sbus_pcmcia_intr_disable)(); 209 1.1 uch break; 210 1.1 uch case SBUS_IRQ_USB: 211 1.1 uch sbus_usb_intr = sbus_spurious_intr; 212 1.1 uch break; 213 1.1 uch } 214 1.1 uch } 215 1.1 uch 216 1.1 uch int 217 1.1 uch sbus_intr(void *arg) 218 1.1 uch { 219 1.1 uch u_int32_t stat; 220 1.1 uch 221 1.1 uch _playstation2_evcnt.sbus.ev_count++; 222 1.1 uch stat = _reg_read_4(SBUS_SMFLG_REG); 223 1.1 uch 224 1.1 uch if (stat & SMFLG_PCMCIA_INT) { 225 1.1 uch (*sbus_pcmcia_intr_clear)(); 226 1.1 uch _reg_write_4(SBUS_SMFLG_REG, SMFLG_PCMCIA_INT); 227 1.1 uch (*sbus_pcmcia_intr)(sbus_pcmcia_context); 228 1.1 uch } 229 1.1 uch 230 1.1 uch if (stat & SMFLG_USB_INT) { 231 1.1 uch _reg_write_4(SBUS_SMFLG_REG, SMFLG_USB_INT); 232 1.1 uch (*sbus_usb_intr)(sbus_usb_context); 233 1.1 uch } 234 1.1 uch 235 1.1 uch (*sbus_pcmcia_intr_reinstall)(); 236 1.1 uch 237 1.1 uch return (1); 238 1.1 uch } 239 1.1 uch 240 1.1 uch int 241 1.1 uch sbus_spurious_intr(void *arg) 242 1.1 uch { 243 1.1 uch 244 1.1 uch printf("spurious interrupt.\n"); 245 1.1 uch 246 1.1 uch return (1); 247 1.1 uch } 248 1.1 uch 249 1.1 uch /* SCPH-18000 */ 250 1.1 uch void 251 1.15 maya sbus_type2_pcmcia_intr_clear(void) 252 1.1 uch { 253 1.1 uch 254 1.1 uch if (_reg_read_2(SBUS_PCMCIA_CSC1_REG16) & 0x080) 255 1.1 uch _reg_write_2(SBUS_PCMCIA_CSC1_REG16, 0xffff); 256 1.1 uch } 257 1.1 uch 258 1.1 uch void 259 1.15 maya sbus_type2_pcmcia_intr_enable(void) 260 1.1 uch { 261 1.1 uch 262 1.1 uch _reg_write_2(SBUS_PCMCIA_TIMR_REG16, 0); 263 1.1 uch } 264 1.1 uch 265 1.1 uch void 266 1.15 maya sbus_type2_pcmcia_intr_disable(void) 267 1.1 uch { 268 1.1 uch 269 1.1 uch _reg_write_2(SBUS_PCMCIA_TIMR_REG16, 1); 270 1.1 uch } 271 1.1 uch 272 1.1 uch void 273 1.15 maya sbus_type2_pcmcia_intr_reinstall(void) 274 1.1 uch { 275 1.1 uch u_int16_t r = _reg_read_2(SBUS_PCMCIA_TIMR_REG16); 276 1.1 uch 277 1.1 uch _reg_write_2(SBUS_PCMCIA_TIMR_REG16, 1); 278 1.1 uch _reg_write_2(SBUS_PCMCIA_TIMR_REG16, r); 279 1.1 uch } 280 1.1 uch 281 1.1 uch /* SCPH-30000/35000 */ 282 1.1 uch void 283 1.15 maya sbus_type3_pcmcia_intr_clear(void) 284 1.1 uch { 285 1.1 uch /* nothing */ 286 1.1 uch } 287 1.1 uch 288 1.1 uch void 289 1.15 maya sbus_type3_pcmcia_intr_enable(void) 290 1.1 uch { 291 1.1 uch 292 1.1 uch _reg_write_2(SBUS_PCMCIA3_TIMR_REG16, 0); 293 1.1 uch } 294 1.1 uch 295 1.1 uch void 296 1.15 maya sbus_type3_pcmcia_intr_disable(void) 297 1.1 uch { 298 1.1 uch 299 1.1 uch _reg_write_2(SBUS_PCMCIA3_TIMR_REG16, 1); 300 1.1 uch } 301 1.1 uch 302 1.1 uch void 303 1.15 maya sbus_type3_pcmcia_intr_reinstall(void) 304 1.1 uch { 305 1.1 uch u_int16_t r = _reg_read_2(SBUS_PCMCIA3_TIMR_REG16); 306 1.1 uch 307 1.1 uch _reg_write_2(SBUS_PCMCIA3_TIMR_REG16, 1); 308 1.1 uch _reg_write_2(SBUS_PCMCIA3_TIMR_REG16, r); 309 1.1 uch } 310