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wdc_spd.c revision 1.1
      1  1.1  uch /*	$NetBSD: wdc_spd.c,v 1.1 2001/10/16 15:38:35 uch Exp $	*/
      2  1.1  uch 
      3  1.1  uch /*-
      4  1.1  uch  * Copyright (c) 2001 The NetBSD Foundation, Inc.
      5  1.1  uch  * All rights reserved.
      6  1.1  uch  *
      7  1.1  uch  * This code is derived from software contributed to The NetBSD Foundation
      8  1.1  uch  * by UCHIYAMA Yasushi.
      9  1.1  uch  *
     10  1.1  uch  * Redistribution and use in source and binary forms, with or without
     11  1.1  uch  * modification, are permitted provided that the following conditions
     12  1.1  uch  * are met:
     13  1.1  uch  * 1. Redistributions of source code must retain the above copyright
     14  1.1  uch  *    notice, this list of conditions and the following disclaimer.
     15  1.1  uch  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.1  uch  *    notice, this list of conditions and the following disclaimer in the
     17  1.1  uch  *    documentation and/or other materials provided with the distribution.
     18  1.1  uch  * 3. All advertising materials mentioning features or use of this software
     19  1.1  uch  *    must display the following acknowledgement:
     20  1.1  uch  *        This product includes software developed by the NetBSD
     21  1.1  uch  *        Foundation, Inc. and its contributors.
     22  1.1  uch  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  1.1  uch  *    contributors may be used to endorse or promote products derived
     24  1.1  uch  *    from this software without specific prior written permission.
     25  1.1  uch  *
     26  1.1  uch  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  1.1  uch  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  1.1  uch  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  1.1  uch  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  1.1  uch  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  1.1  uch  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  1.1  uch  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  1.1  uch  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  1.1  uch  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  1.1  uch  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  1.1  uch  * POSSIBILITY OF SUCH DAMAGE.
     37  1.1  uch  */
     38  1.1  uch 
     39  1.1  uch #include <sys/param.h>
     40  1.1  uch #include <sys/systm.h>
     41  1.1  uch #include <sys/malloc.h>
     42  1.1  uch 
     43  1.1  uch #define __read_1(a)							\
     44  1.1  uch ({									\
     45  1.1  uch 	u_int32_t a_ = (a);						\
     46  1.1  uch 	u_int8_t r = (*(__volatile__ u_int8_t *)a_);			\
     47  1.1  uch 									\
     48  1.1  uch 	if (a_ == 0xb400004e)	/* (wdc)STAT  LED off */		\
     49  1.1  uch 		SPD_LED_OFF();						\
     50  1.1  uch 									\
     51  1.1  uch 	(r);								\
     52  1.1  uch })
     53  1.1  uch #define __write_1(a, v)							\
     54  1.1  uch {									\
     55  1.1  uch 	u_int32_t a_ = (a);						\
     56  1.1  uch 	(*(__volatile__ u_int8_t *)a_) = (v);				\
     57  1.1  uch 									\
     58  1.1  uch 	if (a_ == 0xb400004e)	/* (wdc)CMD  LED on */			\
     59  1.1  uch 		SPD_LED_ON();						\
     60  1.1  uch }
     61  1.1  uch #define _PLAYSTATION2_BUS_SPACE_PRIVATE
     62  1.1  uch #include <machine/bus.h>
     63  1.1  uch 
     64  1.1  uch #include <dev/ata/atavar.h>
     65  1.1  uch #include <dev/ic/wdcvar.h>
     66  1.1  uch 
     67  1.1  uch #include <playstation2/ee/eevar.h>
     68  1.1  uch #include <playstation2/dev/spdvar.h>
     69  1.1  uch #include <playstation2/dev/spdreg.h>
     70  1.1  uch 
     71  1.1  uch #define	WDC_SPD_HDD_AUXREG_OFFSET		0x1c
     72  1.1  uch 
     73  1.1  uch struct wdc_spd_softc {
     74  1.1  uch 	struct wdc_softc sc_wdcdev;
     75  1.1  uch 	struct channel_softc *wdc_chanptr;
     76  1.1  uch 	struct channel_softc wdc_channel;
     77  1.1  uch 	void *sc_ih;
     78  1.1  uch };
     79  1.1  uch 
     80  1.1  uch #ifdef DEBUG
     81  1.1  uch #define STATIC
     82  1.1  uch #else
     83  1.1  uch #define STATIC static
     84  1.1  uch #endif
     85  1.1  uch 
     86  1.1  uch STATIC int wdc_spd_match(struct device *, struct cfdata *, void *);
     87  1.1  uch STATIC void wdc_spd_attach(struct device *, struct device *, void *);
     88  1.1  uch 
     89  1.1  uch struct cfattach wdc_spd_ca = {
     90  1.1  uch 	sizeof (struct wdc_spd_softc), wdc_spd_match, wdc_spd_attach
     91  1.1  uch };
     92  1.1  uch 
     93  1.1  uch extern struct cfdriver wdc_cd;
     94  1.1  uch 
     95  1.1  uch STATIC void __wdc_spd_enable(void);
     96  1.1  uch STATIC void __wdc_spd_disable(void) __attribute__((__unused__));
     97  1.1  uch STATIC void __wdc_spd_bus_space(struct channel_softc *);
     98  1.1  uch 
     99  1.1  uch /*
    100  1.1  uch  * wdc register is 16 bit wide.
    101  1.1  uch  */
    102  1.1  uch #define VADDR(h, o)	((h) + ((o) << 1))
    103  1.1  uch _BUS_SPACE_READ(_wdc_spd, 1, 8)
    104  1.1  uch _BUS_SPACE_READ(_wdc_spd, 2, 16)
    105  1.1  uch _BUS_SPACE_READ_MULTI(_wdc_spd, 1, 8)
    106  1.1  uch _BUS_SPACE_READ_MULTI(_wdc_spd, 2, 16)
    107  1.1  uch _BUS_SPACE_READ_REGION(_wdc_spd, 1, 8)
    108  1.1  uch _BUS_SPACE_READ_REGION(_wdc_spd, 2, 16)
    109  1.1  uch _BUS_SPACE_WRITE(_wdc_spd, 1, 8)
    110  1.1  uch _BUS_SPACE_WRITE(_wdc_spd, 2, 16)
    111  1.1  uch _BUS_SPACE_WRITE_MULTI(_wdc_spd, 1, 8)
    112  1.1  uch _BUS_SPACE_WRITE_MULTI(_wdc_spd, 2, 16)
    113  1.1  uch _BUS_SPACE_WRITE_REGION(_wdc_spd, 1, 8)
    114  1.1  uch _BUS_SPACE_WRITE_REGION(_wdc_spd, 2, 16)
    115  1.1  uch _BUS_SPACE_SET_MULTI(_wdc_spd, 1, 8)
    116  1.1  uch _BUS_SPACE_SET_MULTI(_wdc_spd, 2, 16)
    117  1.1  uch _BUS_SPACE_SET_REGION(_wdc_spd, 1, 8)
    118  1.1  uch _BUS_SPACE_SET_REGION(_wdc_spd, 2, 16)
    119  1.1  uch _BUS_SPACE_COPY_REGION(_wdc_spd, 1, 8)
    120  1.1  uch _BUS_SPACE_COPY_REGION(_wdc_spd, 2, 16)
    121  1.1  uch #undef VADDR
    122  1.1  uch 
    123  1.1  uch STATIC const struct playstation2_bus_space _wdc_spd_space = {
    124  1.1  uch 	pbs_map		: _BUS_SPACE_NO_MAP,
    125  1.1  uch 	pbs_unmap	: _BUS_SPACE_NO_UNMAP,
    126  1.1  uch 	pbs_subregion	: _BUS_SPACE_NO_SUBREGION,
    127  1.1  uch 	pbs_alloc	: _BUS_SPACE_NO_ALLOC,
    128  1.1  uch 	pbs_free	: _BUS_SPACE_NO_FREE,
    129  1.1  uch 	pbs_vaddr	: _BUS_SPACE_NO_VADDR,
    130  1.1  uch 	pbs_r_1		: _wdc_spd_read_1,
    131  1.1  uch 	pbs_r_2		: _wdc_spd_read_2,
    132  1.1  uch 	pbs_r_4		: _BUS_SPACE_NO_READ(4, 32),
    133  1.1  uch 	pbs_r_8		: _BUS_SPACE_NO_READ(8, 64),
    134  1.1  uch 	pbs_rm_1	: _wdc_spd_read_multi_1,
    135  1.1  uch 	pbs_rm_2	: _wdc_spd_read_multi_2,
    136  1.1  uch 	pbs_rm_4	: _BUS_SPACE_NO_READ_MULTI(4, 32),
    137  1.1  uch 	pbs_rm_8	: _BUS_SPACE_NO_READ_MULTI(8, 64),
    138  1.1  uch 	pbs_rr_1	: _wdc_spd_read_region_1,
    139  1.1  uch 	pbs_rr_2	: _wdc_spd_read_region_2,
    140  1.1  uch 	pbs_rr_4	: _BUS_SPACE_NO_READ_REGION(4, 32),
    141  1.1  uch 	pbs_rr_8	: _BUS_SPACE_NO_READ_REGION(8, 64),
    142  1.1  uch 	pbs_w_1		: _wdc_spd_write_1,
    143  1.1  uch 	pbs_w_2		: _wdc_spd_write_2,
    144  1.1  uch 	pbs_w_4		: _BUS_SPACE_NO_WRITE(4, 32),
    145  1.1  uch 	pbs_w_8		: _BUS_SPACE_NO_WRITE(8, 64),
    146  1.1  uch 	pbs_wm_1	: _wdc_spd_write_multi_1,
    147  1.1  uch 	pbs_wm_2	: _wdc_spd_write_multi_2,
    148  1.1  uch 	pbs_wm_4	: _BUS_SPACE_NO_WRITE_MULTI(4, 32),
    149  1.1  uch 	pbs_wm_8	: _BUS_SPACE_NO_WRITE_MULTI(8, 64),
    150  1.1  uch 	pbs_wr_1	: _wdc_spd_write_region_1,
    151  1.1  uch 	pbs_wr_2	: _wdc_spd_write_region_2,
    152  1.1  uch 	pbs_wr_4	: _BUS_SPACE_NO_WRITE_REGION(4, 32),
    153  1.1  uch 	pbs_wr_8	: _BUS_SPACE_NO_WRITE_REGION(8, 64),
    154  1.1  uch 	pbs_sm_1	: _wdc_spd_set_multi_1,
    155  1.1  uch 	pbs_sm_2	: _wdc_spd_set_multi_2,
    156  1.1  uch 	pbs_sm_4	: _BUS_SPACE_NO_SET_MULTI(4, 32),
    157  1.1  uch 	pbs_sm_8	: _BUS_SPACE_NO_SET_MULTI(8, 64),
    158  1.1  uch 	pbs_sr_1	: _wdc_spd_set_region_1,
    159  1.1  uch 	pbs_sr_2	: _wdc_spd_set_region_2,
    160  1.1  uch 	pbs_sr_4	: _BUS_SPACE_NO_SET_REGION(4, 32),
    161  1.1  uch 	pbs_sr_8	: _BUS_SPACE_NO_SET_REGION(8, 64),
    162  1.1  uch 	pbs_c_1		: _wdc_spd_copy_region_1,
    163  1.1  uch 	pbs_c_2		: _wdc_spd_copy_region_2,
    164  1.1  uch 	pbs_c_4		: _BUS_SPACE_NO_COPY_REGION(4, 32),
    165  1.1  uch 	pbs_c_8		: _BUS_SPACE_NO_COPY_REGION(8, 64),
    166  1.1  uch };
    167  1.1  uch 
    168  1.1  uch int
    169  1.1  uch wdc_spd_match(struct device *parent, struct cfdata *cf, void *aux)
    170  1.1  uch {
    171  1.1  uch 	struct spd_attach_args *spa = aux;
    172  1.1  uch 	struct channel_softc ch;
    173  1.1  uch 	int i, result;
    174  1.1  uch 
    175  1.1  uch 	if (spa->spa_slot != SPD_HDD)
    176  1.1  uch 		return (0);
    177  1.1  uch 
    178  1.1  uch 	memset(&ch, 0, sizeof(ch));
    179  1.1  uch 	__wdc_spd_bus_space(&ch);
    180  1.1  uch 
    181  1.1  uch 	for (i = 0, result = 0; i < 8; i++) { /* 8 sec */
    182  1.1  uch 		if (result == 0)
    183  1.1  uch 			result = wdcprobe(&ch);
    184  1.1  uch 		delay(1000000);
    185  1.1  uch 	}
    186  1.1  uch 
    187  1.1  uch 	return (result);
    188  1.1  uch }
    189  1.1  uch 
    190  1.1  uch void
    191  1.1  uch wdc_spd_attach(struct device *parent, struct device *self, void *aux)
    192  1.1  uch {
    193  1.1  uch 	struct spd_attach_args *spa = aux;
    194  1.1  uch 	struct wdc_spd_softc *sc = (void *)self;
    195  1.1  uch 	struct wdc_softc *wdc = &sc->sc_wdcdev;
    196  1.1  uch 	struct channel_softc *ch = &sc->wdc_channel;
    197  1.1  uch 
    198  1.1  uch 	printf(": %s\n", spa->spa_product_name);
    199  1.1  uch 
    200  1.1  uch 	__wdc_spd_bus_space(ch);
    201  1.1  uch 
    202  1.1  uch 	wdc->cap =
    203  1.1  uch 	    WDC_CAPABILITY_DMA | WDC_CAPABILITY_UDMA | WDC_CAPABILITY_DATA16;
    204  1.1  uch 	wdc->PIO_cap = 0;
    205  1.1  uch 	sc->wdc_chanptr = &sc->wdc_channel;
    206  1.1  uch 	wdc->channels = &sc->wdc_chanptr;
    207  1.1  uch 	wdc->nchannels = 1;
    208  1.1  uch 	ch->channel = 0;
    209  1.1  uch 	ch->wdc = &sc->sc_wdcdev;
    210  1.1  uch 	ch->ch_queue = malloc(sizeof(struct channel_queue), M_DEVBUF,
    211  1.1  uch 	    M_NOWAIT);
    212  1.1  uch 
    213  1.1  uch 	if (ch->ch_queue == NULL) {
    214  1.1  uch 		printf("%s: can't allocate memory for command queue",
    215  1.1  uch 		    wdc->sc_dev.dv_xname);
    216  1.1  uch 		return;
    217  1.1  uch 	}
    218  1.1  uch 
    219  1.1  uch 	spd_intr_establish(SPD_HDD, wdcintr, &sc->wdc_channel);
    220  1.1  uch 
    221  1.1  uch 	__wdc_spd_enable();
    222  1.1  uch 
    223  1.1  uch 	wdcattach(&sc->wdc_channel);
    224  1.1  uch }
    225  1.1  uch 
    226  1.1  uch void
    227  1.1  uch __wdc_spd_bus_space(struct channel_softc *ch)
    228  1.1  uch {
    229  1.1  uch 
    230  1.1  uch 	ch->cmd_iot = &_wdc_spd_space;
    231  1.1  uch 	ch->cmd_ioh = SPD_HDD_IO_BASE;
    232  1.1  uch 	ch->ctl_iot = &_wdc_spd_space;
    233  1.1  uch 	ch->ctl_ioh = SPD_HDD_IO_BASE + WDC_SPD_HDD_AUXREG_OFFSET;
    234  1.1  uch 	ch->data32iot = ch->cmd_iot;
    235  1.1  uch 	ch->data32ioh = ch->cmd_ioh;
    236  1.1  uch }
    237  1.1  uch 
    238  1.1  uch void
    239  1.1  uch __wdc_spd_enable()
    240  1.1  uch {
    241  1.1  uch 	u_int16_t r;
    242  1.1  uch 
    243  1.1  uch 	r = _reg_read_2(SPD_INTR_ENABLE_REG16);
    244  1.1  uch 	r |= SPD_INTR_HDD;
    245  1.1  uch 	_reg_write_2(SPD_INTR_ENABLE_REG16, r);
    246  1.1  uch }
    247  1.1  uch 
    248  1.1  uch void
    249  1.1  uch __wdc_spd_disable()
    250  1.1  uch {
    251  1.1  uch 	u_int16_t r;
    252  1.1  uch 
    253  1.1  uch 	r = _reg_read_2(SPD_INTR_ENABLE_REG16);
    254  1.1  uch 	r &= ~SPD_INTR_HDD;
    255  1.1  uch 	_reg_write_2(SPD_INTR_ENABLE_REG16, r);
    256  1.1  uch }
    257