wdc_spd.c revision 1.16
1 /* $NetBSD: wdc_spd.c,v 1.16 2004/08/20 06:39:38 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2001, 2003 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: wdc_spd.c,v 1.16 2004/08/20 06:39:38 thorpej Exp $"); 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/malloc.h> 45 46 #define __read_1(a) \ 47 ({ \ 48 u_int32_t a_ = (a); \ 49 u_int8_t r = (*(__volatile__ u_int8_t *)a_); \ 50 \ 51 if (a_ == 0xb400004e) /* (wdc)STAT LED off */ \ 52 SPD_LED_OFF(); \ 53 \ 54 (r); \ 55 }) 56 #define __write_1(a, v) \ 57 { \ 58 u_int32_t a_ = (a); \ 59 (*(__volatile__ u_int8_t *)a_) = (v); \ 60 \ 61 if (a_ == 0xb400004e) /* (wdc)CMD LED on */ \ 62 SPD_LED_ON(); \ 63 } 64 #define _PLAYSTATION2_BUS_SPACE_PRIVATE 65 #include <machine/bus.h> 66 67 #include <dev/ata/atavar.h> 68 #include <dev/ic/wdcvar.h> 69 70 #include <playstation2/ee/eevar.h> 71 #include <playstation2/dev/spdvar.h> 72 #include <playstation2/dev/spdreg.h> 73 74 #define WDC_SPD_HDD_AUXREG_OFFSET 0x1c 75 76 struct wdc_spd_softc { 77 struct wdc_softc sc_wdcdev; 78 struct ata_channel *sc_chanlist[1]; 79 struct ata_channel sc_channel; 80 struct ata_queue sc_chqueue; 81 struct wdc_regs sc_wdc_regs; 82 void *sc_ih; 83 }; 84 85 #ifdef DEBUG 86 #define STATIC 87 #else 88 #define STATIC static 89 #endif 90 91 STATIC int wdc_spd_match(struct device *, struct cfdata *, void *); 92 STATIC void wdc_spd_attach(struct device *, struct device *, void *); 93 94 CFATTACH_DECL(wdc_spd, sizeof (struct wdc_spd_softc), 95 wdc_spd_match, wdc_spd_attach, NULL, NULL); 96 97 extern struct cfdriver wdc_cd; 98 99 STATIC void __wdc_spd_enable(void); 100 STATIC void __wdc_spd_disable(void) __attribute__((__unused__)); 101 STATIC void __wdc_spd_bus_space(struct ata_channel *); 102 103 /* 104 * wdc register is 16 bit wide. 105 */ 106 #define VADDR(h, o) ((h) + (o)) 107 _BUS_SPACE_READ(_wdc_spd, 1, 8) 108 _BUS_SPACE_READ(_wdc_spd, 2, 16) 109 _BUS_SPACE_READ_MULTI(_wdc_spd, 1, 8) 110 _BUS_SPACE_READ_MULTI(_wdc_spd, 2, 16) 111 _BUS_SPACE_READ_REGION(_wdc_spd, 1, 8) 112 _BUS_SPACE_READ_REGION(_wdc_spd, 2, 16) 113 _BUS_SPACE_WRITE(_wdc_spd, 1, 8) 114 _BUS_SPACE_WRITE(_wdc_spd, 2, 16) 115 _BUS_SPACE_WRITE_MULTI(_wdc_spd, 1, 8) 116 _BUS_SPACE_WRITE_MULTI(_wdc_spd, 2, 16) 117 _BUS_SPACE_WRITE_REGION(_wdc_spd, 1, 8) 118 _BUS_SPACE_WRITE_REGION(_wdc_spd, 2, 16) 119 _BUS_SPACE_SET_MULTI(_wdc_spd, 1, 8) 120 _BUS_SPACE_SET_MULTI(_wdc_spd, 2, 16) 121 _BUS_SPACE_SET_REGION(_wdc_spd, 1, 8) 122 _BUS_SPACE_SET_REGION(_wdc_spd, 2, 16) 123 _BUS_SPACE_COPY_REGION(_wdc_spd, 1, 8) 124 _BUS_SPACE_COPY_REGION(_wdc_spd, 2, 16) 125 #undef VADDR 126 127 STATIC const struct playstation2_bus_space _wdc_spd_space = { 128 pbs_map : _BUS_SPACE_NO_MAP, 129 pbs_unmap : _BUS_SPACE_NO_UNMAP, 130 pbs_subregion : _BUS_SPACE_NO_SUBREGION, 131 pbs_alloc : _BUS_SPACE_NO_ALLOC, 132 pbs_free : _BUS_SPACE_NO_FREE, 133 pbs_vaddr : _BUS_SPACE_NO_VADDR, 134 pbs_r_1 : _wdc_spd_read_1, 135 pbs_r_2 : _wdc_spd_read_2, 136 pbs_r_4 : _BUS_SPACE_NO_READ(4, 32), 137 pbs_r_8 : _BUS_SPACE_NO_READ(8, 64), 138 pbs_rm_1 : _wdc_spd_read_multi_1, 139 pbs_rm_2 : _wdc_spd_read_multi_2, 140 pbs_rm_4 : _BUS_SPACE_NO_READ_MULTI(4, 32), 141 pbs_rm_8 : _BUS_SPACE_NO_READ_MULTI(8, 64), 142 pbs_rr_1 : _wdc_spd_read_region_1, 143 pbs_rr_2 : _wdc_spd_read_region_2, 144 pbs_rr_4 : _BUS_SPACE_NO_READ_REGION(4, 32), 145 pbs_rr_8 : _BUS_SPACE_NO_READ_REGION(8, 64), 146 pbs_w_1 : _wdc_spd_write_1, 147 pbs_w_2 : _wdc_spd_write_2, 148 pbs_w_4 : _BUS_SPACE_NO_WRITE(4, 32), 149 pbs_w_8 : _BUS_SPACE_NO_WRITE(8, 64), 150 pbs_wm_1 : _wdc_spd_write_multi_1, 151 pbs_wm_2 : _wdc_spd_write_multi_2, 152 pbs_wm_4 : _BUS_SPACE_NO_WRITE_MULTI(4, 32), 153 pbs_wm_8 : _BUS_SPACE_NO_WRITE_MULTI(8, 64), 154 pbs_wr_1 : _wdc_spd_write_region_1, 155 pbs_wr_2 : _wdc_spd_write_region_2, 156 pbs_wr_4 : _BUS_SPACE_NO_WRITE_REGION(4, 32), 157 pbs_wr_8 : _BUS_SPACE_NO_WRITE_REGION(8, 64), 158 pbs_sm_1 : _wdc_spd_set_multi_1, 159 pbs_sm_2 : _wdc_spd_set_multi_2, 160 pbs_sm_4 : _BUS_SPACE_NO_SET_MULTI(4, 32), 161 pbs_sm_8 : _BUS_SPACE_NO_SET_MULTI(8, 64), 162 pbs_sr_1 : _wdc_spd_set_region_1, 163 pbs_sr_2 : _wdc_spd_set_region_2, 164 pbs_sr_4 : _BUS_SPACE_NO_SET_REGION(4, 32), 165 pbs_sr_8 : _BUS_SPACE_NO_SET_REGION(8, 64), 166 pbs_c_1 : _wdc_spd_copy_region_1, 167 pbs_c_2 : _wdc_spd_copy_region_2, 168 pbs_c_4 : _BUS_SPACE_NO_COPY_REGION(4, 32), 169 pbs_c_8 : _BUS_SPACE_NO_COPY_REGION(8, 64), 170 }; 171 172 int 173 wdc_spd_match(struct device *parent, struct cfdata *cf, void *aux) 174 { 175 struct spd_attach_args *spa = aux; 176 struct ata_channel ch; 177 struct wdc_softc wdc; 178 struct wdc_regs wdr; 179 int i, result; 180 181 if (spa->spa_slot != SPD_HDD) 182 return (0); 183 184 memset(&wdc, 0, sizeof(wdc)); 185 memset(&ch, 0, sizeof(ch)); 186 ch.ch_atac = &wdc.sc_atac; 187 wdc.regs = &wdr; 188 189 __wdc_spd_bus_space(&ch); 190 191 for (i = 0, result = 0; i < 8; i++) { /* 8 sec */ 192 if (result == 0) 193 result = wdcprobe(&ch); 194 delay(1000000); 195 } 196 197 return (result); 198 } 199 200 void 201 wdc_spd_attach(struct device *parent, struct device *self, void *aux) 202 { 203 struct spd_attach_args *spa = aux; 204 struct wdc_spd_softc *sc = (void *)self; 205 struct wdc_softc *wdc = &sc->sc_wdcdev; 206 struct wdc_regs *wdr; 207 struct ata_channel *ch = &sc->sc_channel; 208 209 printf(": %s\n", spa->spa_product_name); 210 211 sc->sc_wdcdev.regs = &sc->sc_wdc_regs; 212 213 wdc->sc_atac.atac_cap = 214 ATAC_CAP_DMA | ATAC_CAP_UDMA | ATAC_CAP_DATA16; 215 wdc->sc_atac.atac_PIO_cap = 0; 216 sc->sc_chanlist[0] = &sc->sc_channel; 217 wdc->sc_atac.atac_channels = sc->sc_chanlist; 218 wdc->sc_atac.atac_nchannels = 1; 219 ch->ch_channel = 0; 220 ch->ch_atac = &sc->sc_wdcdev.sc_atac; 221 ch->ch_queue = &sc->sc_chqueue; 222 223 __wdc_spd_bus_space(ch); 224 225 spd_intr_establish(SPD_HDD, wdcintr, &sc->sc_channel); 226 227 __wdc_spd_enable(); 228 229 wdcattach(&sc->sc_channel); 230 } 231 232 void 233 __wdc_spd_bus_space(struct ata_channel *ch) 234 { 235 struct wdc_regs *wdr = CHAN_TO_WDC_REGS(ch); 236 int i; 237 238 wdr->cmd_iot = &_wdc_spd_space; 239 for (i = 0; i < 8; i++) 240 wdr->cmd_iohs[i] = SPD_HDD_IO_BASE + i * 2; /* wdc register is 16 bit wide. */ 241 wdc_init_shadow_regs(ch); 242 wdr->ctl_iot = &_wdc_spd_space; 243 wdr->ctl_ioh = SPD_HDD_IO_BASE + WDC_SPD_HDD_AUXREG_OFFSET; 244 wdr->data32iot = ch->cmd_iot; 245 wdr->data32ioh = SPD_HDD_IO_BASE; 246 } 247 248 void 249 __wdc_spd_enable() 250 { 251 u_int16_t r; 252 253 r = _reg_read_2(SPD_INTR_ENABLE_REG16); 254 r |= SPD_INTR_HDD; 255 _reg_write_2(SPD_INTR_ENABLE_REG16, r); 256 } 257 258 void 259 __wdc_spd_disable() 260 { 261 u_int16_t r; 262 263 r = _reg_read_2(SPD_INTR_ENABLE_REG16); 264 r &= ~SPD_INTR_HDD; 265 _reg_write_2(SPD_INTR_ENABLE_REG16, r); 266 } 267
Indexes created Sat Sep 27 22:09:54 GMT 2025