wdc_spd.c revision 1.5 1 /* $NetBSD: wdc_spd.c,v 1.5 2003/09/19 21:36:00 mycroft Exp $ */
2
3 /*-
4 * Copyright (c) 2001, 2003 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by UCHIYAMA Yasushi.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 #include <sys/cdefs.h>
40 __KERNEL_RCSID(0, "$NetBSD: wdc_spd.c,v 1.5 2003/09/19 21:36:00 mycroft Exp $");
41
42 #include <sys/param.h>
43 #include <sys/systm.h>
44 #include <sys/malloc.h>
45
46 #define __read_1(a) \
47 ({ \
48 u_int32_t a_ = (a); \
49 u_int8_t r = (*(__volatile__ u_int8_t *)a_); \
50 \
51 if (a_ == 0xb400004e) /* (wdc)STAT LED off */ \
52 SPD_LED_OFF(); \
53 \
54 (r); \
55 })
56 #define __write_1(a, v) \
57 { \
58 u_int32_t a_ = (a); \
59 (*(__volatile__ u_int8_t *)a_) = (v); \
60 \
61 if (a_ == 0xb400004e) /* (wdc)CMD LED on */ \
62 SPD_LED_ON(); \
63 }
64 #define _PLAYSTATION2_BUS_SPACE_PRIVATE
65 #include <machine/bus.h>
66
67 #include <dev/ata/atavar.h>
68 #include <dev/ic/wdcvar.h>
69
70 #include <playstation2/ee/eevar.h>
71 #include <playstation2/dev/spdvar.h>
72 #include <playstation2/dev/spdreg.h>
73
74 #define WDC_SPD_HDD_AUXREG_OFFSET 0x1c
75
76 struct wdc_spd_softc {
77 struct wdc_softc sc_wdcdev;
78 struct channel_softc *wdc_chanptr;
79 struct channel_softc wdc_channel;
80 void *sc_ih;
81 };
82
83 #ifdef DEBUG
84 #define STATIC
85 #else
86 #define STATIC static
87 #endif
88
89 STATIC int wdc_spd_match(struct device *, struct cfdata *, void *);
90 STATIC void wdc_spd_attach(struct device *, struct device *, void *);
91
92 CFATTACH_DECL(wdc_spd, sizeof (struct wdc_spd_softc),
93 wdc_spd_match, wdc_spd_attach, NULL, NULL);
94
95 extern struct cfdriver wdc_cd;
96
97 STATIC void __wdc_spd_enable(void);
98 STATIC void __wdc_spd_disable(void) __attribute__((__unused__));
99 STATIC void __wdc_spd_bus_space(struct channel_softc *);
100
101 /*
102 * wdc register is 16 bit wide.
103 */
104 #define VADDR(h, o) ((h) + ((o) << 1))
105 _BUS_SPACE_READ(_wdc_spd, 1, 8)
106 _BUS_SPACE_READ(_wdc_spd, 2, 16)
107 _BUS_SPACE_READ_MULTI(_wdc_spd, 1, 8)
108 _BUS_SPACE_READ_MULTI(_wdc_spd, 2, 16)
109 _BUS_SPACE_READ_REGION(_wdc_spd, 1, 8)
110 _BUS_SPACE_READ_REGION(_wdc_spd, 2, 16)
111 _BUS_SPACE_WRITE(_wdc_spd, 1, 8)
112 _BUS_SPACE_WRITE(_wdc_spd, 2, 16)
113 _BUS_SPACE_WRITE_MULTI(_wdc_spd, 1, 8)
114 _BUS_SPACE_WRITE_MULTI(_wdc_spd, 2, 16)
115 _BUS_SPACE_WRITE_REGION(_wdc_spd, 1, 8)
116 _BUS_SPACE_WRITE_REGION(_wdc_spd, 2, 16)
117 _BUS_SPACE_SET_MULTI(_wdc_spd, 1, 8)
118 _BUS_SPACE_SET_MULTI(_wdc_spd, 2, 16)
119 _BUS_SPACE_SET_REGION(_wdc_spd, 1, 8)
120 _BUS_SPACE_SET_REGION(_wdc_spd, 2, 16)
121 _BUS_SPACE_COPY_REGION(_wdc_spd, 1, 8)
122 _BUS_SPACE_COPY_REGION(_wdc_spd, 2, 16)
123 #undef VADDR
124
125 STATIC const struct playstation2_bus_space _wdc_spd_space = {
126 pbs_map : _BUS_SPACE_NO_MAP,
127 pbs_unmap : _BUS_SPACE_NO_UNMAP,
128 pbs_subregion : _BUS_SPACE_NO_SUBREGION,
129 pbs_alloc : _BUS_SPACE_NO_ALLOC,
130 pbs_free : _BUS_SPACE_NO_FREE,
131 pbs_vaddr : _BUS_SPACE_NO_VADDR,
132 pbs_r_1 : _wdc_spd_read_1,
133 pbs_r_2 : _wdc_spd_read_2,
134 pbs_r_4 : _BUS_SPACE_NO_READ(4, 32),
135 pbs_r_8 : _BUS_SPACE_NO_READ(8, 64),
136 pbs_rm_1 : _wdc_spd_read_multi_1,
137 pbs_rm_2 : _wdc_spd_read_multi_2,
138 pbs_rm_4 : _BUS_SPACE_NO_READ_MULTI(4, 32),
139 pbs_rm_8 : _BUS_SPACE_NO_READ_MULTI(8, 64),
140 pbs_rr_1 : _wdc_spd_read_region_1,
141 pbs_rr_2 : _wdc_spd_read_region_2,
142 pbs_rr_4 : _BUS_SPACE_NO_READ_REGION(4, 32),
143 pbs_rr_8 : _BUS_SPACE_NO_READ_REGION(8, 64),
144 pbs_w_1 : _wdc_spd_write_1,
145 pbs_w_2 : _wdc_spd_write_2,
146 pbs_w_4 : _BUS_SPACE_NO_WRITE(4, 32),
147 pbs_w_8 : _BUS_SPACE_NO_WRITE(8, 64),
148 pbs_wm_1 : _wdc_spd_write_multi_1,
149 pbs_wm_2 : _wdc_spd_write_multi_2,
150 pbs_wm_4 : _BUS_SPACE_NO_WRITE_MULTI(4, 32),
151 pbs_wm_8 : _BUS_SPACE_NO_WRITE_MULTI(8, 64),
152 pbs_wr_1 : _wdc_spd_write_region_1,
153 pbs_wr_2 : _wdc_spd_write_region_2,
154 pbs_wr_4 : _BUS_SPACE_NO_WRITE_REGION(4, 32),
155 pbs_wr_8 : _BUS_SPACE_NO_WRITE_REGION(8, 64),
156 pbs_sm_1 : _wdc_spd_set_multi_1,
157 pbs_sm_2 : _wdc_spd_set_multi_2,
158 pbs_sm_4 : _BUS_SPACE_NO_SET_MULTI(4, 32),
159 pbs_sm_8 : _BUS_SPACE_NO_SET_MULTI(8, 64),
160 pbs_sr_1 : _wdc_spd_set_region_1,
161 pbs_sr_2 : _wdc_spd_set_region_2,
162 pbs_sr_4 : _BUS_SPACE_NO_SET_REGION(4, 32),
163 pbs_sr_8 : _BUS_SPACE_NO_SET_REGION(8, 64),
164 pbs_c_1 : _wdc_spd_copy_region_1,
165 pbs_c_2 : _wdc_spd_copy_region_2,
166 pbs_c_4 : _BUS_SPACE_NO_COPY_REGION(4, 32),
167 pbs_c_8 : _BUS_SPACE_NO_COPY_REGION(8, 64),
168 };
169
170 int
171 wdc_spd_match(struct device *parent, struct cfdata *cf, void *aux)
172 {
173 struct spd_attach_args *spa = aux;
174 struct channel_softc ch;
175 int i, result;
176
177 if (spa->spa_slot != SPD_HDD)
178 return (0);
179
180 memset(&ch, 0, sizeof(ch));
181 __wdc_spd_bus_space(&ch);
182
183 for (i = 0, result = 0; i < 8; i++) { /* 8 sec */
184 if (result == 0)
185 result = wdcprobe(&ch);
186 delay(1000000);
187 }
188
189 return (result);
190 }
191
192 void
193 wdc_spd_attach(struct device *parent, struct device *self, void *aux)
194 {
195 struct spd_attach_args *spa = aux;
196 struct wdc_spd_softc *sc = (void *)self;
197 struct wdc_softc *wdc = &sc->sc_wdcdev;
198 struct channel_softc *ch = &sc->wdc_channel;
199
200 printf(": %s\n", spa->spa_product_name);
201
202 __wdc_spd_bus_space(ch);
203
204 wdc->cap =
205 WDC_CAPABILITY_DMA | WDC_CAPABILITY_UDMA | WDC_CAPABILITY_DATA16;
206 wdc->PIO_cap = 0;
207 sc->wdc_chanptr = &sc->wdc_channel;
208 wdc->channels = &sc->wdc_chanptr;
209 wdc->nchannels = 1;
210 ch->channel = 0;
211 ch->wdc = &sc->sc_wdcdev;
212 ch->ch_queue = malloc(sizeof(struct channel_queue), M_DEVBUF,
213 M_NOWAIT);
214
215 if (ch->ch_queue == NULL) {
216 printf("%s: can't allocate memory for command queue",
217 wdc->sc_dev.dv_xname);
218 return;
219 }
220
221 spd_intr_establish(SPD_HDD, wdcintr, &sc->wdc_channel);
222
223 __wdc_spd_enable();
224
225 config_interrupts(self, wdcattach);
226 }
227
228 void
229 __wdc_spd_bus_space(struct channel_softc *ch)
230 {
231
232 ch->cmd_iot = &_wdc_spd_space;
233 ch->cmd_ioh = SPD_HDD_IO_BASE;
234 ch->ctl_iot = &_wdc_spd_space;
235 ch->ctl_ioh = SPD_HDD_IO_BASE + WDC_SPD_HDD_AUXREG_OFFSET;
236 ch->data32iot = ch->cmd_iot;
237 ch->data32ioh = ch->cmd_ioh;
238 }
239
240 void
241 __wdc_spd_enable()
242 {
243 u_int16_t r;
244
245 r = _reg_read_2(SPD_INTR_ENABLE_REG16);
246 r |= SPD_INTR_HDD;
247 _reg_write_2(SPD_INTR_ENABLE_REG16, r);
248 }
249
250 void
251 __wdc_spd_disable()
252 {
253 u_int16_t r;
254
255 r = _reg_read_2(SPD_INTR_ENABLE_REG16);
256 r &= ~SPD_INTR_HDD;
257 _reg_write_2(SPD_INTR_ENABLE_REG16, r);
258 }
259