eevar.h revision 1.6 1 1.6 andvar /* $NetBSD: eevar.h,v 1.6 2021/10/06 20:36:58 andvar Exp $ */
2 1.1 uch
3 1.1 uch /*-
4 1.1 uch * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 1.1 uch * All rights reserved.
6 1.1 uch *
7 1.1 uch * This code is derived from software contributed to The NetBSD Foundation
8 1.1 uch * by UCHIYAMA Yasushi.
9 1.1 uch *
10 1.1 uch * Redistribution and use in source and binary forms, with or without
11 1.1 uch * modification, are permitted provided that the following conditions
12 1.1 uch * are met:
13 1.1 uch * 1. Redistributions of source code must retain the above copyright
14 1.1 uch * notice, this list of conditions and the following disclaimer.
15 1.1 uch * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 uch * notice, this list of conditions and the following disclaimer in the
17 1.1 uch * documentation and/or other materials provided with the distribution.
18 1.1 uch *
19 1.1 uch * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 uch * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 uch * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 uch * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 uch * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 uch * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 uch * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 uch * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 uch * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 uch * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 uch * POSSIBILITY OF SUCH DAMAGE.
30 1.1 uch */
31 1.1 uch
32 1.1 uch /*
33 1.6 andvar * EE embedded device's memory mapped register access method.
34 1.1 uch */
35 1.1 uch
36 1.1 uch #define _PLAYSTATION2_BUS_SPACE_PRIVATE
37 1.5 martin
38 1.1 uch #include <machine/bus.h>
39 1.5 martin #include <mips/cpuregs.h>
40 1.1 uch
41 1.1 uch #define _reg_read_1(a) __read_1(a)
42 1.1 uch #define _reg_read_2(a) __read_2(a)
43 1.1 uch #define _reg_read_4(a) __read_4(a)
44 1.1 uch #define _reg_read_8(a) __read_8(a)
45 1.1 uch #define _reg_read_16(a) __read_16(a)
46 1.1 uch #define _reg_write_1(a, v) __write_1(a, v)
47 1.1 uch #define _reg_write_2(a, v) __write_2(a, v)
48 1.1 uch #define _reg_write_4(a, v) __write_4(a, v)
49 1.1 uch #define _reg_write_8(a, v) __write_8(a, v)
50 1.1 uch #define _reg_write_16(a, v) __write_16(a, v)
51 1.1 uch
52 1.1 uch #define qwctobyte(x) ((x) << 4)
53 1.1 uch #define bytetoqwc(x) ((x) >> 4)
54