Home | History | Annotate | Line # | Download | only in ee
gs.c revision 1.1
      1 /*	$NetBSD: gs.c,v 1.1 2001/10/16 15:38:37 uch Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2001 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by UCHIYAMA Yasushi.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. All advertising materials mentioning features or use of this software
     19  *    must display the following acknowledgement:
     20  *        This product includes software developed by the NetBSD
     21  *        Foundation, Inc. and its contributors.
     22  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  *    contributors may be used to endorse or promote products derived
     24  *    from this software without specific prior written permission.
     25  *
     26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  * POSSIBILITY OF SUCH DAMAGE.
     37  */
     38 
     39 #include <sys/param.h>
     40 
     41 #include <playstation2/playstation2/sifbios.h>
     42 #include <playstation2/ee/eevar.h>
     43 #include <playstation2/ee/gsvar.h>
     44 #include <playstation2/ee/gsreg.h>
     45 #include <playstation2/ee/gifreg.h>
     46 
     47 #ifdef DEBUG
     48 #define STATIC
     49 #else
     50 #define STATIC	static
     51 #endif
     52 
     53 STATIC const struct gs_crt_param {
     54 	int w, h, dvemode;
     55 	u_int64_t smode1, smode2, srfsh, synch1, synch2, syncv, display;
     56 } gs_crt_param[] = {
     57 	[NTSC_NONINTER] = {
     58 		.w	= 640,
     59 		.h	= 240,
     60 		.dvemode= 0,
     61 		.smode1	= SMODE1(0, 1, 1, 1, 1, 0, 0, 0, 0, 0,
     62 		    4, 0, 0, 1, 1, 0, 2, 0, 1, 32, 4),
     63 		.smode2 = SMODE2(0, 0, 0),
     64 		.srfsh	= SRFSH(8),
     65 		.synch1	= SYNCH1(254, 1462, 124, 222, 64),
     66 		.synch2	= SYNCH2(1652, 1240),
     67 		.syncv	= SYNCV(6, 480, 6, 26, 6, 2),
     68 		.display=DISPLAY(239, 2559, 0, 3, 25, 632)
     69 	},
     70 	[NTSC_INTER] = {
     71 		.w	= 640,
     72 		.h	= 480,
     73 		.dvemode= 0,
     74 		.smode1	= SMODE1(0, 1, 1, 1, 1, 0, 0, 0, 0, 0,
     75 		    4, 0, 0, 1, 1, 0, 2, 0, 1, 32, 4),
     76 		.smode2	= SMODE2(0, 0, 1),
     77 		.srfsh	= SRFSH(8),
     78 		.synch1	= SYNCH1(254, 1462, 124, 222, 64),
     79 		.synch2	= SYNCH2(1652, 1240),
     80 		.syncv	= SYNCV(6, 480, 6, 26, 6, 1),
     81 		.display= DISPLAY(479, 2559, 0, 3, 50, 632)
     82 	},
     83 	[PAL_NONINTER] = {
     84 		.w	= 640,
     85 		.h	= 288,
     86 		.dvemode= 1,
     87 		.smode1	= SMODE1(0, 1, 1, 1, 1, 0, 0, 0, 0, 0,
     88 		    4, 0, 0, 1, 1, 0, 3, 0, 1, 32, 4),
     89 		.smode2	= SMODE2(0, 0, 0),
     90 		.srfsh	= SRFSH(8),
     91 		.synch1	= SYNCH1(254, 1474, 127, 262, 48),
     92 		.synch2	= SYNCH2(1680, 1212),
     93 		.syncv	= SYNCV(5, 576, 5, 33, 5, 4),
     94 		.display= DISPLAY(287, 2559, 0, 3, 36, 652)
     95 	},
     96 	[PAL_INTER] = {
     97 		.w	= 640,
     98 		.h	= 576,
     99 		.dvemode= 1,
    100 		.smode1	= SMODE1(0, 1, 1, 1, 1, 0, 0, 0, 0, 0,
    101 		    4, 0, 0, 1, 1, 0, 3, 0, 1, 32, 4),
    102 		.smode2	= SMODE2(0, 0, 1),
    103 		.srfsh	= SRFSH(8),
    104 		.synch1	= SYNCH1(254, 1474, 127, 262, 48),
    105 		.synch2	= SYNCH2(1680, 1212),
    106 		.syncv	= SYNCV(5, 576, 5, 33, 5, 4),
    107 		.display= DISPLAY(575,2559,0,3,72,652)
    108 	},
    109 	[VESA_1A] = {
    110 		.w	= 640,
    111 		.h	= 480,
    112 		.dvemode= 2,
    113 		.smode1	= SMODE1(1, 0, 1, 1, 1, 0, 0, 0, 0, 0,
    114 		    2, 0, 0, 1, 0, 0, 0, 0, 1, 15, 2),
    115 		.smode2	= SMODE2(0, 0, 0),
    116 		.srfsh	= SRFSH(4),
    117 		.synch1	= SYNCH1(192, 608, 192, 84, 32),
    118 		.synch2	= SYNCH2(768, 524),
    119 		.syncv	= SYNCV(2, 480, 0, 33, 0, 10),
    120 		.display= DISPLAY(479, 1279, 0, 1, 34, 276)
    121 	}
    122 };
    123 
    124 void
    125 gs_init(enum gs_crt_type type)
    126 {
    127 	const struct gs_crt_param *p = &gs_crt_param[type];
    128 	u_int64_t smode1 = p->smode1;
    129 
    130 	/* GS reset */
    131 	_reg_write_8(GS_S_CSR_REG, 1 << 9);
    132 
    133 	/* setup PCRTC */
    134 	_reg_write_8(GS_S_PMODE_REG, 0); /* disable circuit 1/2 */
    135 
    136 	_reg_write_8(GS_S_SMODE1_REG, smode1 | ((u_int64_t)1 << 16));
    137 	_reg_write_8(GS_S_SYNCH1_REG, p->synch1);
    138 	_reg_write_8(GS_S_SYNCH2_REG, p->synch2);
    139 	_reg_write_8(GS_S_SYNCV_REG, p->syncv);
    140 	_reg_write_8(GS_S_SMODE2_REG, p->smode2);
    141 	_reg_write_8(GS_S_SRFSH_REG, p->srfsh);
    142 
    143 	if (p->dvemode == 2) { /* PLL on */
    144 		_reg_write_8(GS_S_SMODE1_REG, smode1 & ~((u_int64_t)1 << 16));
    145 		delay(2500);
    146 	}
    147 
    148 	/* start sync */
    149 	_reg_write_8(GS_S_SMODE1_REG,
    150 	    smode1 & ~((u_int64_t)1 << 16) & ~((u_int64_t)1 << 17));
    151 
    152 	sifbios_setdve(p->dvemode);
    153 
    154 	/* enable circuit */
    155 	_reg_write_8(GS_S_PMODE_REG, 0x66);
    156 
    157 	/* display environment */
    158 	_reg_write_8(GS_S_DISPLAY2_REG, p->display);
    159 	_reg_write_8(GS_S_DISPFB2_REG, (p->w >> 6) << 9);
    160 	_reg_write_8(GS_S_SMODE2_REG, p->smode2);
    161 	_reg_write_8(GS_S_BGCOLOR_REG, 0);
    162 
    163 	/* Flush GS FIFO */
    164 	_reg_write_8(GS_S_CSR_REG, 1 << 8);
    165 
    166 	/* GIF reset */
    167 	_reg_write_4(GIF_CTRL_REG, 1);
    168 }
    169