timer.c revision 1.1 1 1.1 uch /* $NetBSD: timer.c,v 1.1 2001/10/16 15:38:39 uch Exp $ */
2 1.1 uch
3 1.1 uch /*-
4 1.1 uch * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 1.1 uch * All rights reserved.
6 1.1 uch *
7 1.1 uch * This code is derived from software contributed to The NetBSD Foundation
8 1.1 uch * by UCHIYAMA Yasushi.
9 1.1 uch *
10 1.1 uch * Redistribution and use in source and binary forms, with or without
11 1.1 uch * modification, are permitted provided that the following conditions
12 1.1 uch * are met:
13 1.1 uch * 1. Redistributions of source code must retain the above copyright
14 1.1 uch * notice, this list of conditions and the following disclaimer.
15 1.1 uch * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 uch * notice, this list of conditions and the following disclaimer in the
17 1.1 uch * documentation and/or other materials provided with the distribution.
18 1.1 uch * 3. All advertising materials mentioning features or use of this software
19 1.1 uch * must display the following acknowledgement:
20 1.1 uch * This product includes software developed by the NetBSD
21 1.1 uch * Foundation, Inc. and its contributors.
22 1.1 uch * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.1 uch * contributors may be used to endorse or promote products derived
24 1.1 uch * from this software without specific prior written permission.
25 1.1 uch *
26 1.1 uch * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.1 uch * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.1 uch * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.1 uch * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.1 uch * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.1 uch * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.1 uch * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.1 uch * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.1 uch * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.1 uch * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.1 uch * POSSIBILITY OF SUCH DAMAGE.
37 1.1 uch */
38 1.1 uch
39 1.1 uch #include "debug_playstation2.h"
40 1.1 uch
41 1.1 uch #include <sys/param.h>
42 1.1 uch #include <sys/systm.h>
43 1.1 uch
44 1.1 uch #include <playstation2/playstation2/interrupt.h>
45 1.1 uch
46 1.1 uch #include <playstation2/ee/eevar.h>
47 1.1 uch #include <playstation2/ee/intcvar.h>
48 1.1 uch #include <playstation2/ee/timervar.h>
49 1.1 uch #include <playstation2/ee/timerreg.h>
50 1.1 uch
51 1.1 uch
52 1.1 uch #ifdef DEBUG
53 1.1 uch #define STATIC
54 1.1 uch #else
55 1.1 uch #define STATIC static
56 1.1 uch #endif
57 1.1 uch
58 1.1 uch STATIC int timer0_intr(void *);
59 1.1 uch
60 1.1 uch /*
61 1.1 uch * EE timer usage
62 1.1 uch * 0 ... 100 Hz clock interrupt.
63 1.1 uch * 1 ... one shot interrupt for software interrupt for IPL_SOFT
64 1.1 uch * 2 ... for IPL_SOFTCLOCK
65 1.1 uch * 3 ... for IPL_SOFTNET, IPL_SOFTSERIAL
66 1.1 uch */
67 1.1 uch
68 1.1 uch void
69 1.1 uch timer_init()
70 1.1 uch {
71 1.1 uch
72 1.1 uch _reg_write_4(T0_MODE_REG, (T_MODE_EQUF | T_MODE_OVFF));
73 1.1 uch _reg_write_4(T1_MODE_REG, (T_MODE_EQUF | T_MODE_OVFF));
74 1.1 uch _reg_write_4(T2_MODE_REG, (T_MODE_EQUF | T_MODE_OVFF));
75 1.1 uch _reg_write_4(T3_MODE_REG, (T_MODE_EQUF | T_MODE_OVFF));
76 1.1 uch }
77 1.1 uch
78 1.1 uch void
79 1.1 uch timer_clock_init()
80 1.1 uch {
81 1.1 uch /* clock interrupt (296.912MHz / 2 / 256) * 5760 = 100Hz */
82 1.1 uch intc_intr_establish(I_CH9_TIMER0, IPL_CLOCK, timer0_intr, 0);
83 1.1 uch _reg_write_4(T0_COUNT_REG, 0);
84 1.1 uch _reg_write_4(T0_COMP_REG, 5760);
85 1.1 uch _reg_write_4(T0_MODE_REG, T_MODE_CLKS_BUSCLK256 | T_MODE_ZRET |
86 1.1 uch T_MODE_CUE | T_MODE_CMPE);
87 1.1 uch }
88 1.1 uch
89 1.1 uch void
90 1.1 uch timer_one_shot(int timer)
91 1.1 uch {
92 1.1 uch KDASSERT(LEGAL_TIMER(timer) && timer != 0);
93 1.1 uch
94 1.1 uch _reg_write_4(T_COUNT_REG(timer), 0);
95 1.1 uch _reg_write_4(T_COMP_REG(timer), 1);
96 1.1 uch _reg_write_4(T_MODE_REG(timer), T_MODE_CUE | T_MODE_CMPE);
97 1.1 uch }
98 1.1 uch
99 1.1 uch /*
100 1.1 uch * interrupt handler for clock interrupt (100Hz)
101 1.1 uch */
102 1.1 uch int
103 1.1 uch timer0_intr(void *arg)
104 1.1 uch {
105 1.1 uch
106 1.1 uch _reg_write_4(T0_MODE_REG, _reg_read_4(T0_MODE_REG) | T_MODE_EQUF);
107 1.1 uch
108 1.1 uch _playstation2_evcnt.clock.ev_count++;
109 1.1 uch
110 1.1 uch hardclock(&playstation2_clockframe);
111 1.1 uch
112 1.1 uch return (1);
113 1.1 uch }
114 1.1 uch
115 1.1 uch /* one shot timer interrupt for software interrupt */
116 1.1 uch int
117 1.1 uch timer1_intr(void *arg)
118 1.1 uch {
119 1.1 uch
120 1.1 uch _reg_write_4(T1_MODE_REG, T_MODE_EQUF | T_MODE_OVFF);
121 1.1 uch
122 1.1 uch softintr_dispatch(0); /* IPL_SOFT */
123 1.1 uch
124 1.1 uch return (1);
125 1.1 uch }
126 1.1 uch
127 1.1 uch int
128 1.1 uch timer2_intr(void *arg)
129 1.1 uch {
130 1.1 uch
131 1.1 uch _reg_write_4(T2_MODE_REG, T_MODE_EQUF | T_MODE_OVFF);
132 1.1 uch
133 1.1 uch softintr_dispatch(1); /* IPL_SOFTCLOCK */
134 1.1 uch
135 1.1 uch return (1);
136 1.1 uch }
137 1.1 uch
138 1.1 uch int
139 1.1 uch timer3_intr(void *arg)
140 1.1 uch {
141 1.1 uch
142 1.1 uch _reg_write_4(T3_MODE_REG, T_MODE_EQUF | T_MODE_OVFF);
143 1.1 uch
144 1.1 uch softintr_dispatch(3); /* IPL_SOFTSERIAL */
145 1.1 uch softintr_dispatch(2); /* IPL_SOFTNET */
146 1.1 uch
147 1.1 uch return (1);
148 1.1 uch }
149