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timer.c revision 1.6
      1  1.6  cegger /*	$NetBSD: timer.c,v 1.6 2009/03/18 10:22:33 cegger Exp $	*/
      2  1.1     uch 
      3  1.1     uch /*-
      4  1.1     uch  * Copyright (c) 2001 The NetBSD Foundation, Inc.
      5  1.1     uch  * All rights reserved.
      6  1.1     uch  *
      7  1.1     uch  * This code is derived from software contributed to The NetBSD Foundation
      8  1.1     uch  * by UCHIYAMA Yasushi.
      9  1.1     uch  *
     10  1.1     uch  * Redistribution and use in source and binary forms, with or without
     11  1.1     uch  * modification, are permitted provided that the following conditions
     12  1.1     uch  * are met:
     13  1.1     uch  * 1. Redistributions of source code must retain the above copyright
     14  1.1     uch  *    notice, this list of conditions and the following disclaimer.
     15  1.1     uch  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.1     uch  *    notice, this list of conditions and the following disclaimer in the
     17  1.1     uch  *    documentation and/or other materials provided with the distribution.
     18  1.1     uch  *
     19  1.1     uch  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  1.1     uch  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  1.1     uch  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  1.1     uch  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  1.1     uch  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  1.1     uch  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  1.1     uch  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  1.1     uch  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  1.1     uch  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  1.1     uch  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  1.1     uch  * POSSIBILITY OF SUCH DAMAGE.
     30  1.1     uch  */
     31  1.2   lukem 
     32  1.2   lukem #include <sys/cdefs.h>
     33  1.6  cegger __KERNEL_RCSID(0, "$NetBSD: timer.c,v 1.6 2009/03/18 10:22:33 cegger Exp $");
     34  1.1     uch 
     35  1.1     uch #include "debug_playstation2.h"
     36  1.1     uch 
     37  1.1     uch #include <sys/param.h>
     38  1.1     uch #include <sys/systm.h>
     39  1.1     uch 
     40  1.1     uch #include <playstation2/playstation2/interrupt.h>
     41  1.1     uch 
     42  1.1     uch #include <playstation2/ee/eevar.h>
     43  1.1     uch #include <playstation2/ee/intcvar.h>
     44  1.1     uch #include <playstation2/ee/timervar.h>
     45  1.1     uch #include <playstation2/ee/timerreg.h>
     46  1.1     uch 
     47  1.1     uch 
     48  1.1     uch #ifdef DEBUG
     49  1.1     uch #define STATIC
     50  1.1     uch #else
     51  1.1     uch #define STATIC static
     52  1.1     uch #endif
     53  1.1     uch 
     54  1.1     uch STATIC int timer0_intr(void *);
     55  1.1     uch 
     56  1.1     uch /*
     57  1.1     uch  * EE timer usage
     58  1.1     uch  *	0 ... 100 Hz clock interrupt.
     59  1.1     uch  *      1 ... one shot interrupt for software interrupt for IPL_SOFT
     60  1.1     uch  *	2 ... for IPL_SOFTCLOCK
     61  1.1     uch  *	3 ... for IPL_SOFTNET, IPL_SOFTSERIAL
     62  1.1     uch  */
     63  1.1     uch 
     64  1.1     uch void
     65  1.6  cegger timer_init(void)
     66  1.1     uch {
     67  1.1     uch 
     68  1.1     uch 	_reg_write_4(T0_MODE_REG, (T_MODE_EQUF | T_MODE_OVFF));
     69  1.1     uch 	_reg_write_4(T1_MODE_REG, (T_MODE_EQUF | T_MODE_OVFF));
     70  1.1     uch 	_reg_write_4(T2_MODE_REG, (T_MODE_EQUF | T_MODE_OVFF));
     71  1.1     uch 	_reg_write_4(T3_MODE_REG, (T_MODE_EQUF | T_MODE_OVFF));
     72  1.1     uch }
     73  1.1     uch 
     74  1.1     uch void
     75  1.6  cegger timer_clock_init(void)
     76  1.1     uch {
     77  1.1     uch 	/* clock interrupt (296.912MHz / 2 / 256) * 5760 = 100Hz */
     78  1.1     uch 	intc_intr_establish(I_CH9_TIMER0, IPL_CLOCK, timer0_intr, 0);
     79  1.1     uch 	_reg_write_4(T0_COUNT_REG, 0);
     80  1.1     uch 	_reg_write_4(T0_COMP_REG, 5760);
     81  1.1     uch 	_reg_write_4(T0_MODE_REG, T_MODE_CLKS_BUSCLK256 | T_MODE_ZRET |
     82  1.1     uch 	    T_MODE_CUE | T_MODE_CMPE);
     83  1.1     uch }
     84  1.1     uch 
     85  1.1     uch void
     86  1.1     uch timer_one_shot(int timer)
     87  1.1     uch {
     88  1.1     uch 	KDASSERT(LEGAL_TIMER(timer) && timer != 0);
     89  1.1     uch 
     90  1.1     uch 	_reg_write_4(T_COUNT_REG(timer), 0);
     91  1.1     uch 	_reg_write_4(T_COMP_REG(timer), 1);
     92  1.1     uch 	_reg_write_4(T_MODE_REG(timer), T_MODE_CUE | T_MODE_CMPE);
     93  1.1     uch }
     94  1.1     uch 
     95  1.1     uch /*
     96  1.1     uch  * interrupt handler for clock interrupt (100Hz)
     97  1.1     uch  */
     98  1.1     uch int
     99  1.1     uch timer0_intr(void *arg)
    100  1.1     uch {
    101  1.1     uch 
    102  1.1     uch 	_reg_write_4(T0_MODE_REG, _reg_read_4(T0_MODE_REG) | T_MODE_EQUF);
    103  1.1     uch 
    104  1.1     uch 	_playstation2_evcnt.clock.ev_count++;
    105  1.1     uch 
    106  1.1     uch 	hardclock(&playstation2_clockframe);
    107  1.1     uch 
    108  1.1     uch 	return (1);
    109  1.1     uch }
    110  1.1     uch 
    111  1.1     uch /* one shot timer interrupt for software interrupt */
    112  1.1     uch int
    113  1.1     uch timer1_intr(void *arg)
    114  1.1     uch {
    115  1.1     uch 
    116  1.1     uch 	_reg_write_4(T1_MODE_REG, T_MODE_EQUF | T_MODE_OVFF);
    117  1.1     uch 
    118  1.4      ad #ifdef __HAVE_FAST_SOFTINTS
    119  1.1     uch 	softintr_dispatch(0); /* IPL_SOFT */
    120  1.4      ad #endif
    121  1.1     uch 
    122  1.1     uch 	return (1);
    123  1.1     uch }
    124  1.1     uch 
    125  1.1     uch int
    126  1.1     uch timer2_intr(void *arg)
    127  1.1     uch {
    128  1.1     uch 
    129  1.1     uch 	_reg_write_4(T2_MODE_REG, T_MODE_EQUF | T_MODE_OVFF);
    130  1.1     uch 
    131  1.4      ad #ifdef __HAVE_FAST_SOFTINTS
    132  1.1     uch 	softintr_dispatch(1); /* IPL_SOFTCLOCK */
    133  1.4      ad #endif
    134  1.1     uch 	return (1);
    135  1.1     uch }
    136  1.1     uch 
    137  1.1     uch int
    138  1.1     uch timer3_intr(void *arg)
    139  1.1     uch {
    140  1.1     uch 
    141  1.1     uch 	_reg_write_4(T3_MODE_REG, T_MODE_EQUF | T_MODE_OVFF);
    142  1.1     uch 
    143  1.4      ad #ifdef __HAVE_FAST_SOFTINTS
    144  1.1     uch 	softintr_dispatch(3); /* IPL_SOFTSERIAL */
    145  1.1     uch 	softintr_dispatch(2); /* IPL_SOFTNET */
    146  1.4      ad #endif
    147  1.1     uch 
    148  1.1     uch 	return (1);
    149  1.1     uch }
    150