timer.c revision 1.6 1 /* $NetBSD: timer.c,v 1.6 2009/03/18 10:22:33 cegger Exp $ */
2
3 /*-
4 * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by UCHIYAMA Yasushi.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: timer.c,v 1.6 2009/03/18 10:22:33 cegger Exp $");
34
35 #include "debug_playstation2.h"
36
37 #include <sys/param.h>
38 #include <sys/systm.h>
39
40 #include <playstation2/playstation2/interrupt.h>
41
42 #include <playstation2/ee/eevar.h>
43 #include <playstation2/ee/intcvar.h>
44 #include <playstation2/ee/timervar.h>
45 #include <playstation2/ee/timerreg.h>
46
47
48 #ifdef DEBUG
49 #define STATIC
50 #else
51 #define STATIC static
52 #endif
53
54 STATIC int timer0_intr(void *);
55
56 /*
57 * EE timer usage
58 * 0 ... 100 Hz clock interrupt.
59 * 1 ... one shot interrupt for software interrupt for IPL_SOFT
60 * 2 ... for IPL_SOFTCLOCK
61 * 3 ... for IPL_SOFTNET, IPL_SOFTSERIAL
62 */
63
64 void
65 timer_init(void)
66 {
67
68 _reg_write_4(T0_MODE_REG, (T_MODE_EQUF | T_MODE_OVFF));
69 _reg_write_4(T1_MODE_REG, (T_MODE_EQUF | T_MODE_OVFF));
70 _reg_write_4(T2_MODE_REG, (T_MODE_EQUF | T_MODE_OVFF));
71 _reg_write_4(T3_MODE_REG, (T_MODE_EQUF | T_MODE_OVFF));
72 }
73
74 void
75 timer_clock_init(void)
76 {
77 /* clock interrupt (296.912MHz / 2 / 256) * 5760 = 100Hz */
78 intc_intr_establish(I_CH9_TIMER0, IPL_CLOCK, timer0_intr, 0);
79 _reg_write_4(T0_COUNT_REG, 0);
80 _reg_write_4(T0_COMP_REG, 5760);
81 _reg_write_4(T0_MODE_REG, T_MODE_CLKS_BUSCLK256 | T_MODE_ZRET |
82 T_MODE_CUE | T_MODE_CMPE);
83 }
84
85 void
86 timer_one_shot(int timer)
87 {
88 KDASSERT(LEGAL_TIMER(timer) && timer != 0);
89
90 _reg_write_4(T_COUNT_REG(timer), 0);
91 _reg_write_4(T_COMP_REG(timer), 1);
92 _reg_write_4(T_MODE_REG(timer), T_MODE_CUE | T_MODE_CMPE);
93 }
94
95 /*
96 * interrupt handler for clock interrupt (100Hz)
97 */
98 int
99 timer0_intr(void *arg)
100 {
101
102 _reg_write_4(T0_MODE_REG, _reg_read_4(T0_MODE_REG) | T_MODE_EQUF);
103
104 _playstation2_evcnt.clock.ev_count++;
105
106 hardclock(&playstation2_clockframe);
107
108 return (1);
109 }
110
111 /* one shot timer interrupt for software interrupt */
112 int
113 timer1_intr(void *arg)
114 {
115
116 _reg_write_4(T1_MODE_REG, T_MODE_EQUF | T_MODE_OVFF);
117
118 #ifdef __HAVE_FAST_SOFTINTS
119 softintr_dispatch(0); /* IPL_SOFT */
120 #endif
121
122 return (1);
123 }
124
125 int
126 timer2_intr(void *arg)
127 {
128
129 _reg_write_4(T2_MODE_REG, T_MODE_EQUF | T_MODE_OVFF);
130
131 #ifdef __HAVE_FAST_SOFTINTS
132 softintr_dispatch(1); /* IPL_SOFTCLOCK */
133 #endif
134 return (1);
135 }
136
137 int
138 timer3_intr(void *arg)
139 {
140
141 _reg_write_4(T3_MODE_REG, T_MODE_EQUF | T_MODE_OVFF);
142
143 #ifdef __HAVE_FAST_SOFTINTS
144 softintr_dispatch(3); /* IPL_SOFTSERIAL */
145 softintr_dispatch(2); /* IPL_SOFTNET */
146 #endif
147
148 return (1);
149 }
150