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bus.h revision 1.9
      1  1.9   perry /*	$NetBSD: bus.h,v 1.9 2006/02/16 20:17:14 perry Exp $	*/
      2  1.1     uch 
      3  1.1     uch /*-
      4  1.1     uch  * Copyright (c) 1997, 1998, 2000, 2001 The NetBSD Foundation, Inc.
      5  1.1     uch  * All rights reserved.
      6  1.1     uch  *
      7  1.1     uch  * This code is derived from software contributed to The NetBSD Foundation
      8  1.1     uch  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9  1.1     uch  * NASA Ames Research Center.
     10  1.1     uch  *
     11  1.1     uch  * Redistribution and use in source and binary forms, with or without
     12  1.1     uch  * modification, are permitted provided that the following conditions
     13  1.1     uch  * are met:
     14  1.1     uch  * 1. Redistributions of source code must retain the above copyright
     15  1.1     uch  *    notice, this list of conditions and the following disclaimer.
     16  1.1     uch  * 2. Redistributions in binary form must reproduce the above copyright
     17  1.1     uch  *    notice, this list of conditions and the following disclaimer in the
     18  1.1     uch  *    documentation and/or other materials provided with the distribution.
     19  1.1     uch  * 3. All advertising materials mentioning features or use of this software
     20  1.1     uch  *    must display the following acknowledgement:
     21  1.1     uch  *	This product includes software developed by the NetBSD
     22  1.1     uch  *	Foundation, Inc. and its contributors.
     23  1.1     uch  * 4. Neither the name of The NetBSD Foundation nor the names of its
     24  1.1     uch  *    contributors may be used to endorse or promote products derived
     25  1.1     uch  *    from this software without specific prior written permission.
     26  1.1     uch  *
     27  1.1     uch  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     28  1.1     uch  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     29  1.1     uch  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     30  1.1     uch  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     31  1.1     uch  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     32  1.1     uch  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     33  1.1     uch  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     34  1.1     uch  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     35  1.1     uch  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     36  1.1     uch  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     37  1.1     uch  * POSSIBILITY OF SUCH DAMAGE.
     38  1.1     uch  */
     39  1.1     uch 
     40  1.1     uch /*
     41  1.1     uch  * Copyright (c) 1996 Carnegie-Mellon University.
     42  1.1     uch  * All rights reserved.
     43  1.1     uch  *
     44  1.1     uch  * Author: Chris G. Demetriou
     45  1.1     uch  *
     46  1.1     uch  * Permission to use, copy, modify and distribute this software and
     47  1.1     uch  * its documentation is hereby granted, provided that both the copyright
     48  1.1     uch  * notice and this permission notice appear in all copies of the
     49  1.1     uch  * software, derivative works or modified versions, and any portions
     50  1.1     uch  * thereof, and that both notices appear in supporting documentation.
     51  1.1     uch  *
     52  1.1     uch  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     53  1.1     uch  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     54  1.1     uch  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     55  1.1     uch  *
     56  1.1     uch  * Carnegie Mellon requests users of this software to return to
     57  1.1     uch  *
     58  1.1     uch  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     59  1.1     uch  *  School of Computer Science
     60  1.1     uch  *  Carnegie Mellon University
     61  1.1     uch  *  Pittsburgh PA 15213-3890
     62  1.1     uch  *
     63  1.1     uch  * any improvements or extensions that they make and grant Carnegie the
     64  1.1     uch  * rights to redistribute these changes.
     65  1.1     uch  */
     66  1.1     uch 
     67  1.1     uch #ifndef _PLAYSTATION2_BUS_H_
     68  1.1     uch #define	_PLAYSTATION2_BUS_H_
     69  1.1     uch 
     70  1.1     uch #include <sys/types.h>
     71  1.1     uch 
     72  1.1     uch #ifdef _KERNEL
     73  1.1     uch /*
     74  1.1     uch  * Turn on BUS_SPACE_DEBUG if the global DEBUG option is enabled.
     75  1.1     uch  */
     76  1.1     uch #if defined(DEBUG) && !defined(BUS_SPACE_DEBUG)
     77  1.1     uch #define	BUS_SPACE_DEBUG
     78  1.1     uch #endif
     79  1.1     uch 
     80  1.1     uch #ifdef BUS_SPACE_DEBUG
     81  1.1     uch #include <sys/systm.h> /* for printf() prototype */
     82  1.1     uch /*
     83  1.1     uch  * Macros for checking the aligned-ness of pointers passed to bus
     84  1.1     uch  * space ops.  Strict alignment is required by the MIPS architecture,
     85  1.1     uch  * and a trap will occur if unaligned access is performed.  These
     86  1.1     uch  * may aid in the debugging of a broken device driver by displaying
     87  1.1     uch  * useful information about the problem.
     88  1.1     uch  */
     89  1.1     uch #define	__BUS_SPACE_ALIGNED_ADDRESS(p, t)				\
     90  1.1     uch 	((((u_int32_t)(p)) & (sizeof(t)-1)) == 0)
     91  1.1     uch 
     92  1.1     uch #define	__BUS_SPACE_ADDRESS_SANITY(p, t, d)				\
     93  1.1     uch ({									\
     94  1.1     uch 	if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) {			\
     95  1.1     uch 		printf("%s 0x%x not aligned to %u bytes %s:%d\n",	\
     96  1.1     uch 		    d, (u_int32_t)(p), (u_int32_t)sizeof(t), __FILE__,	\
     97  1.1     uch 		    __LINE__);						\
     98  1.1     uch 	}								\
     99  1.1     uch 	(void) 0;							\
    100  1.1     uch })
    101  1.1     uch 
    102  1.1     uch #define BUS_SPACE_ALIGNED_POINTER(p, t) __BUS_SPACE_ALIGNED_ADDRESS(p, t)
    103  1.1     uch #else
    104  1.1     uch #define	__BUS_SPACE_ADDRESS_SANITY(p, t, d)	(void) 0
    105  1.1     uch #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
    106  1.1     uch #endif /* BUS_SPACE_DEBUG */
    107  1.1     uch #endif /* _KERNEL */
    108  1.1     uch 
    109  1.1     uch /*
    110  1.1     uch  * Addresses (in bus space).
    111  1.1     uch  */
    112  1.1     uch typedef long bus_addr_t;
    113  1.1     uch typedef long bus_size_t;
    114  1.1     uch 
    115  1.1     uch /*
    116  1.1     uch  * Access methods for bus space.
    117  1.1     uch  */
    118  1.1     uch typedef const struct playstation2_bus_space *bus_space_tag_t;
    119  1.1     uch typedef bus_addr_t bus_space_handle_t;
    120  1.1     uch 
    121  1.1     uch struct extent; /* forward declaration */
    122  1.1     uch 
    123  1.1     uch struct playstation2_bus_space {
    124  1.1     uch 	struct extent	*pbs_extent;
    125  1.1     uch 	bus_addr_t	pbs_base_addr;
    126  1.1     uch 
    127  1.1     uch 	/* cookie */
    128  1.1     uch 	void		*pbs_cookie;
    129  1.1     uch 
    130  1.1     uch 	/* mapping/unmapping */
    131  1.1     uch 	int		(*pbs_map)(void *, bus_addr_t, bus_size_t,
    132  1.1     uch 			    int, bus_space_handle_t *);
    133  1.1     uch 	void		(*pbs_unmap)(void *, bus_space_handle_t,
    134  1.1     uch 			    bus_size_t);
    135  1.1     uch 	int		(*pbs_subregion)(void *, bus_space_handle_t,
    136  1.1     uch 			    bus_size_t, bus_size_t, bus_space_handle_t *);
    137  1.1     uch 
    138  1.1     uch 	/* allocation/deallocation */
    139  1.1     uch 	int		(*pbs_alloc)(void *, bus_addr_t, bus_addr_t,
    140  1.1     uch 			    bus_size_t, bus_size_t, bus_size_t, int,
    141  1.1     uch 			    bus_addr_t *, bus_space_handle_t *);
    142  1.1     uch 	void		(*pbs_free)(void *, bus_space_handle_t,
    143  1.1     uch 			    bus_size_t);
    144  1.1     uch 
    145  1.1     uch 	/* get kernel virtual address */
    146  1.1     uch 	void *		(*pbs_vaddr)(void *, bus_space_handle_t);
    147  1.1     uch 
    148  1.1     uch 	/* read (single) */
    149  1.1     uch 	u_int8_t	(*pbs_r_1)(void *, bus_space_handle_t,
    150  1.1     uch 			    bus_size_t);
    151  1.1     uch 	u_int16_t	(*pbs_r_2)(void *, bus_space_handle_t,
    152  1.1     uch 			    bus_size_t);
    153  1.1     uch 	u_int32_t	(*pbs_r_4)(void *, bus_space_handle_t,
    154  1.1     uch 			    bus_size_t);
    155  1.1     uch 	u_int64_t	(*pbs_r_8)(void *, bus_space_handle_t,
    156  1.1     uch 			    bus_size_t);
    157  1.1     uch 
    158  1.1     uch 	/* read multiple */
    159  1.1     uch 	void		(*pbs_rm_1)(void *, bus_space_handle_t,
    160  1.1     uch 			    bus_size_t, u_int8_t *, bus_size_t);
    161  1.1     uch 	void		(*pbs_rm_2)(void *, bus_space_handle_t,
    162  1.1     uch 			    bus_size_t, u_int16_t *, bus_size_t);
    163  1.1     uch 	void		(*pbs_rm_4)(void *, bus_space_handle_t,
    164  1.1     uch 			    bus_size_t, u_int32_t *, bus_size_t);
    165  1.1     uch 	void		(*pbs_rm_8)(void *, bus_space_handle_t,
    166  1.1     uch 			    bus_size_t, u_int64_t *, bus_size_t);
    167  1.1     uch 
    168  1.1     uch 	/* read region */
    169  1.1     uch 	void		(*pbs_rr_1)(void *, bus_space_handle_t,
    170  1.1     uch 			    bus_size_t, u_int8_t *, bus_size_t);
    171  1.1     uch 	void		(*pbs_rr_2)(void *, bus_space_handle_t,
    172  1.1     uch 			    bus_size_t, u_int16_t *, bus_size_t);
    173  1.1     uch 	void		(*pbs_rr_4)(void *, bus_space_handle_t,
    174  1.1     uch 			    bus_size_t, u_int32_t *, bus_size_t);
    175  1.1     uch 	void		(*pbs_rr_8)(void *, bus_space_handle_t,
    176  1.1     uch 			    bus_size_t, u_int64_t *, bus_size_t);
    177  1.1     uch 
    178  1.1     uch 	/* write (single) */
    179  1.1     uch 	void		(*pbs_w_1)(void *, bus_space_handle_t,
    180  1.1     uch 			    bus_size_t, u_int8_t);
    181  1.1     uch 	void		(*pbs_w_2)(void *, bus_space_handle_t,
    182  1.1     uch 			    bus_size_t, u_int16_t);
    183  1.1     uch 	void		(*pbs_w_4)(void *, bus_space_handle_t,
    184  1.1     uch 			    bus_size_t, u_int32_t);
    185  1.1     uch 	void		(*pbs_w_8)(void *, bus_space_handle_t,
    186  1.1     uch 			    bus_size_t, u_int64_t);
    187  1.1     uch 
    188  1.1     uch 	/* write multiple */
    189  1.1     uch 	void		(*pbs_wm_1)(void *, bus_space_handle_t,
    190  1.1     uch 			    bus_size_t, const u_int8_t *, bus_size_t);
    191  1.1     uch 	void		(*pbs_wm_2)(void *, bus_space_handle_t,
    192  1.1     uch 			    bus_size_t, const u_int16_t *, bus_size_t);
    193  1.1     uch 	void		(*pbs_wm_4)(void *, bus_space_handle_t,
    194  1.1     uch 			    bus_size_t, const u_int32_t *, bus_size_t);
    195  1.1     uch 	void		(*pbs_wm_8)(void *, bus_space_handle_t,
    196  1.1     uch 			    bus_size_t, const u_int64_t *, bus_size_t);
    197  1.1     uch 
    198  1.1     uch 	/* write region */
    199  1.1     uch 	void		(*pbs_wr_1)(void *, bus_space_handle_t,
    200  1.1     uch 			    bus_size_t, const u_int8_t *, bus_size_t);
    201  1.1     uch 	void		(*pbs_wr_2)(void *, bus_space_handle_t,
    202  1.1     uch 			    bus_size_t, const u_int16_t *, bus_size_t);
    203  1.1     uch 	void		(*pbs_wr_4)(void *, bus_space_handle_t,
    204  1.1     uch 			    bus_size_t, const u_int32_t *, bus_size_t);
    205  1.1     uch 	void		(*pbs_wr_8)(void *, bus_space_handle_t,
    206  1.1     uch 			    bus_size_t, const u_int64_t *, bus_size_t);
    207  1.1     uch 
    208  1.1     uch 	/* set multiple */
    209  1.1     uch 	void		(*pbs_sm_1)(void *, bus_space_handle_t,
    210  1.1     uch 			    bus_size_t, u_int8_t, bus_size_t);
    211  1.1     uch 	void		(*pbs_sm_2)(void *, bus_space_handle_t,
    212  1.1     uch 			    bus_size_t, u_int16_t, bus_size_t);
    213  1.1     uch 	void		(*pbs_sm_4)(void *, bus_space_handle_t,
    214  1.1     uch 			    bus_size_t, u_int32_t, bus_size_t);
    215  1.1     uch 	void		(*pbs_sm_8)(void *, bus_space_handle_t,
    216  1.1     uch 			    bus_size_t, u_int64_t, bus_size_t);
    217  1.1     uch 
    218  1.1     uch 	/* set region */
    219  1.1     uch 	void		(*pbs_sr_1)(void *, bus_space_handle_t,
    220  1.1     uch 			    bus_size_t, u_int8_t, bus_size_t);
    221  1.1     uch 	void		(*pbs_sr_2)(void *, bus_space_handle_t,
    222  1.1     uch 			    bus_size_t, u_int16_t, bus_size_t);
    223  1.1     uch 	void		(*pbs_sr_4)(void *, bus_space_handle_t,
    224  1.1     uch 			    bus_size_t, u_int32_t, bus_size_t);
    225  1.1     uch 	void		(*pbs_sr_8)(void *, bus_space_handle_t,
    226  1.1     uch 			    bus_size_t, u_int64_t, bus_size_t);
    227  1.1     uch 
    228  1.1     uch 	/* copy */
    229  1.1     uch 	void		(*pbs_c_1)(void *, bus_space_handle_t, bus_size_t,
    230  1.1     uch 			    bus_space_handle_t, bus_size_t, bus_size_t);
    231  1.1     uch 	void		(*pbs_c_2)(void *, bus_space_handle_t, bus_size_t,
    232  1.1     uch 			    bus_space_handle_t, bus_size_t, bus_size_t);
    233  1.1     uch 	void		(*pbs_c_4)(void *, bus_space_handle_t, bus_size_t,
    234  1.1     uch 			    bus_space_handle_t, bus_size_t, bus_size_t);
    235  1.1     uch 	void		(*pbs_c_8)(void *, bus_space_handle_t, bus_size_t,
    236  1.1     uch 			    bus_space_handle_t, bus_size_t, bus_size_t);
    237  1.1     uch };
    238  1.1     uch 
    239  1.1     uch #ifdef _KERNEL
    240  1.8   perry #define _wbflush()	__asm volatile("sync.l")
    241  1.1     uch #ifdef _PLAYSTATION2_BUS_SPACE_PRIVATE
    242  1.1     uch 
    243  1.1     uch #ifndef __read_1
    244  1.8   perry #define	__read_1(a)	(*(volatile u_int8_t *)(a))
    245  1.1     uch #endif
    246  1.1     uch #ifndef __read_2
    247  1.8   perry #define	__read_2(a)	(*(volatile u_int16_t *)(a))
    248  1.1     uch #endif
    249  1.1     uch #ifndef __read_4
    250  1.8   perry #define	__read_4(a)	(*(volatile u_int32_t *)(a))
    251  1.1     uch #endif
    252  1.1     uch #ifndef __read_8
    253  1.1     uch #define __read_8(a)							\
    254  1.1     uch ({									\
    255  1.1     uch 	u_int32_t lo, hi;						\
    256  1.8   perry 	__asm volatile(						\
    257  1.1     uch 		".set noreorder;"					\
    258  1.1     uch 		".set push;"						\
    259  1.1     uch 		".set mips3;"						\
    260  1.1     uch 		"ld	$8, (%2);"					\
    261  1.1     uch 		"dsra	%1, $8, 32;"					\
    262  1.1     uch 		"dsll	%0, $8, 32;"					\
    263  1.1     uch 		"dsra	%0, %0, 32;"					\
    264  1.1     uch 		".set pop;"						\
    265  1.1     uch 		".set reorder;"						\
    266  1.1     uch 		: "=r"(lo), "=r"(hi) : "r"(a) : "$8");			\
    267  1.1     uch 	((u_int64_t)hi << 32) | lo;					\
    268  1.1     uch })
    269  1.1     uch #endif
    270  1.1     uch #define __read_16(a)	"error. not yet"
    271  1.1     uch 
    272  1.1     uch #ifndef __write_1
    273  1.1     uch #define	__write_1(a, v) {						\
    274  1.8   perry 	*(volatile u_int8_t *)(a) = (v);				\
    275  1.1     uch 	_wbflush();							\
    276  1.1     uch }
    277  1.1     uch #endif
    278  1.1     uch #ifndef __write_2
    279  1.1     uch #define	__write_2(a, v)	{						\
    280  1.8   perry 	*(volatile u_int16_t *)(a) = (v);				\
    281  1.1     uch 	_wbflush();							\
    282  1.1     uch }
    283  1.1     uch #endif
    284  1.1     uch #ifndef __write_4
    285  1.1     uch #define	__write_4(a, v)	{						\
    286  1.8   perry 	*(volatile u_int32_t *)(a) = (v);				\
    287  1.1     uch 	_wbflush();							\
    288  1.1     uch }
    289  1.1     uch #endif
    290  1.1     uch #ifdef EE_GCC
    291  1.1     uch #ifndef __write_8
    292  1.1     uch #define	__write_8(a, v)	(*(volatile u_int64_t *)(a) = (v)) {		\
    293  1.1     uch 	_wbflush();							\
    294  1.1     uch }
    295  1.1     uch #endif
    296  1.1     uch #ifndef __write_16
    297  1.1     uch #define __write_16(a, v)	(*(volatile u_int128_t *)(a) = (v)) {	\
    298  1.1     uch 	_wbflush();							\
    299  1.1     uch }
    300  1.1     uch #endif
    301  1.1     uch #else /* EE_GCC */
    302  1.1     uch #ifdef __write_8
    303  1.1     uch #error "can't override __write_8"
    304  1.1     uch #endif
    305  1.9   perry static __inline void
    306  1.1     uch __write_8(bus_addr_t a, u_int64_t v)
    307  1.1     uch {
    308  1.8   perry 	__asm volatile(
    309  1.1     uch 		".set noreorder;"
    310  1.1     uch 		".set push;"
    311  1.1     uch 		".set r5900;"
    312  1.1     uch 		"pextlw	$8, %0, %1;"
    313  1.1     uch 		"sd	$8, 0(%2);"
    314  1.1     uch 		"sync.l;"
    315  1.1     uch 		".set pop;"
    316  1.1     uch 		".set reorder;"
    317  1.1     uch 		: : "r"((u_int32_t)((u_int64_t)(v) >> 32)),
    318  1.1     uch 		"r"((u_int32_t)(v)), "r"((u_int32_t)(a)) : "$8");
    319  1.1     uch }
    320  1.1     uch #define _write_16(a)	"error. not yet"
    321  1.1     uch #endif /* EE_GCC */
    322  1.1     uch 
    323  1.1     uch #define	__TYPENAME(BITS)	u_int##BITS##_t
    324  1.1     uch 
    325  1.1     uch #define _BUS_SPACE_READ(PREFIX, BYTES, BITS)				\
    326  1.1     uch static __TYPENAME(BITS)							\
    327  1.1     uch PREFIX##_read_##BYTES(void *, bus_space_handle_t,  bus_size_t);		\
    328  1.1     uch static __TYPENAME(BITS)							\
    329  1.1     uch PREFIX##_read_##BYTES(void *tag, bus_space_handle_t bsh,		\
    330  1.1     uch     bus_size_t offset)							\
    331  1.1     uch {									\
    332  1.3    kent 	return __read_##BYTES(VADDR(bsh, offset));			\
    333  1.1     uch }
    334  1.1     uch 
    335  1.1     uch #define _BUS_SPACE_READ_MULTI(PREFIX, BYTES, BITS)			\
    336  1.1     uch static void								\
    337  1.1     uch PREFIX##_read_multi_##BYTES(void *, bus_space_handle_t,	bus_size_t,	\
    338  1.1     uch     __TYPENAME(BITS) *,	bus_size_t);					\
    339  1.1     uch static void								\
    340  1.1     uch PREFIX##_read_multi_##BYTES(void *tag, bus_space_handle_t bsh,		\
    341  1.1     uch     bus_size_t offset, __TYPENAME(BITS) *addr, bus_size_t count)	\
    342  1.1     uch {									\
    343  1.1     uch 	bus_addr_t a = VADDR(bsh, offset);				\
    344  1.1     uch 	while (count--)							\
    345  1.3    kent 		*addr++ = __read_##BYTES(a);				\
    346  1.1     uch }
    347  1.1     uch 
    348  1.1     uch #define _BUS_SPACE_READ_REGION(PREFIX, BYTES, BITS)			\
    349  1.1     uch static void								\
    350  1.1     uch PREFIX##_read_region_##BYTES(void *, bus_space_handle_t, bus_size_t,	\
    351  1.1     uch     __TYPENAME(BITS) *, bus_size_t);					\
    352  1.1     uch static void								\
    353  1.1     uch PREFIX##_read_region_##BYTES(void *tag, bus_space_handle_t bsh,		\
    354  1.1     uch     bus_size_t offset, __TYPENAME(BITS) *addr, bus_size_t count)	\
    355  1.1     uch {									\
    356  1.1     uch 	while (count--) {						\
    357  1.3    kent 		*addr++ = __read_##BYTES(VADDR(bsh, offset));		\
    358  1.1     uch 		offset += BYTES;					\
    359  1.1     uch 	}								\
    360  1.1     uch }
    361  1.1     uch 
    362  1.1     uch #define _BUS_SPACE_WRITE(PREFIX, BYTES, BITS)				\
    363  1.1     uch static void								\
    364  1.1     uch PREFIX##_write_##BYTES(void *, bus_space_handle_t, bus_size_t,		\
    365  1.1     uch     __TYPENAME(BITS));							\
    366  1.1     uch static void								\
    367  1.1     uch PREFIX##_write_##BYTES(void *tag, bus_space_handle_t bsh,		\
    368  1.1     uch     bus_size_t offset, __TYPENAME(BITS) value)				\
    369  1.1     uch {									\
    370  1.3    kent 	__write_##BYTES(VADDR(bsh, offset), value);			\
    371  1.1     uch }
    372  1.1     uch 
    373  1.1     uch #define _BUS_SPACE_WRITE_MULTI(PREFIX, BYTES, BITS)			\
    374  1.1     uch static void								\
    375  1.1     uch PREFIX##_write_multi_##BYTES(void *, bus_space_handle_t, bus_size_t,	\
    376  1.1     uch     const __TYPENAME(BITS) *, bus_size_t);				\
    377  1.1     uch static void								\
    378  1.1     uch PREFIX##_write_multi_##BYTES(void *tag, bus_space_handle_t bsh,		\
    379  1.1     uch     bus_size_t offset, const __TYPENAME(BITS) *addr, bus_size_t count)	\
    380  1.1     uch {									\
    381  1.1     uch 	bus_addr_t a = VADDR(bsh, offset);				\
    382  1.1     uch 	while (count--) {						\
    383  1.3    kent 		__write_##BYTES(a, *addr++);				\
    384  1.1     uch 	}								\
    385  1.1     uch }
    386  1.1     uch 
    387  1.1     uch #define _BUS_SPACE_WRITE_REGION(PREFIX, BYTES, BITS)			\
    388  1.1     uch static void								\
    389  1.1     uch PREFIX##_write_region_##BYTES(void *, bus_space_handle_t, bus_size_t,	\
    390  1.1     uch     const __TYPENAME(BITS) *, bus_size_t);				\
    391  1.1     uch static void								\
    392  1.1     uch PREFIX##_write_region_##BYTES(void *tag, bus_space_handle_t bsh,	\
    393  1.1     uch     bus_size_t offset, const __TYPENAME(BITS) *addr, bus_size_t count)	\
    394  1.1     uch {									\
    395  1.1     uch 	while (count--) {						\
    396  1.3    kent 		__write_##BYTES(VADDR(bsh, offset), *addr++);		\
    397  1.1     uch 		offset += BYTES;					\
    398  1.1     uch 	}								\
    399  1.1     uch }
    400  1.1     uch 
    401  1.1     uch #define _BUS_SPACE_SET_MULTI(PREFIX, BYTES, BITS)			\
    402  1.1     uch static void								\
    403  1.1     uch PREFIX##_set_multi_##BYTES(void *, bus_space_handle_t, bus_size_t,	\
    404  1.1     uch     __TYPENAME(BITS), bus_size_t);					\
    405  1.1     uch static void								\
    406  1.1     uch PREFIX##_set_multi_##BYTES(void *tag, bus_space_handle_t bsh,		\
    407  1.1     uch     bus_size_t offset, __TYPENAME(BITS) value, bus_size_t count)	\
    408  1.1     uch {									\
    409  1.1     uch 	bus_addr_t a = VADDR(bsh, offset);				\
    410  1.1     uch 	while (count--) {						\
    411  1.3    kent 		__write_##BYTES(a, value);				\
    412  1.1     uch 	}								\
    413  1.1     uch }
    414  1.1     uch 
    415  1.1     uch #define _BUS_SPACE_SET_REGION(PREFIX, BYTES, BITS)			\
    416  1.1     uch static void								\
    417  1.1     uch PREFIX##_set_region_##BYTES(void *, bus_space_handle_t, bus_size_t,	\
    418  1.1     uch     __TYPENAME(BITS), bus_size_t);					\
    419  1.1     uch static void								\
    420  1.1     uch PREFIX##_set_region_##BYTES(void *tag, bus_space_handle_t bsh,		\
    421  1.1     uch     bus_size_t offset, __TYPENAME(BITS) value, bus_size_t count)	\
    422  1.1     uch {									\
    423  1.1     uch 	while (count--) {						\
    424  1.3    kent 		__write_##BYTES(VADDR(bsh, offset), value);		\
    425  1.1     uch 		offset += BYTES;					\
    426  1.1     uch 	}								\
    427  1.1     uch }
    428  1.1     uch 
    429  1.1     uch #define _BUS_SPACE_COPY_REGION(PREFIX, BYTES, BITS)			\
    430  1.1     uch static void								\
    431  1.1     uch PREFIX##_copy_region_##BYTES(void *, bus_space_handle_t, bus_size_t,	\
    432  1.1     uch     bus_space_handle_t, bus_size_t, bus_size_t);			\
    433  1.1     uch static void								\
    434  1.1     uch PREFIX##_copy_region_##BYTES(void *t, bus_space_handle_t h1,		\
    435  1.1     uch     bus_size_t o1, bus_space_handle_t h2, bus_size_t o2, bus_size_t c)	\
    436  1.1     uch {									\
    437  1.1     uch 	bus_size_t o;							\
    438  1.1     uch 	if ((h1 + o1) >= (h2 + o2)) {					\
    439  1.1     uch 		/* src after dest: copy forward */			\
    440  1.1     uch 		for (o = 0; c != 0; c--, o += BYTES)			\
    441  1.3    kent 			__write_##BYTES(VADDR(h2, o2 + o),		\
    442  1.3    kent 			    __read_##BYTES(VADDR(h1, o1 + o)));	\
    443  1.1     uch 	} else {							\
    444  1.1     uch 		/* dest after src: copy backwards */			\
    445  1.1     uch 		for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES)	\
    446  1.3    kent 			__write_##BYTES(VADDR(h2, o2 + o),		\
    447  1.3    kent 			    __read_##BYTES(VADDR(h1, o1 + o)));	\
    448  1.1     uch 	}								\
    449  1.1     uch }
    450  1.1     uch 
    451  1.1     uch #define _BUS_SPACE_NO_MAP						\
    452  1.1     uch 	(int (*)(void *, bus_addr_t, bus_size_t, int,			\
    453  1.1     uch 	bus_space_handle_t *))_bus_space_invalid_access
    454  1.1     uch #define _BUS_SPACE_NO_UNMAP						\
    455  1.1     uch 	(void (*)(void *, bus_space_handle_t, bus_size_t))		\
    456  1.1     uch 	_bus_space_invalid_access
    457  1.1     uch #define _BUS_SPACE_NO_SUBREGION						\
    458  1.1     uch 	(int (*)(void *, bus_space_handle_t, bus_size_t, bus_size_t,	\
    459  1.1     uch 	bus_space_handle_t *))_bus_space_invalid_access
    460  1.1     uch #define _BUS_SPACE_NO_ALLOC						\
    461  1.1     uch 	(int (*)(void *, bus_addr_t, bus_addr_t, bus_size_t, bus_size_t,\
    462  1.1     uch 	 bus_size_t, int, bus_addr_t *,	bus_space_handle_t *))		\
    463  1.1     uch 	_bus_space_invalid_access
    464  1.1     uch #define _BUS_SPACE_NO_FREE						\
    465  1.1     uch 	(void (*)(void *, bus_space_handle_t, bus_size_t))		\
    466  1.1     uch 	_bus_space_invalid_access
    467  1.1     uch #define _BUS_SPACE_NO_VADDR						\
    468  1.1     uch 	(void *(*)(void *, bus_space_handle_t))_bus_space_invalid_access
    469  1.1     uch #define _BUS_SPACE_NO_READ(BYTES, BITS)					\
    470  1.1     uch 	(u_int##BITS##_t (*)(void *, bus_space_handle_t, bus_size_t))	\
    471  1.1     uch 	_bus_space_invalid_access
    472  1.1     uch #define _BUS_SPACE_NO_READ_MULTI(BYTES, BITS)				\
    473  1.1     uch 	(void (*)(void *, bus_space_handle_t, bus_size_t,		\
    474  1.1     uch 	u_int##BITS##_t *, bus_size_t))_bus_space_invalid_access
    475  1.1     uch #define _BUS_SPACE_NO_READ_REGION(BYTES, BITS)				\
    476  1.1     uch 	(void (*)(void *, bus_space_handle_t, bus_size_t,		\
    477  1.1     uch 	u_int##BITS##_t *, bus_size_t))_bus_space_invalid_access
    478  1.1     uch #define _BUS_SPACE_NO_WRITE(BYTES, BITS)				\
    479  1.1     uch 	(void (*)(void *, bus_space_handle_t, bus_size_t,		\
    480  1.1     uch 	u_int##BITS##_t))_bus_space_invalid_access
    481  1.1     uch #define _BUS_SPACE_NO_WRITE_MULTI(BYTES, BITS)				\
    482  1.1     uch 	(void (*)(void *, bus_space_handle_t, bus_size_t,		\
    483  1.1     uch 	const u_int##BITS##_t *, bus_size_t))_bus_space_invalid_access
    484  1.1     uch #define _BUS_SPACE_NO_WRITE_REGION(BYTES, BITS)				\
    485  1.1     uch 	(void (*)(void *, bus_space_handle_t, bus_size_t,		\
    486  1.1     uch 	const u_int##BITS##_t *, bus_size_t))_bus_space_invalid_access
    487  1.1     uch #define _BUS_SPACE_NO_SET_MULTI(BYTES, BITS)				\
    488  1.1     uch 	(void (*)(void *, bus_space_handle_t, bus_size_t,		\
    489  1.1     uch 	u_int##BITS##_t, bus_size_t))_bus_space_invalid_access
    490  1.1     uch #define _BUS_SPACE_NO_SET_REGION(BYTES, BITS)				\
    491  1.1     uch 	(void (*)(void *, bus_space_handle_t, bus_size_t,		\
    492  1.1     uch 	u_int##BITS##_t, bus_size_t))_bus_space_invalid_access
    493  1.1     uch #define _BUS_SPACE_NO_COPY_REGION(BYTES, BITS)				\
    494  1.1     uch 	(void (*)(void *, bus_space_handle_t, bus_size_t,		\
    495  1.1     uch 	bus_space_handle_t, bus_size_t, bus_size_t))_bus_space_invalid_access
    496  1.1     uch 
    497  1.1     uch void _bus_space_invalid_access(void);
    498  1.1     uch #endif /* _PLAYSTATION2_BUS_SPACE_PRIVATE */
    499  1.1     uch 
    500  1.1     uch #define	__pbs_c(a,b)		__CONCAT(a,b)
    501  1.1     uch #define	__pbs_opname(op,size)	__pbs_c(__pbs_c(__pbs_c(pbs_,op),_),size)
    502  1.1     uch 
    503  1.1     uch #define	__pbs_rs(sz, tn, t, h, o)					\
    504  1.1     uch 	(__BUS_SPACE_ADDRESS_SANITY((h) + (o), tn, "bus addr"),		\
    505  1.1     uch 	 (*(t)->__pbs_opname(r,sz))((t)->pbs_cookie, h, o))
    506  1.1     uch 
    507  1.1     uch #define	__pbs_ws(sz, tn, t, h, o, v)					\
    508  1.1     uch ({									\
    509  1.1     uch 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), tn, "bus addr");		\
    510  1.1     uch 	(*(t)->__pbs_opname(w,sz))((t)->pbs_cookie, h, o, v);		\
    511  1.1     uch })
    512  1.1     uch 
    513  1.1     uch #define	__pbs_nonsingle(type, sz, tn, t, h, o, a, c)			\
    514  1.1     uch ({									\
    515  1.1     uch 	__BUS_SPACE_ADDRESS_SANITY((a), tn, "buffer");			\
    516  1.1     uch 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), tn, "bus addr");		\
    517  1.1     uch 	(*(t)->__pbs_opname(type,sz))((t)->pbs_cookie, h, o, a, c);	\
    518  1.1     uch })
    519  1.1     uch 
    520  1.1     uch #define	__pbs_set(type, sz, tn, t, h, o, v, c)				\
    521  1.1     uch ({									\
    522  1.1     uch 	__BUS_SPACE_ADDRESS_SANITY((h) + (o), tn, "bus addr");		\
    523  1.1     uch 	(*(t)->__pbs_opname(type,sz))((t)->pbs_cookie, h, o, v, c);	\
    524  1.1     uch })
    525  1.1     uch 
    526  1.1     uch #define	__pbs_copy(sz, tn, t, h1, o1, h2, o2, cnt)			\
    527  1.1     uch ({									\
    528  1.1     uch 	__BUS_SPACE_ADDRESS_SANITY((h1) + (o1), tn, "bus addr 1");	\
    529  1.1     uch 	__BUS_SPACE_ADDRESS_SANITY((h2) + (o2), tn, "bus addr 2");	\
    530  1.1     uch 	(*(t)->__pbs_opname(c,sz))((t)->pbs_cookie, h1, o1, h2, o2, cnt); \
    531  1.1     uch })
    532  1.1     uch 
    533  1.1     uch /*
    534  1.1     uch  * Create default bus_space tag.
    535  1.1     uch  */
    536  1.1     uch bus_space_tag_t bus_space_create(bus_space_tag_t, const char *, bus_addr_t,
    537  1.1     uch     bus_size_t);
    538  1.1     uch void bus_space_destroy(bus_space_tag_t);
    539  1.1     uch 
    540  1.1     uch /*
    541  1.1     uch  * Mapping and unmapping operations.
    542  1.1     uch  */
    543  1.1     uch #define	bus_space_map(t, a, s, f, hp)					\
    544  1.1     uch 	(*(t)->pbs_map)((t)->pbs_cookie, (a), (s), (f), (hp))
    545  1.1     uch #define	bus_space_unmap(t, h, s)					\
    546  1.1     uch 	(*(t)->pbs_unmap)((t)->pbs_cookie, (h), (s))
    547  1.1     uch #define	bus_space_subregion(t, h, o, s, hp)				\
    548  1.1     uch 	(*(t)->pbs_subregion)((t)->pbs_cookie, (h), (o), (s), (hp))
    549  1.1     uch 
    550  1.1     uch #endif /* _KERNEL */
    551  1.1     uch 
    552  1.1     uch #define	BUS_SPACE_MAP_CACHEABLE		0x01
    553  1.1     uch #define	BUS_SPACE_MAP_LINEAR		0x02
    554  1.1     uch #define	BUS_SPACE_MAP_PREFETCHABLE     	0x04
    555  1.1     uch 
    556  1.1     uch #ifdef _KERNEL
    557  1.1     uch /*
    558  1.1     uch  * Allocation and deallocation operations.
    559  1.1     uch  */
    560  1.1     uch #define	bus_space_alloc(t, rs, re, s, a, b, f, ap, hp)			\
    561  1.1     uch 	(*(t)->pbs_alloc)((t)->pbs_cookie, (rs), (re), (s), (a), (b),	\
    562  1.1     uch 	    (f), (ap), (hp))
    563  1.1     uch #define	bus_space_free(t, h, s)						\
    564  1.1     uch 	(*(t)->pbs_free)((t)->pbs_cookie, (h), (s))
    565  1.1     uch 
    566  1.1     uch /*
    567  1.1     uch  * Get kernel virtual address for ranges mapped BUS_SPACE_MAP_LINEAR.
    568  1.1     uch  */
    569  1.1     uch #define bus_space_vaddr(t, h)						\
    570  1.1     uch 	(*(t)->pbs_vaddr)((t)->pbs_cookie, (h))
    571  1.1     uch 
    572  1.1     uch /*
    573  1.1     uch  * Bus barrier operations.  The playstation2 does not currently require
    574  1.1     uch  * barriers, but we must provide the flags to MI code.
    575  1.1     uch  */
    576  1.1     uch #define	bus_space_barrier(t, h, o, l, f)				\
    577  1.1     uch ({									\
    578  1.1     uch 	_wbflush();							\
    579  1.1     uch })
    580  1.1     uch 
    581  1.1     uch 
    582  1.1     uch #define	BUS_SPACE_BARRIER_READ	0x01
    583  1.1     uch #define	BUS_SPACE_BARRIER_WRITE	0x02
    584  1.1     uch 
    585  1.1     uch 
    586  1.1     uch /*
    587  1.1     uch  * Bus read (single) operations.
    588  1.1     uch  */
    589  1.1     uch #define	bus_space_read_1(t, h, o)	__pbs_rs(1,u_int8_t,(t),(h),(o))
    590  1.1     uch #define	bus_space_read_2(t, h, o)	__pbs_rs(2,u_int16_t,(t),(h),(o))
    591  1.1     uch #define	bus_space_read_4(t, h, o)	__pbs_rs(4,u_int32_t,(t),(h),(o))
    592  1.1     uch #define	bus_space_read_8(t, h, o)	__pbs_rs(8,u_int64_t,(t),(h),(o))
    593  1.1     uch 
    594  1.1     uch 
    595  1.1     uch /*
    596  1.1     uch  * Bus read multiple operations.
    597  1.1     uch  */
    598  1.1     uch #define	bus_space_read_multi_1(t, h, o, a, c)				\
    599  1.1     uch 	__pbs_nonsingle(rm,1,u_int8_t,(t),(h),(o),(a),(c))
    600  1.1     uch #define	bus_space_read_multi_2(t, h, o, a, c)				\
    601  1.1     uch 	__pbs_nonsingle(rm,2,u_int16_t,(t),(h),(o),(a),(c))
    602  1.1     uch #define	bus_space_read_multi_4(t, h, o, a, c)				\
    603  1.1     uch 	__pbs_nonsingle(rm,4,u_int32_t,(t),(h),(o),(a),(c))
    604  1.1     uch #define	bus_space_read_multi_8(t, h, o, a, c)				\
    605  1.1     uch 	__pbs_nonsingle(rm,8,u_int64_t,(t),(h),(o),(a),(c))
    606  1.1     uch 
    607  1.1     uch 
    608  1.1     uch /*
    609  1.1     uch  * Bus read region operations.
    610  1.1     uch  */
    611  1.1     uch #define	bus_space_read_region_1(t, h, o, a, c)				\
    612  1.1     uch 	__pbs_nonsingle(rr,1,u_int8_t,(t),(h),(o),(a),(c))
    613  1.1     uch #define	bus_space_read_region_2(t, h, o, a, c)				\
    614  1.1     uch 	__pbs_nonsingle(rr,2,u_int16_t,(t),(h),(o),(a),(c))
    615  1.1     uch #define	bus_space_read_region_4(t, h, o, a, c)				\
    616  1.1     uch 	__pbs_nonsingle(rr,4,u_int32_t,(t),(h),(o),(a),(c))
    617  1.1     uch #define	bus_space_read_region_8(t, h, o, a, c)				\
    618  1.1     uch 	__pbs_nonsingle(rr,8,u_int64_t,(t),(h),(o),(a),(c))
    619  1.1     uch 
    620  1.1     uch 
    621  1.1     uch /*
    622  1.1     uch  * Bus write (single) operations.
    623  1.1     uch  */
    624  1.1     uch #define	bus_space_write_1(t, h, o, v)	__pbs_ws(1,u_int8_t,(t),(h),(o),(v))
    625  1.1     uch #define	bus_space_write_2(t, h, o, v)	__pbs_ws(2,u_int16_t,(t),(h),(o),(v))
    626  1.1     uch #define	bus_space_write_4(t, h, o, v)	__pbs_ws(4,u_int32_t,(t),(h),(o),(v))
    627  1.1     uch #define	bus_space_write_8(t, h, o, v)	__pbs_ws(8,u_int64_t,(t),(h),(o),(v))
    628  1.1     uch 
    629  1.1     uch 
    630  1.1     uch /*
    631  1.1     uch  * Bus write multiple operations.
    632  1.1     uch  */
    633  1.1     uch #define	bus_space_write_multi_1(t, h, o, a, c)				\
    634  1.1     uch 	__pbs_nonsingle(wm,1,u_int8_t,(t),(h),(o),(a),(c))
    635  1.1     uch #define	bus_space_write_multi_2(t, h, o, a, c)				\
    636  1.1     uch 	__pbs_nonsingle(wm,2,u_int16_t,(t),(h),(o),(a),(c))
    637  1.1     uch #define	bus_space_write_multi_4(t, h, o, a, c)				\
    638  1.1     uch 	__pbs_nonsingle(wm,4,u_int32_t,(t),(h),(o),(a),(c))
    639  1.1     uch #define	bus_space_write_multi_8(t, h, o, a, c)				\
    640  1.1     uch 	__pbs_nonsingle(wm,8,u_int64_t,(t),(h),(o),(a),(c))
    641  1.1     uch 
    642  1.1     uch 
    643  1.1     uch /*
    644  1.1     uch  * Bus write region operations.
    645  1.1     uch  */
    646  1.1     uch #define	bus_space_write_region_1(t, h, o, a, c)				\
    647  1.1     uch 	__pbs_nonsingle(wr,1,u_int8_t,(t),(h),(o),(a),(c))
    648  1.1     uch #define	bus_space_write_region_2(t, h, o, a, c)				\
    649  1.1     uch 	__pbs_nonsingle(wr,2,u_int16_t,(t),(h),(o),(a),(c))
    650  1.1     uch #define	bus_space_write_region_4(t, h, o, a, c)				\
    651  1.1     uch 	__pbs_nonsingle(wr,4,u_int32_t,(t),(h),(o),(a),(c))
    652  1.1     uch #define	bus_space_write_region_8(t, h, o, a, c)				\
    653  1.1     uch 	__pbs_nonsingle(wr,8,u_int64_t,(t),(h),(o),(a),(c))
    654  1.1     uch 
    655  1.1     uch 
    656  1.1     uch /*
    657  1.1     uch  * Set multiple operations.
    658  1.1     uch  */
    659  1.1     uch #define	bus_space_set_multi_1(t, h, o, v, c)				\
    660  1.1     uch 	__pbs_set(sm,1,u_int8_t,(t),(h),(o),(v),(c))
    661  1.1     uch #define	bus_space_set_multi_2(t, h, o, v, c)				\
    662  1.1     uch 	__pbs_set(sm,2,u_int16_t,(t),(h),(o),(v),(c))
    663  1.1     uch #define	bus_space_set_multi_4(t, h, o, v, c)				\
    664  1.1     uch 	__pbs_set(sm,4,u_int32_t,(t),(h),(o),(v),(c))
    665  1.1     uch #define	bus_space_set_multi_8(t, h, o, v, c)				\
    666  1.1     uch 	__pbs_set(sm,8,u_int64_t,(t),(h),(o),(v),(c))
    667  1.1     uch 
    668  1.1     uch 
    669  1.1     uch /*
    670  1.1     uch  * Set region operations.
    671  1.1     uch  */
    672  1.1     uch #define	bus_space_set_region_1(t, h, o, v, c)				\
    673  1.1     uch 	__pbs_set(sr,1,u_int8_t,(t),(h),(o),(v),(c))
    674  1.1     uch #define	bus_space_set_region_2(t, h, o, v, c)				\
    675  1.1     uch 	__pbs_set(sr,2,u_int16_t,(t),(h),(o),(v),(c))
    676  1.1     uch #define	bus_space_set_region_4(t, h, o, v, c)				\
    677  1.1     uch 	__pbs_set(sr,4,u_int32_t,(t),(h),(o),(v),(c))
    678  1.1     uch #define	bus_space_set_region_8(t, h, o, v, c)				\
    679  1.1     uch 	__pbs_set(sr,8,u_int64_t,(t),(h),(o),(v),(c))
    680  1.1     uch 
    681  1.1     uch 
    682  1.1     uch /*
    683  1.1     uch  * Copy region operations.
    684  1.1     uch  */
    685  1.1     uch #define	bus_space_copy_region_1(t, h1, o1, h2, o2, c)			\
    686  1.1     uch 	__pbs_copy(1, u_int8_t, (t), (h1), (o1), (h2), (o2), (c))
    687  1.1     uch #define	bus_space_copy_region_2(t, h1, o1, h2, o2, c)			\
    688  1.1     uch 	__pbs_copy(2, u_int16_t, (t), (h1), (o1), (h2), (o2), (c))
    689  1.1     uch #define	bus_space_copy_region_4(t, h1, o1, h2, o2, c)			\
    690  1.1     uch 	__pbs_copy(4, u_int32_t, (t), (h1), (o1), (h2), (o2), (c))
    691  1.1     uch #define	bus_space_copy_region_8(t, h1, o1, h2, o2, c)			\
    692  1.1     uch 	__pbs_copy(8, u_int64_t, (t), (h1), (o1), (h2), (o2), (c))
    693  1.1     uch 
    694  1.1     uch /*
    695  1.1     uch  * Bus stream operations--defined in terms of non-stream counterparts
    696  1.1     uch  */
    697  1.1     uch #define __BUS_SPACE_HAS_STREAM_METHODS 1
    698  1.1     uch #define bus_space_read_stream_1 bus_space_read_1
    699  1.1     uch #define bus_space_read_stream_2 bus_space_read_2
    700  1.1     uch #define bus_space_read_stream_4 bus_space_read_4
    701  1.1     uch #define	bus_space_read_stream_8 bus_space_read_8
    702  1.1     uch #define bus_space_read_multi_stream_1 bus_space_read_multi_1
    703  1.1     uch #define bus_space_read_multi_stream_2 bus_space_read_multi_2
    704  1.1     uch #define bus_space_read_multi_stream_4 bus_space_read_multi_4
    705  1.1     uch #define	bus_space_read_multi_stream_8 bus_space_read_multi_8
    706  1.1     uch #define bus_space_read_region_stream_1 bus_space_read_region_1
    707  1.1     uch #define bus_space_read_region_stream_2 bus_space_read_region_2
    708  1.1     uch #define bus_space_read_region_stream_4 bus_space_read_region_4
    709  1.1     uch #define	bus_space_read_region_stream_8 bus_space_read_region_8
    710  1.1     uch #define bus_space_write_stream_1 bus_space_write_1
    711  1.1     uch #define bus_space_write_stream_2 bus_space_write_2
    712  1.1     uch #define bus_space_write_stream_4 bus_space_write_4
    713  1.1     uch #define	bus_space_write_stream_8 bus_space_write_8
    714  1.1     uch #define bus_space_write_multi_stream_1 bus_space_write_multi_1
    715  1.1     uch #define bus_space_write_multi_stream_2 bus_space_write_multi_2
    716  1.1     uch #define bus_space_write_multi_stream_4 bus_space_write_multi_4
    717  1.1     uch #define	bus_space_write_multi_stream_8 bus_space_write_multi_8
    718  1.1     uch #define bus_space_write_region_stream_1 bus_space_write_region_1
    719  1.1     uch #define bus_space_write_region_stream_2 bus_space_write_region_2
    720  1.1     uch #define bus_space_write_region_stream_4 bus_space_write_region_4
    721  1.1     uch #define	bus_space_write_region_stream_8	bus_space_write_region_8
    722  1.1     uch 
    723  1.1     uch #endif /* _KERNEL */
    724  1.1     uch 
    725  1.1     uch /*
    726  1.1     uch  * Flags used in various bus DMA methods.
    727  1.1     uch  */
    728  1.1     uch #define	BUS_DMA_WAITOK		0x000	/* safe to sleep (pseudo-flag) */
    729  1.1     uch #define	BUS_DMA_NOWAIT		0x001	/* not safe to sleep */
    730  1.1     uch #define	BUS_DMA_ALLOCNOW	0x002	/* perform resource allocation now */
    731  1.1     uch #define	BUS_DMA_COHERENT	0x004	/* hint: map memory DMA coherent */
    732  1.1     uch #define	BUS_DMA_STREAMING	0x008	/* hint: sequential, unidirectional */
    733  1.1     uch #define	BUS_DMA_BUS1		0x010	/* placeholders for bus functions... */
    734  1.1     uch #define	BUS_DMA_BUS2		0x020
    735  1.1     uch #define	BUS_DMA_BUS3		0x040
    736  1.1     uch #define	BUS_DMA_BUS4		0x080
    737  1.1     uch #define	BUS_DMA_READ		0x100	/* mapping is device -> memory only */
    738  1.1     uch #define	BUS_DMA_WRITE		0x200	/* mapping is memory -> device only */
    739  1.4    kent #define	BUS_DMA_NOCACHE		0x400	/* hint: map non-cached memory */
    740  1.1     uch 
    741  1.2  simonb #define	PLAYSTATION2_DMAMAP_COHERENT	0x10000	/* no cache flush necessary on sync */
    742  1.1     uch 
    743  1.1     uch /* Forwards needed by prototypes below. */
    744  1.1     uch struct mbuf;
    745  1.1     uch struct uio;
    746  1.1     uch 
    747  1.1     uch /*
    748  1.1     uch  * Operations performed by bus_dmamap_sync().
    749  1.1     uch  */
    750  1.1     uch #define	BUS_DMASYNC_PREREAD	0x01	/* pre-read synchronization */
    751  1.1     uch #define	BUS_DMASYNC_POSTREAD	0x02	/* post-read synchronization */
    752  1.1     uch #define	BUS_DMASYNC_PREWRITE	0x04	/* pre-write synchronization */
    753  1.1     uch #define	BUS_DMASYNC_POSTWRITE	0x08	/* post-write synchronization */
    754  1.1     uch 
    755  1.1     uch typedef struct playstation2_bus_dma_tag		*bus_dma_tag_t;
    756  1.1     uch typedef struct playstation2_bus_dmamap		*bus_dmamap_t;
    757  1.5    fvdl 
    758  1.5    fvdl #define BUS_DMA_TAG_VALID(t)    ((t) != (bus_dma_tag_t)0)
    759  1.1     uch 
    760  1.1     uch /*
    761  1.1     uch  *	bus_dma_segment_t
    762  1.1     uch  *
    763  1.1     uch  *	Describes a single contiguous DMA transaction.  Values
    764  1.1     uch  *	are suitable for programming into DMA registers.
    765  1.1     uch  */
    766  1.1     uch struct playstation2_bus_dma_segment {
    767  1.1     uch 	bus_addr_t	ds_addr;	/* DMA address */
    768  1.1     uch 	bus_size_t	ds_len;		/* length of transfer */
    769  1.1     uch 	bus_addr_t	_ds_vaddr;	/* virtual address, 0 if invalid */
    770  1.1     uch };
    771  1.1     uch typedef struct playstation2_bus_dma_segment	bus_dma_segment_t;
    772  1.1     uch 
    773  1.1     uch /*
    774  1.1     uch  *	bus_dma_tag_t
    775  1.1     uch  *
    776  1.1     uch  *	A machine-dependent opaque type describing the implementation of
    777  1.1     uch  *	DMA for a given bus.
    778  1.1     uch  */
    779  1.1     uch 
    780  1.1     uch struct playstation2_bus_dma_tag {
    781  1.1     uch 	/*
    782  1.1     uch 	 * DMA mapping methods.
    783  1.1     uch 	 */
    784  1.1     uch 	int	(*_dmamap_create)(bus_dma_tag_t, bus_size_t, int,
    785  1.1     uch 		    bus_size_t, bus_size_t, int, bus_dmamap_t *);
    786  1.1     uch 	void	(*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t);
    787  1.1     uch 	int	(*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *,
    788  1.1     uch 		    bus_size_t, struct proc *, int);
    789  1.1     uch 	int	(*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t,
    790  1.1     uch 		    struct mbuf *, int);
    791  1.1     uch 	int	(*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t,
    792  1.1     uch 		    struct uio *, int);
    793  1.1     uch 	int	(*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t,
    794  1.1     uch 		    bus_dma_segment_t *, int, bus_size_t, int);
    795  1.1     uch 	void	(*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t);
    796  1.1     uch 	void	(*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t,
    797  1.1     uch 		    bus_addr_t, bus_size_t, int);
    798  1.1     uch 
    799  1.1     uch 	/*
    800  1.1     uch 	 * DMA memory utility functions.
    801  1.1     uch 	 */
    802  1.1     uch 	int	(*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t,
    803  1.1     uch 		    bus_size_t, bus_dma_segment_t *, int, int *, int);
    804  1.1     uch 	void	(*_dmamem_free)(bus_dma_tag_t,
    805  1.1     uch 		    bus_dma_segment_t *, int);
    806  1.1     uch 	int	(*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *,
    807  1.1     uch 		    int, size_t, caddr_t *, int);
    808  1.1     uch 	void	(*_dmamem_unmap)(bus_dma_tag_t, caddr_t, size_t);
    809  1.1     uch 	paddr_t	(*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *,
    810  1.1     uch 		    int, off_t, int, int);
    811  1.1     uch 
    812  1.1     uch 	/*
    813  1.1     uch 	 * DMA controller private.
    814  1.1     uch 	 */
    815  1.1     uch 	void	*_dmachip_cookie;
    816  1.1     uch };
    817  1.1     uch 
    818  1.1     uch #define	bus_dmamap_create(t, s, n, m, b, f, p)			\
    819  1.1     uch 	(*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
    820  1.1     uch #define	bus_dmamap_destroy(t, p)				\
    821  1.1     uch 	(*(t)->_dmamap_destroy)((t), (p))
    822  1.1     uch #define	bus_dmamap_load(t, m, b, s, p, f)			\
    823  1.1     uch 	(*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
    824  1.1     uch #define	bus_dmamap_load_mbuf(t, m, b, f)			\
    825  1.1     uch 	(*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
    826  1.1     uch #define	bus_dmamap_load_uio(t, m, u, f)				\
    827  1.1     uch 	(*(t)->_dmamap_load_uio)((t), (m), (u), (f))
    828  1.1     uch #define	bus_dmamap_load_raw(t, m, sg, n, s, f)			\
    829  1.1     uch 	(*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
    830  1.1     uch #define	bus_dmamap_unload(t, p)					\
    831  1.1     uch 	(*(t)->_dmamap_unload)((t), (p))
    832  1.1     uch #define	bus_dmamap_sync(t, p, o, l, ops)			\
    833  1.1     uch 	(*(t)->_dmamap_sync)((t), (p), (o), (l), (ops))
    834  1.1     uch 
    835  1.1     uch #define	bus_dmamem_alloc(t, s, a, b, sg, n, r, f)		\
    836  1.1     uch 	(*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
    837  1.1     uch #define	bus_dmamem_free(t, sg, n)				\
    838  1.1     uch 	(*(t)->_dmamem_free)((t), (sg), (n))
    839  1.1     uch #define	bus_dmamem_map(t, sg, n, s, k, f)			\
    840  1.1     uch 	(*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
    841  1.1     uch #define	bus_dmamem_unmap(t, k, s)				\
    842  1.1     uch 	(*(t)->_dmamem_unmap)((t), (k), (s))
    843  1.1     uch #define	bus_dmamem_mmap(t, sg, n, o, p, f)			\
    844  1.1     uch 	(*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
    845  1.1     uch 
    846  1.1     uch /*
    847  1.1     uch  *	bus_dmamap_t
    848  1.1     uch  *
    849  1.1     uch  *	Describes a DMA mapping.
    850  1.1     uch  */
    851  1.1     uch struct playstation2_bus_dmamap {
    852  1.1     uch 	/*
    853  1.1     uch 	 * PRIVATE MEMBERS: not for use my machine-independent code.
    854  1.1     uch 	 */
    855  1.1     uch 	bus_size_t	_dm_size;	/* largest DMA transfer mappable */
    856  1.1     uch 	int		_dm_segcnt;	/* number of segs this map can map */
    857  1.6    matt 	bus_size_t	_dm_maxmaxsegsz; /* fixed largest possible segment */
    858  1.1     uch 	bus_size_t	_dm_boundary;	/* don't cross this */
    859  1.1     uch 	int		_dm_flags;	/* misc. flags */
    860  1.1     uch 
    861  1.1     uch 	/*
    862  1.1     uch 	 * PUBLIC MEMBERS: these are used by machine-independent code.
    863  1.1     uch 	 */
    864  1.6    matt 	bus_size_t	dm_maxsegsz;	/* largest possible segment */
    865  1.1     uch 	bus_size_t	dm_mapsize;	/* size of the mapping */
    866  1.1     uch 	int		dm_nsegs;	/* # valid segments in mapping */
    867  1.1     uch 	bus_dma_segment_t dm_segs[1];	/* segments; variable length */
    868  1.1     uch };
    869  1.1     uch 
    870  1.1     uch #ifdef _PLAYSTATION2_BUS_DMA_PRIVATE
    871  1.1     uch int	_bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t,
    872  1.1     uch 	    bus_size_t, int, bus_dmamap_t *);
    873  1.1     uch void	_bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
    874  1.1     uch int	_bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *,
    875  1.1     uch 	    bus_size_t, struct proc *, int);
    876  1.1     uch int	_bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t,
    877  1.1     uch 	    struct mbuf *, int);
    878  1.1     uch int	_bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t,
    879  1.1     uch 	    struct uio *, int);
    880  1.1     uch int	_bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t,
    881  1.1     uch 	    bus_dma_segment_t *, int, bus_size_t, int);
    882  1.1     uch void	_bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
    883  1.1     uch void	_bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
    884  1.1     uch 	    bus_size_t, int);
    885  1.1     uch 
    886  1.1     uch int	_bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size,
    887  1.1     uch 	    bus_size_t alignment, bus_size_t boundary,
    888  1.1     uch 	    bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags);
    889  1.1     uch void	_bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs,
    890  1.1     uch 	    int nsegs);
    891  1.1     uch int	_bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs,
    892  1.1     uch 	    int nsegs, size_t size, caddr_t *kvap, int flags);
    893  1.1     uch void	_bus_dmamem_unmap(bus_dma_tag_t tag, caddr_t kva,
    894  1.1     uch 	    size_t size);
    895  1.1     uch paddr_t	_bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs,
    896  1.1     uch 	    int nsegs, off_t off, int prot, int flags);
    897  1.1     uch 
    898  1.1     uch int	_bus_dmamem_alloc_range(bus_dma_tag_t tag, bus_size_t size,
    899  1.1     uch 	    bus_size_t alignment, bus_size_t boundary,
    900  1.1     uch 	    bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags,
    901  1.1     uch 	    vaddr_t low, vaddr_t high);
    902  1.1     uch 
    903  1.1     uch extern struct playstation2_bus_dma_tag playstation2_default_bus_dma_tag;
    904  1.1     uch #endif /* _PLAYSTATION2_BUS_DMA_PRIVATE */
    905  1.1     uch 
    906  1.1     uch #endif /* _PLAYSTATION2_BUS_H_ */
    907