bus.h revision 1.15
1 /* $NetBSD: bus.h,v 1.15 2014/07/04 07:59:17 martin Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998, 2000, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Copyright (c) 1996 Carnegie-Mellon University. 35 * All rights reserved. 36 * 37 * Author: Chris G. Demetriou 38 * 39 * Permission to use, copy, modify and distribute this software and 40 * its documentation is hereby granted, provided that both the copyright 41 * notice and this permission notice appear in all copies of the 42 * software, derivative works or modified versions, and any portions 43 * thereof, and that both notices appear in supporting documentation. 44 * 45 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 46 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 47 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 48 * 49 * Carnegie Mellon requests users of this software to return to 50 * 51 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 52 * School of Computer Science 53 * Carnegie Mellon University 54 * Pittsburgh PA 15213-3890 55 * 56 * any improvements or extensions that they make and grant Carnegie the 57 * rights to redistribute these changes. 58 */ 59 60 #ifndef _PLAYSTATION2_BUS_H_ 61 #define _PLAYSTATION2_BUS_H_ 62 63 #include <sys/types.h> 64 65 #ifdef _KERNEL 66 /* 67 * Turn on BUS_SPACE_DEBUG if the global DEBUG option is enabled. 68 */ 69 #if defined(DEBUG) && !defined(BUS_SPACE_DEBUG) 70 #define BUS_SPACE_DEBUG 71 #endif 72 73 #ifdef BUS_SPACE_DEBUG 74 #include <sys/systm.h> /* for printf() prototype */ 75 /* 76 * Macros for checking the aligned-ness of pointers passed to bus 77 * space ops. Strict alignment is required by the MIPS architecture, 78 * and a trap will occur if unaligned access is performed. These 79 * may aid in the debugging of a broken device driver by displaying 80 * useful information about the problem. 81 */ 82 #define __BUS_SPACE_ALIGNED_ADDRESS(p, t) \ 83 ((((u_int32_t)(p)) & (sizeof(t)-1)) == 0) 84 85 #define __BUS_SPACE_ADDRESS_SANITY(p, t, d) \ 86 ({ \ 87 if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) { \ 88 printf("%s 0x%x not aligned to %u bytes %s:%d\n", \ 89 d, (u_int32_t)(p), (u_int32_t)sizeof(t), __FILE__, \ 90 __LINE__); \ 91 } \ 92 (void) 0; \ 93 }) 94 95 #define BUS_SPACE_ALIGNED_POINTER(p, t) __BUS_SPACE_ALIGNED_ADDRESS(p, t) 96 #else 97 #define __BUS_SPACE_ADDRESS_SANITY(p, t, d) (void) 0 98 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t) 99 #endif /* BUS_SPACE_DEBUG */ 100 #endif /* _KERNEL */ 101 102 /* 103 * Addresses (in bus space). 104 */ 105 typedef long bus_addr_t; 106 typedef long bus_size_t; 107 108 /* 109 * Access methods for bus space. 110 */ 111 typedef const struct playstation2_bus_space *bus_space_tag_t; 112 typedef bus_addr_t bus_space_handle_t; 113 114 struct extent; /* forward declaration */ 115 116 struct playstation2_bus_space { 117 struct extent *pbs_extent; 118 bus_addr_t pbs_base_addr; 119 120 /* cookie */ 121 void *pbs_cookie; 122 123 /* mapping/unmapping */ 124 int (*pbs_map)(void *, bus_addr_t, bus_size_t, 125 int, bus_space_handle_t *); 126 void (*pbs_unmap)(void *, bus_space_handle_t, 127 bus_size_t); 128 int (*pbs_subregion)(void *, bus_space_handle_t, 129 bus_size_t, bus_size_t, bus_space_handle_t *); 130 131 /* allocation/deallocation */ 132 int (*pbs_alloc)(void *, bus_addr_t, bus_addr_t, 133 bus_size_t, bus_size_t, bus_size_t, int, 134 bus_addr_t *, bus_space_handle_t *); 135 void (*pbs_free)(void *, bus_space_handle_t, 136 bus_size_t); 137 138 /* get kernel virtual address */ 139 void * (*pbs_vaddr)(void *, bus_space_handle_t); 140 141 /* read (single) */ 142 u_int8_t (*pbs_r_1)(void *, bus_space_handle_t, 143 bus_size_t); 144 u_int16_t (*pbs_r_2)(void *, bus_space_handle_t, 145 bus_size_t); 146 u_int32_t (*pbs_r_4)(void *, bus_space_handle_t, 147 bus_size_t); 148 u_int64_t (*pbs_r_8)(void *, bus_space_handle_t, 149 bus_size_t); 150 151 /* read multiple */ 152 void (*pbs_rm_1)(void *, bus_space_handle_t, 153 bus_size_t, u_int8_t *, bus_size_t); 154 void (*pbs_rm_2)(void *, bus_space_handle_t, 155 bus_size_t, u_int16_t *, bus_size_t); 156 void (*pbs_rm_4)(void *, bus_space_handle_t, 157 bus_size_t, u_int32_t *, bus_size_t); 158 void (*pbs_rm_8)(void *, bus_space_handle_t, 159 bus_size_t, u_int64_t *, bus_size_t); 160 161 /* read region */ 162 void (*pbs_rr_1)(void *, bus_space_handle_t, 163 bus_size_t, u_int8_t *, bus_size_t); 164 void (*pbs_rr_2)(void *, bus_space_handle_t, 165 bus_size_t, u_int16_t *, bus_size_t); 166 void (*pbs_rr_4)(void *, bus_space_handle_t, 167 bus_size_t, u_int32_t *, bus_size_t); 168 void (*pbs_rr_8)(void *, bus_space_handle_t, 169 bus_size_t, u_int64_t *, bus_size_t); 170 171 /* write (single) */ 172 void (*pbs_w_1)(void *, bus_space_handle_t, 173 bus_size_t, u_int8_t); 174 void (*pbs_w_2)(void *, bus_space_handle_t, 175 bus_size_t, u_int16_t); 176 void (*pbs_w_4)(void *, bus_space_handle_t, 177 bus_size_t, u_int32_t); 178 void (*pbs_w_8)(void *, bus_space_handle_t, 179 bus_size_t, u_int64_t); 180 181 /* write multiple */ 182 void (*pbs_wm_1)(void *, bus_space_handle_t, 183 bus_size_t, const u_int8_t *, bus_size_t); 184 void (*pbs_wm_2)(void *, bus_space_handle_t, 185 bus_size_t, const u_int16_t *, bus_size_t); 186 void (*pbs_wm_4)(void *, bus_space_handle_t, 187 bus_size_t, const u_int32_t *, bus_size_t); 188 void (*pbs_wm_8)(void *, bus_space_handle_t, 189 bus_size_t, const u_int64_t *, bus_size_t); 190 191 /* write region */ 192 void (*pbs_wr_1)(void *, bus_space_handle_t, 193 bus_size_t, const u_int8_t *, bus_size_t); 194 void (*pbs_wr_2)(void *, bus_space_handle_t, 195 bus_size_t, const u_int16_t *, bus_size_t); 196 void (*pbs_wr_4)(void *, bus_space_handle_t, 197 bus_size_t, const u_int32_t *, bus_size_t); 198 void (*pbs_wr_8)(void *, bus_space_handle_t, 199 bus_size_t, const u_int64_t *, bus_size_t); 200 201 /* set multiple */ 202 void (*pbs_sm_1)(void *, bus_space_handle_t, 203 bus_size_t, u_int8_t, bus_size_t); 204 void (*pbs_sm_2)(void *, bus_space_handle_t, 205 bus_size_t, u_int16_t, bus_size_t); 206 void (*pbs_sm_4)(void *, bus_space_handle_t, 207 bus_size_t, u_int32_t, bus_size_t); 208 void (*pbs_sm_8)(void *, bus_space_handle_t, 209 bus_size_t, u_int64_t, bus_size_t); 210 211 /* set region */ 212 void (*pbs_sr_1)(void *, bus_space_handle_t, 213 bus_size_t, u_int8_t, bus_size_t); 214 void (*pbs_sr_2)(void *, bus_space_handle_t, 215 bus_size_t, u_int16_t, bus_size_t); 216 void (*pbs_sr_4)(void *, bus_space_handle_t, 217 bus_size_t, u_int32_t, bus_size_t); 218 void (*pbs_sr_8)(void *, bus_space_handle_t, 219 bus_size_t, u_int64_t, bus_size_t); 220 221 /* copy */ 222 void (*pbs_c_1)(void *, bus_space_handle_t, bus_size_t, 223 bus_space_handle_t, bus_size_t, bus_size_t); 224 void (*pbs_c_2)(void *, bus_space_handle_t, bus_size_t, 225 bus_space_handle_t, bus_size_t, bus_size_t); 226 void (*pbs_c_4)(void *, bus_space_handle_t, bus_size_t, 227 bus_space_handle_t, bus_size_t, bus_size_t); 228 void (*pbs_c_8)(void *, bus_space_handle_t, bus_size_t, 229 bus_space_handle_t, bus_size_t, bus_size_t); 230 }; 231 232 #ifdef _KERNEL 233 #define _wbflush() __asm volatile("sync.l") 234 #ifdef _PLAYSTATION2_BUS_SPACE_PRIVATE 235 236 #ifndef __read_1 237 #define __read_1(a) (*(volatile u_int8_t *)(a)) 238 #endif 239 #ifndef __read_2 240 #define __read_2(a) (*(volatile u_int16_t *)(a)) 241 #endif 242 #ifndef __read_4 243 #define __read_4(a) (*(volatile u_int32_t *)(a)) 244 #endif 245 #ifndef __read_8 246 #define __read_8(a) \ 247 ({ \ 248 u_int32_t lo, hi; \ 249 __asm volatile( \ 250 ".set noreorder;" \ 251 ".set push;" \ 252 ".set mips3;" \ 253 "ld $8, (%2);" \ 254 "dsra %1, $8, 32;" \ 255 "dsll %0, $8, 32;" \ 256 "dsra %0, %0, 32;" \ 257 ".set pop;" \ 258 ".set reorder;" \ 259 : "=r"(lo), "=r"(hi) : "r"(a) : "$8"); \ 260 ((u_int64_t)hi << 32) | lo; \ 261 }) 262 #endif 263 #define __read_16(a) "error. not yet" 264 265 #ifndef __write_1 266 #define __write_1(a, v) { \ 267 *(volatile u_int8_t *)(a) = (v); \ 268 _wbflush(); \ 269 } 270 #endif 271 #ifndef __write_2 272 #define __write_2(a, v) { \ 273 *(volatile u_int16_t *)(a) = (v); \ 274 _wbflush(); \ 275 } 276 #endif 277 #ifndef __write_4 278 #define __write_4(a, v) { \ 279 *(volatile u_int32_t *)(a) = (v); \ 280 _wbflush(); \ 281 } 282 #endif 283 #ifdef EE_GCC 284 #ifndef __write_8 285 #define __write_8(a, v) (*(volatile u_int64_t *)(a) = (v)) { \ 286 _wbflush(); \ 287 } 288 #endif 289 #ifndef __write_16 290 #define __write_16(a, v) (*(volatile u_int128_t *)(a) = (v)) { \ 291 _wbflush(); \ 292 } 293 #endif 294 #else /* EE_GCC */ 295 #ifdef __write_8 296 #error "can't override __write_8" 297 #endif 298 static __inline void 299 __write_8(bus_addr_t a, u_int64_t v) 300 { 301 __asm volatile( 302 ".set noreorder;" 303 ".set push;" 304 ".set arch = r5900;" 305 "pextlw $8, %0, %1;" 306 "sd $8, 0(%2);" 307 "sync.l;" 308 ".set pop;" 309 ".set reorder;" 310 : : "r"((u_int32_t)((u_int64_t)(v) >> 32)), 311 "r"((u_int32_t)(v)), "r"((u_int32_t)(a)) : "$8"); 312 } 313 #define _write_16(a) "error. not yet" 314 #endif /* EE_GCC */ 315 316 #define __TYPENAME(BITS) u_int##BITS##_t 317 318 #define _BUS_SPACE_READ(PREFIX, BYTES, BITS) \ 319 static __TYPENAME(BITS) \ 320 PREFIX##_read_##BYTES(void *, bus_space_handle_t, bus_size_t); \ 321 static __TYPENAME(BITS) \ 322 PREFIX##_read_##BYTES(void *tag, bus_space_handle_t bsh, \ 323 bus_size_t offset) \ 324 { \ 325 return __read_##BYTES(VADDR(bsh, offset)); \ 326 } 327 328 #define _BUS_SPACE_READ_MULTI(PREFIX, BYTES, BITS) \ 329 static void \ 330 PREFIX##_read_multi_##BYTES(void *, bus_space_handle_t, bus_size_t, \ 331 __TYPENAME(BITS) *, bus_size_t); \ 332 static void \ 333 PREFIX##_read_multi_##BYTES(void *tag, bus_space_handle_t bsh, \ 334 bus_size_t offset, __TYPENAME(BITS) *addr, bus_size_t count) \ 335 { \ 336 bus_addr_t a = VADDR(bsh, offset); \ 337 while (count--) \ 338 *addr++ = __read_##BYTES(a); \ 339 } 340 341 #define _BUS_SPACE_READ_REGION(PREFIX, BYTES, BITS) \ 342 static void \ 343 PREFIX##_read_region_##BYTES(void *, bus_space_handle_t, bus_size_t, \ 344 __TYPENAME(BITS) *, bus_size_t); \ 345 static void \ 346 PREFIX##_read_region_##BYTES(void *tag, bus_space_handle_t bsh, \ 347 bus_size_t offset, __TYPENAME(BITS) *addr, bus_size_t count) \ 348 { \ 349 while (count--) { \ 350 *addr++ = __read_##BYTES(VADDR(bsh, offset)); \ 351 offset += BYTES; \ 352 } \ 353 } 354 355 #define _BUS_SPACE_WRITE(PREFIX, BYTES, BITS) \ 356 static void \ 357 PREFIX##_write_##BYTES(void *, bus_space_handle_t, bus_size_t, \ 358 __TYPENAME(BITS)); \ 359 static void \ 360 PREFIX##_write_##BYTES(void *tag, bus_space_handle_t bsh, \ 361 bus_size_t offset, __TYPENAME(BITS) value) \ 362 { \ 363 __write_##BYTES(VADDR(bsh, offset), value); \ 364 } 365 366 #define _BUS_SPACE_WRITE_MULTI(PREFIX, BYTES, BITS) \ 367 static void \ 368 PREFIX##_write_multi_##BYTES(void *, bus_space_handle_t, bus_size_t, \ 369 const __TYPENAME(BITS) *, bus_size_t); \ 370 static void \ 371 PREFIX##_write_multi_##BYTES(void *tag, bus_space_handle_t bsh, \ 372 bus_size_t offset, const __TYPENAME(BITS) *addr, bus_size_t count) \ 373 { \ 374 bus_addr_t a = VADDR(bsh, offset); \ 375 while (count--) { \ 376 __write_##BYTES(a, *addr++); \ 377 } \ 378 } 379 380 #define _BUS_SPACE_WRITE_REGION(PREFIX, BYTES, BITS) \ 381 static void \ 382 PREFIX##_write_region_##BYTES(void *, bus_space_handle_t, bus_size_t, \ 383 const __TYPENAME(BITS) *, bus_size_t); \ 384 static void \ 385 PREFIX##_write_region_##BYTES(void *tag, bus_space_handle_t bsh, \ 386 bus_size_t offset, const __TYPENAME(BITS) *addr, bus_size_t count) \ 387 { \ 388 while (count--) { \ 389 __write_##BYTES(VADDR(bsh, offset), *addr++); \ 390 offset += BYTES; \ 391 } \ 392 } 393 394 #define _BUS_SPACE_SET_MULTI(PREFIX, BYTES, BITS) \ 395 static void \ 396 PREFIX##_set_multi_##BYTES(void *, bus_space_handle_t, bus_size_t, \ 397 __TYPENAME(BITS), bus_size_t); \ 398 static void \ 399 PREFIX##_set_multi_##BYTES(void *tag, bus_space_handle_t bsh, \ 400 bus_size_t offset, __TYPENAME(BITS) value, bus_size_t count) \ 401 { \ 402 bus_addr_t a = VADDR(bsh, offset); \ 403 while (count--) { \ 404 __write_##BYTES(a, value); \ 405 } \ 406 } 407 408 #define _BUS_SPACE_SET_REGION(PREFIX, BYTES, BITS) \ 409 static void \ 410 PREFIX##_set_region_##BYTES(void *, bus_space_handle_t, bus_size_t, \ 411 __TYPENAME(BITS), bus_size_t); \ 412 static void \ 413 PREFIX##_set_region_##BYTES(void *tag, bus_space_handle_t bsh, \ 414 bus_size_t offset, __TYPENAME(BITS) value, bus_size_t count) \ 415 { \ 416 while (count--) { \ 417 __write_##BYTES(VADDR(bsh, offset), value); \ 418 offset += BYTES; \ 419 } \ 420 } 421 422 #define _BUS_SPACE_COPY_REGION(PREFIX, BYTES, BITS) \ 423 static void \ 424 PREFIX##_copy_region_##BYTES(void *, bus_space_handle_t, bus_size_t, \ 425 bus_space_handle_t, bus_size_t, bus_size_t); \ 426 static void \ 427 PREFIX##_copy_region_##BYTES(void *t, bus_space_handle_t h1, \ 428 bus_size_t o1, bus_space_handle_t h2, bus_size_t o2, bus_size_t c) \ 429 { \ 430 bus_size_t o; \ 431 if ((h1 + o1) >= (h2 + o2)) { \ 432 /* src after dest: copy forward */ \ 433 for (o = 0; c != 0; c--, o += BYTES) \ 434 __write_##BYTES(VADDR(h2, o2 + o), \ 435 __read_##BYTES(VADDR(h1, o1 + o))); \ 436 } else { \ 437 /* dest after src: copy backwards */ \ 438 for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) \ 439 __write_##BYTES(VADDR(h2, o2 + o), \ 440 __read_##BYTES(VADDR(h1, o1 + o))); \ 441 } \ 442 } 443 444 #define _BUS_SPACE_NO_MAP \ 445 (int (*)(void *, bus_addr_t, bus_size_t, int, \ 446 bus_space_handle_t *))_bus_space_invalid_access 447 #define _BUS_SPACE_NO_UNMAP \ 448 (void (*)(void *, bus_space_handle_t, bus_size_t)) \ 449 _bus_space_invalid_access 450 #define _BUS_SPACE_NO_SUBREGION \ 451 (int (*)(void *, bus_space_handle_t, bus_size_t, bus_size_t, \ 452 bus_space_handle_t *))_bus_space_invalid_access 453 #define _BUS_SPACE_NO_ALLOC \ 454 (int (*)(void *, bus_addr_t, bus_addr_t, bus_size_t, bus_size_t,\ 455 bus_size_t, int, bus_addr_t *, bus_space_handle_t *)) \ 456 _bus_space_invalid_access 457 #define _BUS_SPACE_NO_FREE \ 458 (void (*)(void *, bus_space_handle_t, bus_size_t)) \ 459 _bus_space_invalid_access 460 #define _BUS_SPACE_NO_VADDR \ 461 (void *(*)(void *, bus_space_handle_t))_bus_space_invalid_access 462 #define _BUS_SPACE_NO_READ(BYTES, BITS) \ 463 (u_int##BITS##_t (*)(void *, bus_space_handle_t, bus_size_t)) \ 464 _bus_space_invalid_access 465 #define _BUS_SPACE_NO_READ_MULTI(BYTES, BITS) \ 466 (void (*)(void *, bus_space_handle_t, bus_size_t, \ 467 u_int##BITS##_t *, bus_size_t))_bus_space_invalid_access 468 #define _BUS_SPACE_NO_READ_REGION(BYTES, BITS) \ 469 (void (*)(void *, bus_space_handle_t, bus_size_t, \ 470 u_int##BITS##_t *, bus_size_t))_bus_space_invalid_access 471 #define _BUS_SPACE_NO_WRITE(BYTES, BITS) \ 472 (void (*)(void *, bus_space_handle_t, bus_size_t, \ 473 u_int##BITS##_t))_bus_space_invalid_access 474 #define _BUS_SPACE_NO_WRITE_MULTI(BYTES, BITS) \ 475 (void (*)(void *, bus_space_handle_t, bus_size_t, \ 476 const u_int##BITS##_t *, bus_size_t))_bus_space_invalid_access 477 #define _BUS_SPACE_NO_WRITE_REGION(BYTES, BITS) \ 478 (void (*)(void *, bus_space_handle_t, bus_size_t, \ 479 const u_int##BITS##_t *, bus_size_t))_bus_space_invalid_access 480 #define _BUS_SPACE_NO_SET_MULTI(BYTES, BITS) \ 481 (void (*)(void *, bus_space_handle_t, bus_size_t, \ 482 u_int##BITS##_t, bus_size_t))_bus_space_invalid_access 483 #define _BUS_SPACE_NO_SET_REGION(BYTES, BITS) \ 484 (void (*)(void *, bus_space_handle_t, bus_size_t, \ 485 u_int##BITS##_t, bus_size_t))_bus_space_invalid_access 486 #define _BUS_SPACE_NO_COPY_REGION(BYTES, BITS) \ 487 (void (*)(void *, bus_space_handle_t, bus_size_t, \ 488 bus_space_handle_t, bus_size_t, bus_size_t))_bus_space_invalid_access 489 490 void _bus_space_invalid_access(void); 491 #endif /* _PLAYSTATION2_BUS_SPACE_PRIVATE */ 492 493 #define __pbs_c(a,b) __CONCAT(a,b) 494 #define __pbs_opname(op,size) __pbs_c(__pbs_c(__pbs_c(pbs_,op),_),size) 495 496 #define __pbs_rs(sz, tn, t, h, o) \ 497 (__BUS_SPACE_ADDRESS_SANITY((h) + (o), tn, "bus addr"), \ 498 (*(t)->__pbs_opname(r,sz))((t)->pbs_cookie, h, o)) 499 500 #define __pbs_ws(sz, tn, t, h, o, v) \ 501 ({ \ 502 __BUS_SPACE_ADDRESS_SANITY((h) + (o), tn, "bus addr"); \ 503 (*(t)->__pbs_opname(w,sz))((t)->pbs_cookie, h, o, v); \ 504 }) 505 506 #define __pbs_nonsingle(type, sz, tn, t, h, o, a, c) \ 507 ({ \ 508 __BUS_SPACE_ADDRESS_SANITY((a), tn, "buffer"); \ 509 __BUS_SPACE_ADDRESS_SANITY((h) + (o), tn, "bus addr"); \ 510 (*(t)->__pbs_opname(type,sz))((t)->pbs_cookie, h, o, a, c); \ 511 }) 512 513 #define __pbs_set(type, sz, tn, t, h, o, v, c) \ 514 ({ \ 515 __BUS_SPACE_ADDRESS_SANITY((h) + (o), tn, "bus addr"); \ 516 (*(t)->__pbs_opname(type,sz))((t)->pbs_cookie, h, o, v, c); \ 517 }) 518 519 #define __pbs_copy(sz, tn, t, h1, o1, h2, o2, cnt) \ 520 ({ \ 521 __BUS_SPACE_ADDRESS_SANITY((h1) + (o1), tn, "bus addr 1"); \ 522 __BUS_SPACE_ADDRESS_SANITY((h2) + (o2), tn, "bus addr 2"); \ 523 (*(t)->__pbs_opname(c,sz))((t)->pbs_cookie, h1, o1, h2, o2, cnt); \ 524 }) 525 526 /* 527 * Create default bus_space tag. 528 */ 529 bus_space_tag_t bus_space_create(bus_space_tag_t, const char *, bus_addr_t, 530 bus_size_t); 531 void bus_space_destroy(bus_space_tag_t); 532 533 /* 534 * Mapping and unmapping operations. 535 */ 536 #define bus_space_map(t, a, s, f, hp) \ 537 (*(t)->pbs_map)((t)->pbs_cookie, (a), (s), (f), (hp)) 538 #define bus_space_unmap(t, h, s) \ 539 (*(t)->pbs_unmap)((t)->pbs_cookie, (h), (s)) 540 #define bus_space_subregion(t, h, o, s, hp) \ 541 (*(t)->pbs_subregion)((t)->pbs_cookie, (h), (o), (s), (hp)) 542 543 #endif /* _KERNEL */ 544 545 #define BUS_SPACE_MAP_CACHEABLE 0x01 546 #define BUS_SPACE_MAP_LINEAR 0x02 547 #define BUS_SPACE_MAP_PREFETCHABLE 0x04 548 549 #ifdef _KERNEL 550 /* 551 * Allocation and deallocation operations. 552 */ 553 #define bus_space_alloc(t, rs, re, s, a, b, f, ap, hp) \ 554 (*(t)->pbs_alloc)((t)->pbs_cookie, (rs), (re), (s), (a), (b), \ 555 (f), (ap), (hp)) 556 #define bus_space_free(t, h, s) \ 557 (*(t)->pbs_free)((t)->pbs_cookie, (h), (s)) 558 559 /* 560 * Get kernel virtual address for ranges mapped BUS_SPACE_MAP_LINEAR. 561 */ 562 #define bus_space_vaddr(t, h) \ 563 (*(t)->pbs_vaddr)((t)->pbs_cookie, (h)) 564 565 /* 566 * Bus barrier operations. The playstation2 does not currently require 567 * barriers, but we must provide the flags to MI code. 568 */ 569 #define bus_space_barrier(t, h, o, l, f) \ 570 ({ \ 571 _wbflush(); \ 572 }) 573 574 575 #define BUS_SPACE_BARRIER_READ 0x01 576 #define BUS_SPACE_BARRIER_WRITE 0x02 577 578 579 /* 580 * Bus read (single) operations. 581 */ 582 #define bus_space_read_1(t, h, o) __pbs_rs(1,u_int8_t,(t),(h),(o)) 583 #define bus_space_read_2(t, h, o) __pbs_rs(2,u_int16_t,(t),(h),(o)) 584 #define bus_space_read_4(t, h, o) __pbs_rs(4,u_int32_t,(t),(h),(o)) 585 #define bus_space_read_8(t, h, o) __pbs_rs(8,u_int64_t,(t),(h),(o)) 586 587 588 /* 589 * Bus read multiple operations. 590 */ 591 #define bus_space_read_multi_1(t, h, o, a, c) \ 592 __pbs_nonsingle(rm,1,u_int8_t,(t),(h),(o),(a),(c)) 593 #define bus_space_read_multi_2(t, h, o, a, c) \ 594 __pbs_nonsingle(rm,2,u_int16_t,(t),(h),(o),(a),(c)) 595 #define bus_space_read_multi_4(t, h, o, a, c) \ 596 __pbs_nonsingle(rm,4,u_int32_t,(t),(h),(o),(a),(c)) 597 #define bus_space_read_multi_8(t, h, o, a, c) \ 598 __pbs_nonsingle(rm,8,u_int64_t,(t),(h),(o),(a),(c)) 599 600 601 /* 602 * Bus read region operations. 603 */ 604 #define bus_space_read_region_1(t, h, o, a, c) \ 605 __pbs_nonsingle(rr,1,u_int8_t,(t),(h),(o),(a),(c)) 606 #define bus_space_read_region_2(t, h, o, a, c) \ 607 __pbs_nonsingle(rr,2,u_int16_t,(t),(h),(o),(a),(c)) 608 #define bus_space_read_region_4(t, h, o, a, c) \ 609 __pbs_nonsingle(rr,4,u_int32_t,(t),(h),(o),(a),(c)) 610 #define bus_space_read_region_8(t, h, o, a, c) \ 611 __pbs_nonsingle(rr,8,u_int64_t,(t),(h),(o),(a),(c)) 612 613 614 /* 615 * Bus write (single) operations. 616 */ 617 #define bus_space_write_1(t, h, o, v) __pbs_ws(1,u_int8_t,(t),(h),(o),(v)) 618 #define bus_space_write_2(t, h, o, v) __pbs_ws(2,u_int16_t,(t),(h),(o),(v)) 619 #define bus_space_write_4(t, h, o, v) __pbs_ws(4,u_int32_t,(t),(h),(o),(v)) 620 #define bus_space_write_8(t, h, o, v) __pbs_ws(8,u_int64_t,(t),(h),(o),(v)) 621 622 623 /* 624 * Bus write multiple operations. 625 */ 626 #define bus_space_write_multi_1(t, h, o, a, c) \ 627 __pbs_nonsingle(wm,1,u_int8_t,(t),(h),(o),(a),(c)) 628 #define bus_space_write_multi_2(t, h, o, a, c) \ 629 __pbs_nonsingle(wm,2,u_int16_t,(t),(h),(o),(a),(c)) 630 #define bus_space_write_multi_4(t, h, o, a, c) \ 631 __pbs_nonsingle(wm,4,u_int32_t,(t),(h),(o),(a),(c)) 632 #define bus_space_write_multi_8(t, h, o, a, c) \ 633 __pbs_nonsingle(wm,8,u_int64_t,(t),(h),(o),(a),(c)) 634 635 636 /* 637 * Bus write region operations. 638 */ 639 #define bus_space_write_region_1(t, h, o, a, c) \ 640 __pbs_nonsingle(wr,1,u_int8_t,(t),(h),(o),(a),(c)) 641 #define bus_space_write_region_2(t, h, o, a, c) \ 642 __pbs_nonsingle(wr,2,u_int16_t,(t),(h),(o),(a),(c)) 643 #define bus_space_write_region_4(t, h, o, a, c) \ 644 __pbs_nonsingle(wr,4,u_int32_t,(t),(h),(o),(a),(c)) 645 #define bus_space_write_region_8(t, h, o, a, c) \ 646 __pbs_nonsingle(wr,8,u_int64_t,(t),(h),(o),(a),(c)) 647 648 649 /* 650 * Set multiple operations. 651 */ 652 #define bus_space_set_multi_1(t, h, o, v, c) \ 653 __pbs_set(sm,1,u_int8_t,(t),(h),(o),(v),(c)) 654 #define bus_space_set_multi_2(t, h, o, v, c) \ 655 __pbs_set(sm,2,u_int16_t,(t),(h),(o),(v),(c)) 656 #define bus_space_set_multi_4(t, h, o, v, c) \ 657 __pbs_set(sm,4,u_int32_t,(t),(h),(o),(v),(c)) 658 #define bus_space_set_multi_8(t, h, o, v, c) \ 659 __pbs_set(sm,8,u_int64_t,(t),(h),(o),(v),(c)) 660 661 662 /* 663 * Set region operations. 664 */ 665 #define bus_space_set_region_1(t, h, o, v, c) \ 666 __pbs_set(sr,1,u_int8_t,(t),(h),(o),(v),(c)) 667 #define bus_space_set_region_2(t, h, o, v, c) \ 668 __pbs_set(sr,2,u_int16_t,(t),(h),(o),(v),(c)) 669 #define bus_space_set_region_4(t, h, o, v, c) \ 670 __pbs_set(sr,4,u_int32_t,(t),(h),(o),(v),(c)) 671 #define bus_space_set_region_8(t, h, o, v, c) \ 672 __pbs_set(sr,8,u_int64_t,(t),(h),(o),(v),(c)) 673 674 675 /* 676 * Copy region operations. 677 */ 678 #define bus_space_copy_region_1(t, h1, o1, h2, o2, c) \ 679 __pbs_copy(1, u_int8_t, (t), (h1), (o1), (h2), (o2), (c)) 680 #define bus_space_copy_region_2(t, h1, o1, h2, o2, c) \ 681 __pbs_copy(2, u_int16_t, (t), (h1), (o1), (h2), (o2), (c)) 682 #define bus_space_copy_region_4(t, h1, o1, h2, o2, c) \ 683 __pbs_copy(4, u_int32_t, (t), (h1), (o1), (h2), (o2), (c)) 684 #define bus_space_copy_region_8(t, h1, o1, h2, o2, c) \ 685 __pbs_copy(8, u_int64_t, (t), (h1), (o1), (h2), (o2), (c)) 686 687 /* 688 * Bus stream operations--defined in terms of non-stream counterparts 689 */ 690 #define __BUS_SPACE_HAS_STREAM_METHODS 1 691 #define bus_space_read_stream_1 bus_space_read_1 692 #define bus_space_read_stream_2 bus_space_read_2 693 #define bus_space_read_stream_4 bus_space_read_4 694 #define bus_space_read_stream_8 bus_space_read_8 695 #define bus_space_read_multi_stream_1 bus_space_read_multi_1 696 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 697 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 698 #define bus_space_read_multi_stream_8 bus_space_read_multi_8 699 #define bus_space_read_region_stream_1 bus_space_read_region_1 700 #define bus_space_read_region_stream_2 bus_space_read_region_2 701 #define bus_space_read_region_stream_4 bus_space_read_region_4 702 #define bus_space_read_region_stream_8 bus_space_read_region_8 703 #define bus_space_write_stream_1 bus_space_write_1 704 #define bus_space_write_stream_2 bus_space_write_2 705 #define bus_space_write_stream_4 bus_space_write_4 706 #define bus_space_write_stream_8 bus_space_write_8 707 #define bus_space_write_multi_stream_1 bus_space_write_multi_1 708 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 709 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 710 #define bus_space_write_multi_stream_8 bus_space_write_multi_8 711 #define bus_space_write_region_stream_1 bus_space_write_region_1 712 #define bus_space_write_region_stream_2 bus_space_write_region_2 713 #define bus_space_write_region_stream_4 bus_space_write_region_4 714 #define bus_space_write_region_stream_8 bus_space_write_region_8 715 716 #endif /* _KERNEL */ 717 718 /* 719 * Flags used in various bus DMA methods. 720 */ 721 #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */ 722 #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */ 723 #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */ 724 #define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */ 725 #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */ 726 #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */ 727 #define BUS_DMA_BUS2 0x020 728 #define BUS_DMA_BUS3 0x040 729 #define BUS_DMA_BUS4 0x080 730 #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */ 731 #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */ 732 #define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */ 733 734 #define PLAYSTATION2_DMAMAP_COHERENT 0x10000 /* no cache flush necessary on sync */ 735 736 /* Forwards needed by prototypes below. */ 737 struct mbuf; 738 struct uio; 739 740 /* 741 * Operations performed by bus_dmamap_sync(). 742 */ 743 #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */ 744 #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */ 745 #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */ 746 #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */ 747 748 typedef struct playstation2_bus_dma_tag *bus_dma_tag_t; 749 typedef struct playstation2_bus_dmamap *bus_dmamap_t; 750 751 #define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0) 752 753 /* 754 * bus_dma_segment_t 755 * 756 * Describes a single contiguous DMA transaction. Values 757 * are suitable for programming into DMA registers. 758 */ 759 struct playstation2_bus_dma_segment { 760 bus_addr_t ds_addr; /* DMA address */ 761 bus_size_t ds_len; /* length of transfer */ 762 bus_addr_t _ds_vaddr; /* virtual address, 0 if invalid */ 763 }; 764 typedef struct playstation2_bus_dma_segment bus_dma_segment_t; 765 766 /* 767 * bus_dma_tag_t 768 * 769 * A machine-dependent opaque type describing the implementation of 770 * DMA for a given bus. 771 */ 772 773 struct playstation2_bus_dma_tag { 774 /* 775 * DMA mapping methods. 776 */ 777 int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int, 778 bus_size_t, bus_size_t, int, bus_dmamap_t *); 779 void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t); 780 int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *, 781 bus_size_t, struct proc *, int); 782 int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t, 783 struct mbuf *, int); 784 int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t, 785 struct uio *, int); 786 int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t, 787 bus_dma_segment_t *, int, bus_size_t, int); 788 void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t); 789 void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t, 790 bus_addr_t, bus_size_t, int); 791 792 /* 793 * DMA memory utility functions. 794 */ 795 int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t, 796 bus_size_t, bus_dma_segment_t *, int, int *, int); 797 void (*_dmamem_free)(bus_dma_tag_t, 798 bus_dma_segment_t *, int); 799 int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *, 800 int, size_t, void **, int); 801 void (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t); 802 paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *, 803 int, off_t, int, int); 804 805 /* 806 * DMA controller private. 807 */ 808 void *_dmachip_cookie; 809 }; 810 811 #define bus_dmamap_create(t, s, n, m, b, f, p) \ 812 (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p)) 813 #define bus_dmamap_destroy(t, p) \ 814 (*(t)->_dmamap_destroy)((t), (p)) 815 #define bus_dmamap_load(t, m, b, s, p, f) \ 816 (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f)) 817 #define bus_dmamap_load_mbuf(t, m, b, f) \ 818 (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f)) 819 #define bus_dmamap_load_uio(t, m, u, f) \ 820 (*(t)->_dmamap_load_uio)((t), (m), (u), (f)) 821 #define bus_dmamap_load_raw(t, m, sg, n, s, f) \ 822 (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f)) 823 #define bus_dmamap_unload(t, p) \ 824 (*(t)->_dmamap_unload)((t), (p)) 825 #define bus_dmamap_sync(t, p, o, l, ops) \ 826 (*(t)->_dmamap_sync)((t), (p), (o), (l), (ops)) 827 828 #define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \ 829 (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f)) 830 #define bus_dmamem_free(t, sg, n) \ 831 (*(t)->_dmamem_free)((t), (sg), (n)) 832 #define bus_dmamem_map(t, sg, n, s, k, f) \ 833 (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f)) 834 #define bus_dmamem_unmap(t, k, s) \ 835 (*(t)->_dmamem_unmap)((t), (k), (s)) 836 #define bus_dmamem_mmap(t, sg, n, o, p, f) \ 837 (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f)) 838 839 #define bus_dmatag_subregion(t, mna, mxa, nt, f) EOPNOTSUPP 840 #define bus_dmatag_destroy(t) 841 842 /* 843 * bus_dmamap_t 844 * 845 * Describes a DMA mapping. 846 */ 847 struct playstation2_bus_dmamap { 848 /* 849 * PRIVATE MEMBERS: not for use my machine-independent code. 850 */ 851 bus_size_t _dm_size; /* largest DMA transfer mappable */ 852 int _dm_segcnt; /* number of segs this map can map */ 853 bus_size_t _dm_maxmaxsegsz; /* fixed largest possible segment */ 854 bus_size_t _dm_boundary; /* don't cross this */ 855 int _dm_flags; /* misc. flags */ 856 857 /* 858 * PUBLIC MEMBERS: these are used by machine-independent code. 859 */ 860 bus_size_t dm_maxsegsz; /* largest possible segment */ 861 bus_size_t dm_mapsize; /* size of the mapping */ 862 int dm_nsegs; /* # valid segments in mapping */ 863 bus_dma_segment_t dm_segs[1]; /* segments; variable length */ 864 }; 865 866 #ifdef _PLAYSTATION2_BUS_DMA_PRIVATE 867 int _bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t, 868 bus_size_t, int, bus_dmamap_t *); 869 void _bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t); 870 int _bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *, 871 bus_size_t, struct proc *, int); 872 int _bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t, 873 struct mbuf *, int); 874 int _bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t, 875 struct uio *, int); 876 int _bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t, 877 bus_dma_segment_t *, int, bus_size_t, int); 878 void _bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t); 879 void _bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 880 bus_size_t, int); 881 882 int _bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size, 883 bus_size_t alignment, bus_size_t boundary, 884 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags); 885 void _bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs, 886 int nsegs); 887 int _bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs, 888 int nsegs, size_t size, void **kvap, int flags); 889 void _bus_dmamem_unmap(bus_dma_tag_t tag, void *kva, 890 size_t size); 891 paddr_t _bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs, 892 int nsegs, off_t off, int prot, int flags); 893 894 int _bus_dmamem_alloc_range(bus_dma_tag_t tag, bus_size_t size, 895 bus_size_t alignment, bus_size_t boundary, 896 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags, 897 vaddr_t low, vaddr_t high); 898 899 extern struct playstation2_bus_dma_tag playstation2_default_bus_dma_tag; 900 #endif /* _PLAYSTATION2_BUS_DMA_PRIVATE */ 901 902 #endif /* _PLAYSTATION2_BUS_H_ */ 903
Indexes created Fri Oct 03 02:09:57 GMT 2025