intr.h revision 1.5 1 1.5 nisimura /* $NetBSD: intr.h,v 1.5 1998/08/25 01:55:40 nisimura Exp $ */
2 1.2 perry
3 1.3 jonathan /*
4 1.3 jonathan * Copyright (c) 1998 Jonathan Stone. All rights reserved.
5 1.3 jonathan *
6 1.3 jonathan * Redistribution and use in source and binary forms, with or without
7 1.3 jonathan * modification, are permitted provided that the following conditions
8 1.3 jonathan * are met:
9 1.3 jonathan * 1. Redistributions of source code must retain the above copyright
10 1.3 jonathan * notice, this list of conditions and the following disclaimer.
11 1.3 jonathan * 2. Redistributions in binary form must reproduce the above copyright
12 1.3 jonathan * notice, this list of conditions and the following disclaimer in the
13 1.3 jonathan * documentation and/or other materials provided with the distribution.
14 1.3 jonathan * 3. All advertising materials mentioning features or use of this software
15 1.3 jonathan * must display the following acknowledgement:
16 1.3 jonathan * This product includes software developed by Jonathan Stone for
17 1.3 jonathan * the NetBSD Project.
18 1.3 jonathan * 4. The name of the author may not be used to endorse or promote products
19 1.3 jonathan * derived from this software without specific prior written permission.
20 1.3 jonathan *
21 1.3 jonathan * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 1.3 jonathan * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 1.3 jonathan * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 1.3 jonathan * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 1.3 jonathan * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 1.3 jonathan * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 1.3 jonathan * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 1.3 jonathan * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 1.3 jonathan * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 1.3 jonathan * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 1.3 jonathan */
32 1.1 jonathan
33 1.1 jonathan #ifndef _PMAX_INTR_H_
34 1.1 jonathan #define _PMAX_INTR_H_
35 1.4 jonathan
36 1.4 jonathan #define IPL_NONE 0 /* disable only this interrupt */
37 1.4 jonathan #define IPL_BIO 1 /* disable block I/O interrupts */
38 1.4 jonathan #define IPL_NET 2 /* disable network interrupts */
39 1.4 jonathan #define IPL_TTY 3 /* disable terminal interrupts */
40 1.4 jonathan #define IPL_CLOCK 4 /* disable clock interrupts */
41 1.4 jonathan #define IPL_STATCLOCK 5 /* disable profiling interrupts */
42 1.4 jonathan #define IPL_SERIAL 6 /* disable serial hardware interrupts */
43 1.4 jonathan #define IPL_DMA 7 /* disable DMA reload interrupts */
44 1.4 jonathan #define IPL_HIGH 8 /* disable all interrupts */
45 1.4 jonathan
46 1.5 nisimura #ifdef _KERNEL
47 1.5 nisimura #ifndef _LOCORE
48 1.5 nisimura
49 1.5 nisimura typedef int spl_t;
50 1.5 nisimura extern spl_t splx __P((spl_t));
51 1.5 nisimura extern spl_t splsoftnet __P((void)), splsoftclock __P((void));
52 1.5 nisimura extern spl_t splhigh __P((void));
53 1.5 nisimura extern spl_t spl0 __P((void)); /* XXX should not enable TC on 3min */
54 1.5 nisimura
55 1.5 nisimura extern void setsoftnet __P((void)), clearsoftnet __P((void));
56 1.5 nisimura extern void setsoftclock __P((void)), clearsoftclock __P((void));
57 1.5 nisimura
58 1.5 nisimura
59 1.5 nisimura extern int (*Mach_splnet) __P((void)), (*Mach_splbio) __P((void)),
60 1.5 nisimura (*Mach_splimp) __P((void)), (*Mach_spltty) __P((void)),
61 1.5 nisimura (*Mach_splclock) __P((void)), (*Mach_splstatclock) __P((void)),
62 1.5 nisimura (*Mach_splnone) __P((void));
63 1.5 nisimura
64 1.5 nisimura #define splnet() (*Mach_splnet)()
65 1.5 nisimura #define splbio() (*Mach_splbio)()
66 1.5 nisimura #define splimp() (*Mach_splimp)()
67 1.5 nisimura #define spltty() (*Mach_spltty)()
68 1.5 nisimura #define splclock() (*Mach_splclock)()
69 1.5 nisimura #define splstatclock() (*Mach_splstatclock)()
70 1.3 jonathan
71 1.3 jonathan /*
72 1.3 jonathan * Index into intrcnt[], which is defined in locore
73 1.3 jonathan */
74 1.3 jonathan extern u_long intrcnt[];
75 1.3 jonathan
76 1.5 nisimura #define SOFTCLOCK_INTR 0
77 1.5 nisimura #define SOFTNET_INTR 1
78 1.5 nisimura #define SERIAL0_INTR 2
79 1.5 nisimura #define SERIAL1_INTR 3
80 1.5 nisimura #define SERIAL2_INTR 4
81 1.5 nisimura #define LANCE_INTR 5
82 1.5 nisimura #define SCSI_INTR 6
83 1.5 nisimura #define ERROR_INTR 7
84 1.5 nisimura #define HARDCLOCK 8
85 1.5 nisimura #define FPU_INTR 9
86 1.5 nisimura #define SLOT0_INTR 10
87 1.5 nisimura #define SLOT1_INTR 11
88 1.5 nisimura #define SLOT2_INTR 12
89 1.5 nisimura #define DTOP_INTR 13
90 1.5 nisimura #define ISDN_INTR 14
91 1.5 nisimura #define FLOPPY_INTR 15
92 1.5 nisimura #define STRAY_INTR 16
93 1.5 nisimura
94 1.5 nisimura /* handle i/o device interrupts */
95 1.5 nisimura extern int (*mips_hardware_intr) __P((unsigned, unsigned, unsigned, unsigned));
96 1.5 nisimura
97 1.5 nisimura #endif /* !_LOCORE */
98 1.5 nisimura #endif /* _KERNEL */
99 1.3 jonathan
100 1.1 jonathan #endif /* !_PMAX_INTR_H_ */
101