intr.h revision 1.15
1 /* $NetBSD: intr.h,v 1.15 2000/04/11 02:43:52 nisimura Exp $ */ 2 3 /* 4 * Copyright (c) 1998 Jonathan Stone. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Jonathan Stone for 17 * the NetBSD Project. 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #ifndef _PMAX_INTR_H_ 34 #define _PMAX_INTR_H_ 35 36 #define IPL_NONE 0 /* disable only this interrupt */ 37 #define IPL_BIO 1 /* disable block I/O interrupts */ 38 #define IPL_NET 2 /* disable network interrupts */ 39 #define IPL_TTY 3 /* disable terminal interrupts */ 40 #define IPL_CLOCK 4 /* disable clock interrupts */ 41 #define IPL_STATCLOCK 5 /* disable profiling interrupts */ 42 #define IPL_SERIAL 6 /* disable serial hardware interrupts */ 43 #define IPL_DMA 7 /* disable DMA reload interrupts */ 44 #define IPL_HIGH 8 /* disable all interrupts */ 45 46 #ifdef _KERNEL 47 #ifndef _LOCORE 48 49 #include <mips/cpuregs.h> 50 51 int _splraise __P((int)); 52 int _spllower __P((int)); 53 int _splset __P((int)); 54 int _splget __P((void)); 55 void _splnone __P((void)); 56 void _setsoftintr __P((int)); 57 void _clrsoftintr __P((int)); 58 59 #define splhigh() _splraise(MIPS_INT_MASK) 60 #define spl0() (void)_spllower(0) 61 #define splx(s) (void)_splset(s) 62 #define splbio() (_splraise(splvec.splbio)) 63 #define splnet() (_splraise(splvec.splnet)) 64 #define spltty() (_splraise(splvec.spltty)) 65 #define splimp() (_splraise(splvec.splimp)) 66 #define splpmap() (_splraise(splvec.splimp)) 67 #define splclock() (_splraise(splvec.splclock)) 68 #define splstatclock() (_splraise(splvec.splstatclock)) 69 #define spllowersoftclock() _spllower(MIPS_SOFT_INT_MASK_0) 70 #define splsoftclock() _splraise(MIPS_SOFT_INT_MASK_0) 71 #define splsoftnet() _splraise(MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1) 72 73 struct splvec { 74 int splbio; 75 int splnet; 76 int spltty; 77 int splimp; 78 int splclock; 79 int splstatclock; 80 }; 81 extern struct splvec splvec; 82 83 /* Conventionals ... */ 84 85 #define MIPS_SPLHIGH (MIPS_INT_MASK) 86 #define MIPS_SPL0 (MIPS_INT_MASK_0|MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1) 87 #define MIPS_SPL1 (MIPS_INT_MASK_1|MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1) 88 #define MIPS_SPL3 (MIPS_INT_MASK_3|MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1) 89 #define MIPS_SPL_0_1 (MIPS_INT_MASK_1|MIPS_SPL0) 90 #define MIPS_SPL_0_1_2 (MIPS_INT_MASK_2|MIPS_SPL_0_1) 91 #define MIPS_SPL_0_1_3 (MIPS_INT_MASK_3|MIPS_SPL_0_1) 92 #define MIPS_SPL_0_1_2_3 (MIPS_INT_MASK_3|MIPS_SPL_0_1_2) 93 94 /* 95 * Index into intrcnt[], which is defined in locore 96 */ 97 extern u_long intrcnt[]; 98 99 #define SOFTCLOCK_INTR 0 100 #define SOFTNET_INTR 1 101 #define SERIAL0_INTR 2 102 #define SERIAL1_INTR 3 103 #define LANCE_INTR 4 104 #define SCSI_INTR 5 105 #define ERROR_INTR 6 106 #define HARDCLOCK 7 107 #define FPU_INTR 8 108 #define SLOT0_INTR 9 109 #define SLOT1_INTR 10 110 #define SLOT2_INTR 11 111 #define DTOP_INTR 12 112 #define ISDN_INTR 13 113 #define FLOPPY_INTR 14 114 #define STRAY_INTR 15 115 116 struct intrhand { 117 int (*ih_func) __P((void *)); 118 void *ih_arg; 119 }; 120 extern struct intrhand intrtab[]; 121 122 #define SYS_DEV_SCSI SCSI_INTR 123 #define SYS_DEV_LANCE LANCE_INTR 124 #define SYS_DEV_SCC0 SERIAL0_INTR 125 #define SYS_DEV_SCC1 SERIAL1_INTR 126 #define SYS_DEV_DTOP DTOP_INTR 127 #define SYS_DEV_FDC FLOPPY_INTR 128 #define SYS_DEV_ISDN ISDN_INTR 129 #define SYS_DEV_OPT0 SLOT0_INTR 130 #define SYS_DEV_OPT1 SLOT1_INTR 131 #define SYS_DEV_OPT2 SLOT2_INTR 132 #define SYS_DEV_BOGUS -1 133 #define MAX_DEV_NCOOKIES 16 134 135 /* 136 * software simulated interrupt 137 */ 138 extern unsigned ssir; 139 140 #define SIR_NET 0x1 141 142 #define setsoftnet() setsoft(SIR_NET) 143 #define setsoft(x) \ 144 do { ssir |= (x); _setsoftintr(MIPS_SOFT_INT_MASK_1); } while (0) 145 146 #define setsoftclock() _setsoftintr(MIPS_SOFT_INT_MASK_0) 147 148 #endif /* !_LOCORE */ 149 #endif /* _KERNEL */ 150 151 #endif /* !_PMAX_INTR_H_ */ 152
Indexes created Thu Sep 25 16:09:42 GMT 2025