intr.h revision 1.24
1 /* $NetBSD: intr.h,v 1.24 2003/05/25 14:04:45 tsutsui Exp $ */ 2 3 /* 4 * Copyright (c) 1998 Jonathan Stone. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Jonathan Stone for 17 * the NetBSD Project. 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #ifndef _PMAX_INTR_H_ 34 #define _PMAX_INTR_H_ 35 36 #include <sys/device.h> 37 #include <sys/lock.h> 38 #include <sys/queue.h> 39 40 #define IPL_NONE 0 /* disable only this interrupt */ 41 42 #define IPL_SOFT 1 /* generic software interrupts (SI 0) */ 43 #define IPL_SOFTCLOCK 2 /* clock software interrupts (SI 0) */ 44 #define IPL_SOFTNET 3 /* network software interrupts (SI 1) */ 45 #define IPL_SOFTSERIAL 4 /* serial software interrupts (SI 1) */ 46 47 #define IPL_BIO 5 /* disable block I/O interrupts */ 48 #define IPL_NET 6 /* disable network interrupts */ 49 #define IPL_TTY 7 /* disable terminal interrupts */ 50 #define IPL_SERIAL 7 /* disable serial interrupts */ 51 #define IPL_CLOCK 8 /* disable clock interrupts */ 52 #define IPL_HIGH 8 /* disable all interrupts */ 53 54 #define _IPL_NSOFT 4 55 #define _IPL_N 9 56 57 #define _IPL_SI0_FIRST IPL_SOFT 58 #define _IPL_SI0_LAST IPL_SOFTCLOCK 59 60 #define _IPL_SI1_FIRST IPL_SOFTNET 61 #define _IPL_SI1_LAST IPL_SOFTSERIAL 62 63 #define IPL_SOFTNAMES { \ 64 "misc", \ 65 "clock", \ 66 "net", \ 67 "serial", \ 68 } 69 70 #ifdef _KERNEL 71 #ifndef _LOCORE 72 73 #include <mips/cpuregs.h> 74 75 int _splraise __P((int)); 76 int _spllower __P((int)); 77 int _splset __P((int)); 78 int _splget __P((void)); 79 void _splnone __P((void)); 80 void _setsoftintr __P((int)); 81 void _clrsoftintr __P((int)); 82 83 #define splhigh() _splraise(MIPS_INT_MASK) 84 #define spl0() (void)_spllower(0) 85 #define splx(s) (void)_splset(s) 86 #define splbio() (_splraise(splvec.splbio)) 87 #define splnet() (_splraise(splvec.splnet)) 88 #define spltty() (_splraise(splvec.spltty)) 89 #define splvm() (_splraise(splvec.splvm)) 90 #define splclock() (_splraise(splvec.splclock)) 91 #define splstatclock() (_splraise(splvec.splstatclock)) 92 #define spllowersoftclock() _spllower(MIPS_SOFT_INT_MASK_0) 93 94 #define splsched() splhigh() 95 #define spllock() splhigh() 96 97 #define splsoft() _splraise(MIPS_SOFT_INT_MASK_0) 98 #define splsoftclock() _splraise(MIPS_SOFT_INT_MASK_0) 99 #define splsoftnet() _splraise(MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1) 100 #define splsoftserial() _splraise(MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1) 101 102 struct splvec { 103 int splbio; 104 int splnet; 105 int spltty; 106 int splvm; 107 int splclock; 108 int splstatclock; 109 }; 110 extern struct splvec splvec; 111 112 /* Conventionals ... */ 113 114 #define MIPS_SPLHIGH (MIPS_INT_MASK) 115 #define MIPS_SPL0 (MIPS_INT_MASK_0|MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1) 116 #define MIPS_SPL1 (MIPS_INT_MASK_1|MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1) 117 #define MIPS_SPL3 (MIPS_INT_MASK_3|MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1) 118 #define MIPS_SPL_0_1 (MIPS_INT_MASK_1|MIPS_SPL0) 119 #define MIPS_SPL_0_1_2 (MIPS_INT_MASK_2|MIPS_SPL_0_1) 120 #define MIPS_SPL_0_1_3 (MIPS_INT_MASK_3|MIPS_SPL_0_1) 121 #define MIPS_SPL_0_1_2_3 (MIPS_INT_MASK_3|MIPS_SPL_0_1_2) 122 123 /* 124 * Index into intrcnt[], which is defined in locore 125 */ 126 extern u_long intrcnt[]; 127 128 #define SERIAL0_INTR 0 129 #define SERIAL1_INTR 1 130 #define LANCE_INTR 2 131 #define SCSI_INTR 3 132 #define SLOT0_INTR 4 133 #define SLOT1_INTR 5 134 #define SLOT2_INTR 6 135 #define DTOP_INTR 7 136 #define ISDN_INTR 8 137 #define FLOPPY_INTR 9 138 139 struct intrhand { 140 int (*ih_func) __P((void *)); 141 void *ih_arg; 142 }; 143 extern struct intrhand intrtab[]; 144 145 #define SYS_DEV_SCSI SCSI_INTR 146 #define SYS_DEV_LANCE LANCE_INTR 147 #define SYS_DEV_SCC0 SERIAL0_INTR 148 #define SYS_DEV_SCC1 SERIAL1_INTR 149 #define SYS_DEV_DTOP DTOP_INTR 150 #define SYS_DEV_FDC FLOPPY_INTR 151 #define SYS_DEV_ISDN ISDN_INTR 152 #define SYS_DEV_OPT0 SLOT0_INTR 153 #define SYS_DEV_OPT1 SLOT1_INTR 154 #define SYS_DEV_OPT2 SLOT2_INTR 155 #define SYS_DEV_BOGUS -1 156 #define MAX_DEV_NCOOKIES 10 157 158 159 struct pmax_intrhand { 160 LIST_ENTRY(pmax_intrhand) ih_q; 161 int (*ih_func)(void *); 162 void *ih_arg; 163 }; 164 165 #include <mips/softintr.h> 166 167 extern struct evcnt pmax_clock_evcnt; 168 extern struct evcnt pmax_fpu_evcnt; 169 extern struct evcnt pmax_memerr_evcnt; 170 171 #endif /* !_LOCORE */ 172 #endif /* _KERNEL */ 173 174 #endif /* !_PMAX_INTR_H_ */ 175
Indexes created Mon Sep 22 13:09:51 GMT 2025